/* This file is generated by ttl2pld.pl */
/* Please don't edit it. */

Name     M707 ;
PartNo   cpld ;
Date     12/15/2018 ;
Revision 01 ;
Designer  ;
Company   ;
Assembly None ;
Location E1 ;
Device   f1504ispplcc84;

$DEFINE AA1  2
$DEFINE AB1  1
$DEFINE AC1 84
$DEFINE AD1 81
$DEFINE AD2 83
$DEFINE AE1 79
$DEFINE AE2 80
$DEFINE AF1 76
$DEFINE AF2 77
$DEFINE AH1 74
$DEFINE AH2 75
$DEFINE AJ1 70
$DEFINE AJ2 73
$DEFINE AK1 68
$DEFINE AK2 69
$DEFINE AL1 65
$DEFINE AL2 67
$DEFINE AM1 63
$DEFINE AM2 64
$DEFINE AN1 60
$DEFINE AN2 61
$DEFINE AP1 57
$DEFINE AP2 58
$DEFINE AR1 55
$DEFINE AR2 56
$DEFINE AS1 52
$DEFINE AS2 54
$DEFINE AT2 51
$DEFINE AU1 49
$DEFINE AU2 50
$DEFINE AV1 46
$DEFINE AV2 48
$DEFINE BA1 45
$DEFINE BB1 44
$DEFINE BC1 41
$DEFINE BD1 39
$DEFINE BD2 40
$DEFINE BE1 36
$DEFINE BE2 37
$DEFINE BF1 34
$DEFINE BF2 35
$DEFINE BH1 31
$DEFINE BH2 33
$DEFINE BJ1 29
$DEFINE BJ2 30
$DEFINE BK1 27
$DEFINE BK2 28
$DEFINE BL1 24
$DEFINE BL2 25
$DEFINE BM1 21
$DEFINE BM2 22
$DEFINE BN1 18
$DEFINE BN2 20
$DEFINE BP1 16
$DEFINE BP2 17
$DEFINE BR1 12
$DEFINE BR2 15
$DEFINE BS1 10
$DEFINE BS2 11
$DEFINE BT2  9
$DEFINE BU1  6
$DEFINE BU2  8
$DEFINE BV1  4
$DEFINE BV2  5

/* Input Pins */
pin AP2 = ac04;
pin AR2 = ac05;
pin AL2 = ac06;
pin AM2 = ac07;
pin AU2 = ac08;
pin AS2 = ac09;
pin AT2 = ac10;
pin AU1 = ac11;
pin AE1 = ae1;
pin AF1 = af1;
pin AH1 = ah1;
pin BD2 = clr_flag1;
pin BF2 = clr_flag2;
pin AB1 = echo;
pin AN2 = enable;
pin AN1 = enable_ds;
pin BE2 = ioclr;
pin AS1 = load_buffer;
pin BP2 = n2xclk;
pin AJ2 = n_t_12x;
pin AH2 = n_t_13x;
pin AF2 = n_t_15x;
pin AE2 = n_t_17x;
pin AK1 = size;
pin BH2 = skp_strobe;
pin BN2 = stop;
pin BS2 = wait_low;

/* NOTE: This requires a blue wire on the card! */
$UNDEF AD2
$DEFINE AD2 4 /* 63 */

/* Output Pins */
pin AD1 = active;
pin AL1 = al1;
pin AR1 = ar1;
pin AJ1 = bit6;
pin AK2 = bit9;
pin BN1 = bn1;
pin BP1 = bp1;
pin BK2 = irq;
pin AD2 = line;
pin BJ1 = n3v;
pin BR2 = n_t_63x;
pin AV2 = serial_out;
pin BJ2 = skip;

node bit1;
node bit8;
node bit7;
node bit4;
node bit5;
node n_t_166x;
node n_t_16x;
node bit2;
node bit3;
node n_t_138x;
node oactive;

/* Equations */

n3v = 'b'1;
serial_out = tx;

/* e1: sn7430 */
n_t_9x = !(n_t_17x & ae1 & n_t_15x & af1 & n_t_13x & n_t_12x);

/* e2: sn7474 */
line.ar = !n_t_4x;
line.d = bit1;
line.ck = n_t_5x;
line.ap = !active;
bit1.ar = !ioclr_low;
bit1.d = bit2;
bit1.ck = n_t_5x;
bit1.ap = !n_t_54x;

/* e3: sn7400 */
tx = !(echo & line);
n_t_39x = !(!n_t_5x & n_t_460x);

/* e4: sn7400 */
n_t_20x = !(enable & !ar1);
selected = !(n_t_9x & enable_ds);
ar1 = !(selected & load_buffer);

/* e5: sn7400 */
n_t_53x = !(ac06 & !ar1);
n_t_381x = !(!ar1 & ac07);
n_t_378x = !(ac05 & !ar1);
n_t_3x = !(!ar1 & ac04);

/* e6: sn7474 */
bit8.ar = !ioclr_low;
bit8.d = bit9;
bit8.ck = n_t_5x;
bit8.ap = !n_t_3x;
bit9.ar = !ioclr_low;
bit9.d = 'b'0;
bit9.ck = n_t_5x;
bit9.ap = !n_t_20x;
al1 = !bit9;

/* e7: sn7400 */
n_t_37x = !(!ar1 & ac10);
n_t_54x = !(!ar1 & ac11);
n_t_42x = !(ac08 & !ar1);
n_t_52x = !(!ar1 & ac09);

/* e8: sn7474 */
bit6.ar = !ioclr_low;
bit6.d = bit7;
bit6.ck = n_t_5x;
bit6.ap = !n_t_53x;
bit7.ar = !ioclr_low;
bit7.d = bit8;
bit7.ck = n_t_5x;
bit7.ap = !n_t_378x;

/* e9: sn7430 */
!n_t_460x = !(!bit6 & !bit7 & !bit5 & !bit4 & !bit3 & !bit2 & ah1 & !bit8);

/* e10: sn7440 */
ioclr_low = !ioclr;

/* e11: sn7474 */
bit4.ar = !ioclr_low;
bit4.d = bit5;
bit4.ck = n_t_5x;
bit4.ap = !n_t_42x;
bit5.ar = !ioclr_low;
bit5.d = bit6;
bit5.ck = n_t_5x;
bit5.ap = !n_t_381x;

/* e12: sn7400 */
n_t_28x = !(n_t_10x & n_t_62x);

/* e13: sn7410 */
n_t_132x = !(clr_flag1 & selected);
!n_t_167x = !(n_t_132x & clr_flag2 & ioclr_low);
skip = !(skp_strobe & !irq & selected);

/* e14: sn7474 */
n_t_166x.d = n_t_161x;
n_t_166x.ck = n2xclk;
n_t_166x.ap = !n_t_5x;
n_t_63x = !n_t_166x;
n_t_16x.d = n_t_11x;
n_t_16x.ck = n2xclk;
n_t_16x.ap = !ioclr_low;
!n_t_5x = !n_t_16x;

/* e15: sn7474 */
bit2.ar = !ioclr_low;
bit2.d = bit3;
bit2.ck = n_t_5x;
bit2.ap = !n_t_37x;
bit3.ar = !ioclr_low;
bit3.d = bit4;
bit3.ck = n_t_5x;
bit3.ap = !n_t_52x;

/* e16: sn7474 */
active.ar = !ioclr_low;
active.d = n_t_28x;
active.ck = n2xclk;
irq.d = !n_t_460x;
irq.ck = n_t_5x;
irq.ap = !n_t_167x;

/* e17: sn7474 */
bn1.d = !n_t_138x;
bn1.ck = n2xclk;
bn1.ar = !n_t_5x;
n_t_138x.d = n_t_166x;
n_t_138x.ck = n2xclk;
n_t_138x.ap = !n_t_5x;
bp1 = !n_t_138x;

/* e18: sn7400 */
n_t_10x = !(n_t_39x & active);
n_t_11x = !(active & n_t_16x);
n_t_161x = !(wait_low & !active);
n_t_62x = !(stop & size);

/* r4: r_us_ */
/* VRS: Make an edge detector for "active". */
!n_t_4x = active & !oactive;
oactive.d = active;
oactive.ck = !n2xclk;

/* Open collector 'wire-or's */