M7103 NEGATIVE I/O BUS CONVERTER VRS Double-Height DEC edge connector BV1 BU1 BT1 BS1 BR1 BP1 BN1 BM1 BL1 BK1 BJ1 BH1 BF1 BE1 BD1 BC1 BB1 BA1 BV2 BU2 BT2 BS2 BR2 BP2 BN2 BM2 BL2 BK2 BJ2 BH2 BF2 BE2 BD2 BC2 BB2 BA2 AV1 AU1 AT1 AS1 AR1 AP1 AN1 AM1 AL1 AK1 AJ1 AH1 AF1 AE1 AD1 AC1 AB1 AA1 AV2 AU2 AT2 AS2 AR2 AP2 AN2 AM2 AL2 AK2 AJ2 AH2 AF2 AE2 AD2 AC2 AB2 AA2 Dual In Line Package >NAME >VALUE RESISTOR type 0207, grid 10 mm >NAME >VALUE CAPACITOR grid 5 mm, outline 2.5 x 7.5 mm >NAME >VALUE ELECTROLYTIC CAPACITOR grid 15.24 mm, diameter 5 mm >NAME >VALUE DIODE diameter 2 mm, horizontal, grid 10.16 mm >NAME >VALUE TO-39 >NAME >VALUE TO-39 >NAME >VALUE TTL Devices, 74xx Series with US Symbols Based on the following sources: <ul> <li>Texas Instruments TTL Data Book   Volume 1, 1996. <li>TTL Data Book, Volume 2 , 1993 <li>National Seminconductor Databook 1990, ALS/LS Logic <li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0 <li>http://icmaster.com/ViewCompare.asp </ul> <author>Created by librarian@cadsoft.de</author> Dual In Line Package >NAME >VALUE EAGLE Design Rules The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name.