#$ TOOL CUPL
# Berkeley PLA format generated using CUPL(WM) 5.0a
# Serial#  60008009
# Created  Fri Apr 06 19:46:26 2018
#
#    Name        sn74148
#    Partno      cpld
#    Revision    01
#    Date        4/6/2018
#    Designer    
#    Company     
#    Assembly    None
#    Location    E1
#
#$ TITLE  sn74148
#$ MODULE  sn74148
#$ JEDECFILE  sn74148
#$ DEVICE  virtual
#$ PINS  14 EI+:5 P0x+:10 P1x+:11 P2x+:12 P3x+:13 P4x+:1 P5x+:2 P6x+:3 P7x+:4 a0x+:9 a1x+:7 a2x+:6 eo+:15 gs+:14 
.i 9
.o 5
.type f
.ilb  EI P0x P1x P2x P3x P4x P5x P6x P7x 
.ob   a0x- a1x- a2x- eo- gs- 
.phase 11111
.p 10
0---01111 10001
0-01-1-1- 10001
0-----01- 10101
0-------0 11101
0--101111 01000
0--0-11-- 01001
0------0- 01101
0----0--- 00101
011111111 00010
00------- 00001
.e