#$ TOOL CUPL
# Berkeley PLA format generated using CUPL(WM) 5.0a
# Serial#  60008009
# Created  Mon Apr 16 21:20:22 2018
#
#    Name        sn7485
#    Partno      cpld
#    Revision    01
#    Date        4/15/2018
#    Designer    
#    Company     
#    Assembly    None
#    Location    E1
#
#$ TITLE  sn7485
#$ MODULE  sn7485
#$ JEDECFILE  sn7485
#$ DEVICE  virtual
#$ PINS  14 A0I+:10 A1I+:12 A2I+:13 A3I+:15 B0I+:9 B1I+:11 B2I+:14 B3I+:1 EQI+:3 GTI+:4 LTI+:2 eqo+:6 gto+:5 lto+:7 
#$ NODES  4 n0e+:201 n1e+:202 n2e+:203 n3e+:204 
.i 15
.o 7
.type f
.ilb  A0I A1I A2I A3I B0I B1I B2I B3I EQI GTI LTI n0e n1e n2e 
      n3e 
.ob   eqo gto lto n0e n1e n2e n3e 
.phase 1111111
.p 19
--------1--0000 1000000
--------0-00000 0100000
----0------1000 0100000
-----0------100 0100000
------0------10 0100000
-------0------1 0100000
--------00-0000 0010000
----1------1000 0010000
-----1------100 0010000
------1------10 0010000
-------1------1 0010000
1---0---------- 0001000
0---1---------- 0001000
-1---0--------- 0000100
-0---1--------- 0000100
--1---0-------- 0000010
--0---1-------- 0000010
---1---0------- 0000001
---0---1------- 0000001
.e