// This file is generated by topld.pl 
// Please don't edit it. 
// Input Pins 
// Output Pins 
module M837 (cpma_disable_low, d_low, f_low, f_set_low, ind1_low, ind2_low, initialize, io_pause_low, ir00_low, ir01_low, key_ctl_low, load_addr, load_cntl, md00_low, md01_low, md02_low, md03_low, md04_low, md05_low, md06_low, md07_low, md08_low, md09_low, md10_low, md11_low, power_ok, run_low, tp2, tp3, tp4, ts1_low, ts_disable_low, c1l, data03_low, data05_low, data06_low, data07_low, data08_low, data09_low, data10_low, data11_low, df_enable, ema0_low, ema1_low, ema2_low, int_in_progress_low, int_rqst_low, internal_io_low, skip_low, tp_aa1, tp_ab1, tp_ba1, tp_bb1, user_mode_low);
input cpma_disable_low;
input d_low;
input f_low;
input f_set_low;
input ind1_low;
input ind2_low;
input initialize;
input io_pause_low;
input ir00_low;
input ir01_low;
input key_ctl_low;
input load_addr;
input load_cntl;
input md00_low;
input md01_low;
input md02_low;
input md03_low;
input md04_low;
input md05_low;
input md06_low;
input md07_low;
input md08_low;
input md09_low;
input md10_low;
input md11_low;
input power_ok;
input run_low;
input tp2;
input tp3;
input tp4;
input ts1_low;
input ts_disable_low;
output c1l;
output data03_low;
inout data05_low;
inout data06_low;
inout data07_low;
inout data08_low;
inout data09_low;
inout data10_low;
inout data11_low;
inout reg df_enable;
output ema0_low;
output ema1_low;
output ema2_low;
inout int_in_progress_low;
output int_rqst_low;
output internal_io_low;
output skip_low;
inout tp_aa1;
inout tp_ab1;
inout tp_ba1;
inout tp_bb1;
inout user_mode_low;

reg db_m;
reg df0_m;
reg df1_m;
reg df2_m;
reg df_enable_m;
reg ema_disable_low_m;
reg gdollar_0_m;
reg gdollar_2_m;
reg ib0_m;
reg ib1_m;
reg ib2_m;
reg if0_m;
reg if1_m;
reg if2_m;
reg uf_m;

reg uf;
reg if0;
reg if1;
reg if2;
reg suf_l;
reg sf0_l;
reg sf1_l;
reg sf2_l;
reg gdollar_0;
reg ib0;
reg ib1;
reg ib2;
reg ema_disable_low;
reg db;
reg gdollar_1;
reg sf3_l;
reg sf4_l;
reg sf5_l;
reg gdollar_2;
reg df0;
reg df1;
reg df2;
// Internal nodes 
wire _lp_df_enab_and_ema_disab_rp_low;
wire cdf_low;
wire cif_low;
wire cint_low;
wire cuf_low;
wire d;
wire d_in_low;
wire db_load;
wire error;
wire ext_ld_low;
wire gtf_low;
wire ibifdf_clr_low;
wire ind_low;
wire initialize_low;
wire int_in_prog_mams_ld_ctl;
wire int_inh;
wire jmp_or_jms;
wire lp_d_in_or_cif_or_rmf_rp;
wire lp_gtf_or_rib_rp_low;
wire lp_ind_or_rif_rp_low;
wire lp_la_or_tp3_rp_low;
wire lp_la_or_tp4_and_ld_ctl_rp_low;
wire md06;
wire md07;
wire md08;
wire myc1;
wire n_t_110x;
wire n_t_11x;
wire n_t_120x;
wire n_t_122x;
wire n_t_124x;
wire n_t_126x;
wire n_t_135x;
wire n_t_13x;
wire n_t_140x;
wire n_t_141x;
wire n_t_142x;
wire n_t_143x;
wire n_t_14x;
wire n_t_19x;
wire n_t_21x;
wire n_t_22x;
wire n_t_23x;
wire n_t_24x;
wire n_t_25x;
wire n_t_27x;
wire n_t_28x;
wire n_t_29x;
wire n_t_33x;
wire n_t_34x;
wire n_t_40x;
wire n_t_43x;
wire n_t_44x;
wire n_t_49x;
wire n_t_50x;
wire n_t_53x;
wire n_t_54x;
wire n_t_55x;
wire n_t_56x;
wire n_t_57x;
wire n_t_5x;
wire n_t_62x;
wire n_t_66x;
wire n_t_68x;
wire n_t_69x;
wire n_t_6x;
wire n_t_71x;
wire n_t_72x;
wire n_t_73x;
wire n_t_74x;
wire n_t_75x;
wire n_t_76x;
wire n_t_77x;
wire n_t_78x;
wire n_t_79x;
wire n_t_80x;
wire n_t_81x;
wire n_t_82x;
wire n_t_83x;
wire n_t_84x;
wire n_t_86x;
wire n_t_87x;
wire n_t_8x;
wire n_t_93x;
wire n_t_9x;

//

//
wire power_ok_low;
wire rdf_low;
wire renamed0;
wire rib_low;
wire rif_low;
wire rmf_low;
wire rtf_low;
wire sint_low;
wire suf_low;
wire uint;
// Code nodes 
// Converted name lb_d_in_or_d_lp_jmp_or_jms_rp_or_lp_f_and_md3_rp_lp_jmp_or_jms_rp_rb_low is too long. 
// ... using name renamed0 instead. 
// Equations 
// e1: dec8235 
// ema0_low = !(df0 & __lp_df_enab_and_ema_disab_rp_low
//         # if0 & _lp_df_enab_and_ema_disab_rp_low); 
// ema1_low = !(df1 & __lp_df_enab_and_ema_disab_rp_low
//         # if1 & _lp_df_enab_and_ema_disab_rp_low); 
// ema2_low = !(df2 & __lp_df_enab_and_ema_disab_rp_low
//         # if2 & _lp_df_enab_and_ema_disab_rp_low); 
// e2: dec8271 
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, tp_ba1, renamed0, uf, renamed0)
  if (~ibifdf_clr_low) begin
    uf_m <= 1'b0;
  end else
  if (~(lp_la_or_tp4_and_ld_ctl_rp_low)) begin
    uf_m <= tp_ba1 & renamed0
               | uf & ~renamed0;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, uf_m)
  if (~ibifdf_clr_low) begin
    uf <= 1'b0;
  end else
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    uf <= uf_m;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, tp_bb1, renamed0, if0, renamed0)
  if (~ibifdf_clr_low) begin
    if0_m <= 1'b0;
  end else
  if (~(lp_la_or_tp4_and_ld_ctl_rp_low)) begin
    if0_m <= tp_bb1 & renamed0
                | if0 & ~renamed0;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, if0_m)
  if (~ibifdf_clr_low) begin
    if0 <= 1'b0;
  end else
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    if0 <= if0_m;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, tp_aa1, renamed0, if1, renamed0)
  if (~ibifdf_clr_low) begin
    if1_m <= 1'b0;
  end else
  if (~(lp_la_or_tp4_and_ld_ctl_rp_low)) begin
    if1_m <= tp_aa1 & renamed0
                | if1 & ~renamed0;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, if1_m)
  if (~ibifdf_clr_low) begin
    if1 <= 1'b0;
  end else
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    if1 <= if1_m;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, tp_ab1, renamed0, if2, renamed0)
  if (~ibifdf_clr_low) begin
    if2_m <= 1'b0;
  end else
  if (~(lp_la_or_tp4_and_ld_ctl_rp_low)) begin
    if2_m <= tp_ab1 & renamed0
                | if2 & ~renamed0;
  end
always @(lp_la_or_tp4_and_ld_ctl_rp_low, ibifdf_clr_low, if2_m)
  if (~ibifdf_clr_low) begin
    if2 <= 1'b0;
  end else
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    if2 <= if2_m;
  end
// e3: dec8271 
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    suf_l <= ~tp_ba1 & int_in_prog_mams_ld_ctl
                  | suf_l & ~int_in_prog_mams_ld_ctl;
  end
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    sf0_l <= n_t_93x & int_in_prog_mams_ld_ctl
                  | sf0_l & ~int_in_prog_mams_ld_ctl;
  end
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    sf1_l <= n_t_87x & int_in_prog_mams_ld_ctl
                  | sf1_l & ~int_in_prog_mams_ld_ctl;
  end
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    sf2_l <= n_t_86x & int_in_prog_mams_ld_ctl
                  | sf2_l & ~int_in_prog_mams_ld_ctl;
  end
// e4: sn7400 
assign tp_aa1 = ~n_t_87x & n_t_80x;
assign tp_ab1 = ~n_t_86x & n_t_81x;
// e5: sn7400 
assign n_t_86x = ~d_in_low & ib2;
assign n_t_87x = ~d_in_low & ib1;
assign n_t_93x = ~ib0 & d_in_low;
assign tp_bb1 = ~n_t_93x & n_t_79x;
// e6: dec8235 
// data05_low = !(!suf_l & !lp_gtf_or_rib_rp_low); 
// data06_low = !(!sf0_l & !lp_gtf_or_rib_rp_low
//           # if0 & !lp_ind_or_rif_rp_low); 
// data07_low = !(!sf1_l & !lp_gtf_or_rib_rp_low
//           # if1 & !lp_ind_or_rif_rp_low); 
// data08_low = !(!sf2_l & !lp_gtf_or_rib_rp_low
//           # if2 & !lp_ind_or_rif_rp_low); 
// e7: n8881n 
// data06_low = !(!rdf_low & df0); 
// data05_low = !(uf & !ind_low); 
// data08_low = !(df2 & !rdf_low); 
// data07_low = !(df1 & !rdf_low); 
// e8: sp384n 
assign n_t_79x = data06_low
                  | d_in_low;
assign n_t_78x = data05_low
                  | d_in_low;
assign n_t_81x = data08_low
                  | d_in_low;
assign n_t_80x = d_in_low
                  | data07_low;
// e9: sn7400 
assign n_t_83x = ~n_t_75x & n_t_79x;
assign db_load = ~n_t_74x & n_t_78x;
assign n_t_84x = ~n_t_81x & n_t_77x;
assign n_t_82x = ~n_t_80x & n_t_76x;
// e10: dec8271 
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, gdollar_0, lp_d_in_or_cif_or_rmf_rp)
  if (~ibifdf_clr_low) begin
    gdollar_0_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    gdollar_0_m <= gdollar_0 & ~lp_d_in_or_cif_or_rmf_rp;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, gdollar_0_m)
  if (~ibifdf_clr_low) begin
    gdollar_0 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, n_t_83x, lp_d_in_or_cif_or_rmf_rp, ib0, lp_d_in_or_cif_or_rmf_rp)
  if (~ibifdf_clr_low) begin
    ib0_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    ib0_m <= n_t_83x & lp_d_in_or_cif_or_rmf_rp
                | ib0 & ~lp_d_in_or_cif_or_rmf_rp;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, ib0_m)
  if (~ibifdf_clr_low) begin
    ib0 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    ib0 <= ib0_m;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, n_t_82x, lp_d_in_or_cif_or_rmf_rp, ib1, lp_d_in_or_cif_or_rmf_rp)
  if (~ibifdf_clr_low) begin
    ib1_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    ib1_m <= n_t_82x & lp_d_in_or_cif_or_rmf_rp
                | ib1 & ~lp_d_in_or_cif_or_rmf_rp;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, ib1_m)
  if (~ibifdf_clr_low) begin
    ib1 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    ib1 <= ib1_m;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, n_t_84x, lp_d_in_or_cif_or_rmf_rp, ib2, lp_d_in_or_cif_or_rmf_rp)
  if (~ibifdf_clr_low) begin
    ib2_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    ib2_m <= n_t_84x & lp_d_in_or_cif_or_rmf_rp
                | ib2 & ~lp_d_in_or_cif_or_rmf_rp;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, ib2_m)
  if (~ibifdf_clr_low) begin
    ib2 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    ib2 <= ib2_m;
  end
// e11: sp380n 
assign power_ok_low = ~ts1_low
                         | power_ok;
// e12: sn7410 
assign renamed0 = ~n_t_44x & d_in_low & n_t_40x;
assign tp_ba1 = ~(~ts_disable_low & d_in_low & db);
assign n_t_71x = ~n_t_44x & n_t_40x & n_t_40x;
// e13: sn7474 
always @(tp4, ibifdf_clr_low, cpma_disable_low)
  if (~ibifdf_clr_low) begin
    ema_disable_low_m <= 1'b1;
  end else
  if (~(tp4)) begin
    ema_disable_low_m <= cpma_disable_low;
  end
always @(tp4, ibifdf_clr_low, ema_disable_low_m)
  if (~ibifdf_clr_low) begin
    ema_disable_low <= 1'b1;
  end else
  if (tp4) begin
    ema_disable_low <= ema_disable_low_m;
  end
// e14: sn7400 
assign n_t_49x = ~n_t_28x & n_t_11x;
assign n_t_11x = ~n_t_43x & df_enable;
assign n_t_28x = ~(d & ~jmp_or_jms);
// e15: mc8266 
assign n_t_74x = ~(~suf_l & ~rmf_low);
assign n_t_75x = ~(~sf0_l & ~rmf_low
                    | md06 & rmf_low & ~cif_low);
assign n_t_76x = ~(~sf1_l & ~rmf_low
                    | md07 & rmf_low & ~cif_low);
assign n_t_77x = ~(~sf2_l & ~rmf_low
                    | md08 & rmf_low & ~cif_low);
// e16: n8881n 
// lp_la_or_tp4_and_ld_ctl_rp_low = !load_addr; 
// lp_la_or_tp4_and_ld_ctl_rp_low = !(load_cntl & tp4); 
// ibifdf_clr_low = !(run_low & power_ok_low); 
// ibifdf_clr_low = !(int_in_prog_mams_ld_ctl & tp4); 
// e17: sn7474 
always @(n_t_24x, n_t_66x, n_t_69x, db_load)
  if (n_t_66x) begin
    db_m <= 1'b0;
  end else
  if (~n_t_69x) begin
    db_m <= 1'b1;
  end else
  if (~(~n_t_24x)) begin
    db_m <= db_load;
  end
always @(n_t_24x, n_t_66x, n_t_69x, db_m)
  if (n_t_66x) begin
    db <= 1'b0;
  end else
  if (~n_t_69x) begin
    db <= 1'b1;
  end else
  if (~n_t_24x) begin
    db <= db_m;
  end
always @(tp4, initialize_low, n_t_49x)
  if (~initialize_low) begin
    df_enable_m <= 1'b0;
  end else
  if (~(tp4)) begin
    df_enable_m <= n_t_49x;
  end
always @(tp4, initialize_low, df_enable_m)
  if (~initialize_low) begin
    df_enable <= 1'b0;
  end else
  if (tp4) begin
    df_enable <= df_enable_m;
  end
// e18: sn74h00 
assign lp_ind_or_rif_rp_low = ~(~ind_low & rif_low);
assign lp_gtf_or_rib_rp_low = ~(~gtf_low & rib_low);
assign _lp_df_enab_and_ema_disab_rp_low = ~df_enable & ema_disable_low;
assign __lp_df_enab_and_ema_disab_rp_low = ~(~df_enable & ema_disable_low);
// e19: sn7400 
assign n_t_53x = ~(~cuf_low & tp3);
assign n_t_69x = ~(tp3 & ~suf_low);
// e20: sp380n 
assign md07 = ~n_t_22x
                 | md07_low;
assign n_t_33x = ~n_t_22x
                    | md04_low;
assign md06 = ~md06_low
                 | n_t_22x;
assign n_t_34x = ~n_t_22x
                    | md05_low;
// e21: sn7410 
assign ind_low = ~(ind1_low & ~ts1_low & ind2_low);
assign myc1 = ~rdf_low & rif_low & rib_low;
// e22: dec8251 
assign cint_low = ~(n_t_5x & ~md06 & ~md07 & ~md08);
assign rdf_low = ~(n_t_5x & ~md06 & ~md07 & md08);
assign rif_low = ~(n_t_5x & ~md06 & md07 & ~md08);
assign rib_low = ~(n_t_5x & ~md06 & md07 & md08);
assign rmf_low = ~(n_t_5x & md06 & ~md07 & ~md08);
assign sint_low = ~(n_t_5x & md06 & ~md07 & md08);
assign cuf_low = ~(n_t_5x & md06 & md07 & ~md08);
assign suf_low = ~n_t_5x & md06 & md07 & md08;
// e23: sn7404 
// e24: sn7400 
assign n_t_62x = ~rtf_low & rmf_low;
assign n_t_24x = ~n_t_62x & tp3;
// e25: sp384n 
assign n_t_22x = io_pause_low
                  | ~load_cntl;
// e26: n8881n 
// c1l = !myc1; 
// int_in_progress_low = !int_inh; 
// e27: sn7404 
// e28: sn7400 
assign n_t_55x = ~(~n_t_57x & n_t_50x);
assign n_t_56x = ~n_t_50x & md10_low;
assign cif_low = ~n_t_56x & n_t_54x;
assign cdf_low = ~n_t_55x & n_t_54x;
// e29: sn7410 
assign gtf_low = ~(n_t_27x & ~n_t_57x & ~n_t_19x);
assign n_t_66x = ~(~load_addr & n_t_53x & ibifdf_clr_low);
assign rtf_low = ~(n_t_57x & n_t_27x & ~n_t_19x);
// e30: sp384n 
assign n_t_43x = ~load_cntl
                  | f_set_low;
// e31: n8881n 
// !n_t_5x = !n_t_5x; 
// internal_io_low = !n_t_5x; 
// internal_io_low = !n_t_27x; 
// internal_io_low = !n_t_54x; 
// e32: sp314n 
assign n_t_5x = ~(~md03_low
                   | n_t_34x
                   | n_t_22x
                   | md04_low
                   | md09_low
                   | ~md10_low
                   | n_t_57x);
// e33: sp314n 
assign n_t_54x = ~(n_t_22x
                    | n_t_34x
                    | ~md03_low
                    | ~md09_low
                    | md04_low
                    | n_t_22x
                    | n_t_22x);
// e34: sp314n 
assign n_t_27x = ~(~md03_low
                    | n_t_34x
                    | n_t_22x
                    | n_t_33x
                    | md08
                    | md06
                    | md07);
// e35: n8881n 
// user_mode_low = !uf; 
// int_rqst_low = !uint; 
// skip_low = !(uint & !sint_low); 
// e36: sp380n 
assign n_t_6x = ~(~md03_low
                   | md02_low);
assign n_t_8x = ~md02_low
                   | n_t_29x;
assign n_t_9x = ~md11_low
                   | md02_low;
assign d_in_low = ~(n_t_68x
                     | ~rtf_low);
// e37: sp314n 
assign error = ~user_mode_low
                  | n_t_6x
                  | n_t_8x
                  | n_t_9x
                  | f_low
                  | md01_low
                  | md00_low;
// e38: sn7420 
assign n_t_23x = ~ts_disable_low & initialize_low & n_t_13x & uint;
assign uint = ~n_t_23x & n_t_21x & n_t_21x;
// e39: sp380n 
assign lp_la_or_tp3_rp_low = ~tp3
                                | load_addr;
assign int_in_prog_mams_ld_ctl = ~(~load_cntl
                                    | ~int_in_progress_low);
// e40: sp380n 
assign ext_ld_low = ~(~ts1_low
                       | n_t_14x);
assign n_t_14x = ~ext_ld_low
                    | tp2;
assign d = ~(d_low
              | ~load_cntl);
assign initialize_low = ~load_addr
                           | initialize;
// e41: sp384n 
assign n_t_29x = ~md09_low
                  | ~md10_low;
assign n_t_19x = ~md10_low
                  | md09_low;
assign n_t_50x = md11_low
                  | md10_low;
// e42: sn7410 
assign n_t_44x = ~jmp_or_jms & d;
assign n_t_40x = ~(~f_low & md03_low & jmp_or_jms);
// e43: sn7420 
assign n_t_25x = ~n_t_72x & n_t_53x & ibifdf_clr_low & int_inh;
assign int_inh = ~n_t_69x & n_t_25x & n_t_73x & n_t_25x;
// e44: sn7400 
assign n_t_13x = ~(~cint_low & tp3);
assign n_t_72x = ~n_t_71x & tp3;
assign n_t_73x = ~lp_d_in_or_cif_or_rmf_rp & tp3;
assign n_t_21x = ~tp2 & error;
// e45: sp380n 
assign n_t_57x = ~n_t_22x
                    | md11_low;
assign md08 = ~n_t_22x
                 | md08_low;
// e46: sp380n 
assign n_t_68x = ~key_ctl_low
                    | ext_ld_low;
assign jmp_or_jms = ~(ir00_low
                       | ~ir01_low);
// e47: dec8271 
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    gdollar_1 <= gdollar_1 & ~int_in_prog_mams_ld_ctl;
  end
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    sf3_l <= ~df0 & int_in_prog_mams_ld_ctl
                  | sf3_l & ~int_in_prog_mams_ld_ctl;
  end
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    sf4_l <= ~df1 & int_in_prog_mams_ld_ctl
                  | sf4_l & ~int_in_prog_mams_ld_ctl;
  end
always @(posedge lp_la_or_tp4_and_ld_ctl_rp_low)
  if (lp_la_or_tp4_and_ld_ctl_rp_low) begin
    sf5_l <= ~df2 & int_in_prog_mams_ld_ctl
                  | sf5_l & ~int_in_prog_mams_ld_ctl;
  end
// e48: sn7404 
// e49: dec8271 
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, gdollar_2, n_t_110x)
  if (~ibifdf_clr_low) begin
    gdollar_2_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    gdollar_2_m <= gdollar_2 & ~n_t_110x;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, gdollar_2_m)
  if (~ibifdf_clr_low) begin
    gdollar_2 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, n_t_143x, n_t_110x, df0, n_t_110x)
  if (~ibifdf_clr_low) begin
    df0_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    df0_m <= n_t_143x & n_t_110x
                | df0 & ~n_t_110x;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, df0_m)
  if (~ibifdf_clr_low) begin
    df0 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    df0 <= df0_m;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, n_t_142x, n_t_110x, df1, n_t_110x)
  if (~ibifdf_clr_low) begin
    df1_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    df1_m <= n_t_142x & n_t_110x
                | df1 & ~n_t_110x;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, df1_m)
  if (~ibifdf_clr_low) begin
    df1 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    df1 <= df1_m;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, n_t_141x, n_t_110x, df2, n_t_110x)
  if (~ibifdf_clr_low) begin
    df2_m <= 1'b0;
  end else
  if (~(lp_la_or_tp3_rp_low)) begin
    df2_m <= n_t_141x & n_t_110x
                | df2 & ~n_t_110x;
  end
always @(lp_la_or_tp3_rp_low, ibifdf_clr_low, df2_m)
  if (~ibifdf_clr_low) begin
    df2 <= 1'b0;
  end else
  if (lp_la_or_tp3_rp_low) begin
    df2 <= df2_m;
  end
// e50: dec8235 
// data03_low = !(!'b'1 & !lp_gtf_or_rib_rp_low
//           # int_inh & !ind_low); 
// data09_low = !(!sf3_l & !lp_gtf_or_rib_rp_low
//           # df0 & !ind_low); 
// data10_low = !(!sf4_l & !lp_gtf_or_rib_rp_low
//           # df1 & !ind_low); 
// data11_low = !(!sf5_l & !lp_gtf_or_rib_rp_low
//           # df2 & !ind_low); 
// e51: sp384n 
assign n_t_120x = d_in_low
                   | data09_low;
assign n_t_124x = data11_low
                   | d_in_low;
assign n_t_122x = d_in_low
                   | data10_low;
// e52: sn7400 
assign n_t_142x = ~n_t_126x & n_t_122x;
assign n_t_143x = ~n_t_140x & n_t_120x;
assign n_t_141x = ~n_t_124x & n_t_135x;
// e53: mc8266 
assign n_t_140x = ~(~sf3_l & ~rmf_low
                     | md06 & rmf_low & ~cdf_low);
assign n_t_126x = ~(~sf4_l & ~rmf_low
                     | md07 & rmf_low & ~cdf_low);
assign n_t_135x = ~(~sf5_l & ~rmf_low
                     | md08 & rmf_low & ~cdf_low);
// e54: sn7410 
assign lp_d_in_or_cif_or_rmf_rp = ~rmf_low & d_in_low & cif_low;
assign n_t_110x = ~d_in_low & rmf_low & cdf_low;
// Open collector 'wire-or's 
assign c1l = myc1? ~myc1: 1'bz;
assign data03_low = (int_inh & ~ind_low)? 1'b0: 1'bz;
assign data05_low = (~suf_l & ~lp_gtf_or_rib_rp_low)
                     | (uf & ~ind_low)? 1'b0: 1'bz;
assign data06_low = (~sf0_l & ~lp_gtf_or_rib_rp_low
                      | if0 & ~lp_ind_or_rif_rp_low)
                     | (~rdf_low & df0)? 1'b0: 1'bz;
assign data07_low = (~sf1_l & ~lp_gtf_or_rib_rp_low
                      | if1 & ~lp_ind_or_rif_rp_low)
                     | (df1 & ~rdf_low)? 1'b0: 1'bz;
assign data08_low = (~sf2_l & ~lp_gtf_or_rib_rp_low
                      | if2 & ~lp_ind_or_rif_rp_low)
                     | (df2 & ~rdf_low)? 1'b0: 1'bz;
assign data09_low = (~sf3_l & ~lp_gtf_or_rib_rp_low
                      | df0 & ~ind_low)? 1'b0: 1'bz;
assign data10_low = (~sf4_l & ~lp_gtf_or_rib_rp_low
                      | df1 & ~ind_low)? 1'b0: 1'bz;
assign data11_low = (~sf5_l & ~lp_gtf_or_rib_rp_low
                      | df2 & ~ind_low)? 1'b0: 1'bz;
assign ema0_low = (df0 & __lp_df_enab_and_ema_disab_rp_low
                    | if0 & _lp_df_enab_and_ema_disab_rp_low)? 1'b0: 1'bz;
assign ema1_low = (df1 & __lp_df_enab_and_ema_disab_rp_low
                    | if1 & _lp_df_enab_and_ema_disab_rp_low)? 1'b0: 1'bz;
assign ema2_low = (df2 & __lp_df_enab_and_ema_disab_rp_low
                    | if2 & _lp_df_enab_and_ema_disab_rp_low)? 1'b0: 1'bz;
assign ibifdf_clr_low = ~run_low & power_ok_low
                           | int_in_prog_mams_ld_ctl & tp4;
assign int_in_progress_low = int_inh? ~int_inh: 1'bz;
assign int_rqst_low = uint? ~uint: 1'bz;
assign internal_io_low = n_t_5x
                          | n_t_27x
                          | n_t_54x? ~n_t_5x
                            | n_t_27x
                            | n_t_54x: 1'bz;
assign lp_la_or_tp4_and_ld_ctl_rp_low = ~load_addr
                                           | load_cntl & tp4;
assign skip_low = (uint & ~sint_low)? 1'b0: 1'bz;
assign user_mode_low = uf? ~uf: 1'bz;
endmodule