// this file is generated by topld.pl 
// please don't edit it. 
// input pins 
// output pins 
module m8830cpld (hz1843200, init, int_rqst_l, internal_io_l, io_pause_l, md03_l, md04_l, md05_l, md06_l, md07_l, md08_l, md09_l, md10_l, md11_l, skip_l, tp1, tp3);
input hz1843200;
input init;
output int_rqst_l;
output internal_io_l;
input io_pause_l;
input md03_l;
input md04_l;
input md05_l;
input md06_l;
input md07_l;
input md08_l;
input md09_l;
input md10_l;
input md11_l;
output skip_l;
input tp1;
input tp3;

reg gdollar_6_m;
reg hz204800_m;
reg hz409600_m;
reg irq_enable_m;
reg n_t_1x_m;
reg ticked_m;

reg hz50;
reg gdollar_0;
reg gdollar_1;
reg hz100;
reg ck_flag;
reg ticked;
reg irq_enable;
reg hz800;
reg gdollar_2;
reg gdollar_3;
reg hz1600;
reg hz12800;
reg gdollar_4;
reg gdollar_5;
reg hz25600;
reg hz204800;
reg n_t_1x;
reg gdollar_6;
reg hz409600;
// internal nodes 
wire cldi;
wire clie;
wire clsk;
wire do_clsk_l;
wire io6131_l;
wire io6132_l;
wire io6133_l;
wire iopmd03;
wire iopmd04;
wire iopmd06;
wire maybe_clei_l;
wire maybe_clsk_l;
wire maybecldi_l;
wire myiot;
wire mymd09;
wire mymd10;
wire mymd11;
wire n_t_6x;
// code nodes 
// equations 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// e1: sp380n 
assign iopmd06 = ~(io_pause_l
                    | md06_l);
assign iopmd04 = ~(md04_l
                    | io_pause_l);
assign iopmd03 = ~(md03_l
                    | io_pause_l);
// e2: sn7402 
assign cldi = ~(maybecldi_l
                 | mymd09);
assign clie = ~(maybe_clei_l
                 | mymd09);
assign clsk = ~(mymd09
                 | maybe_clsk_l);
// e3: sn7400 
assign maybecldi_l = ~(mymd10 & ~mymd11);
assign maybe_clei_l = ~(~mymd10 & mymd11);
assign maybe_clsk_l = ~(mymd10 & mymd11);
// e4: sn7493 
always @(negedge hz100)
  if (~hz100) begin
    hz50 <= ~hz50;
  end
always @(negedge hz800)
  if (~hz800) begin
    gdollar_0 <= ~gdollar_0;
  end
always @(negedge gdollar_0)
  if (~gdollar_0) begin
    gdollar_1 <= ~gdollar_1;
  end
always @(negedge gdollar_1)
  if (~gdollar_1) begin
    hz100 <= ~hz100;
  end
// e5: sp314n 
assign myiot = ~(iopmd03
                  | iopmd04
                  | iopmd06
                  | md05_l
                  | md07_l
                  | md08_l
                  | io_pause_l);
// e6: sn7410 
assign io6132_l = ~(tp3 & myiot & cldi);
assign do_clsk_l = ~(ck_flag & tp3 & ~io6133_l);
assign io6131_l = ~(myiot & tp3 & clie);
// e7: sn7474 
always @(posedge tp1)
  if (tp1) begin
    ck_flag <= ticked;
  end
// e8: n8881n 
// io_pause_l = io_pause_l; 
// internal_io_l = !myiot; 
// int_rqst_l = !(ck_flag & irq_enable); 
// skip_l = !(!io6133_l & ck_flag); 
// e9: sn7400 
assign io6133_l = ~(myiot & clsk);
// e10: sn7474 
always @(hz50, do_clsk_l, 1'b1)
  if (~do_clsk_l) begin
    ticked_m <= 1'b0;
  end else
  if (~(hz50)) begin
    ticked_m <= 1'b1;
  end
always @(hz50, do_clsk_l, ticked_m)
  if (~do_clsk_l) begin
    ticked <= 1'b0;
  end else
  if (hz50) begin
    ticked <= ticked_m;
  end
always @(init, io6132_l, io6131_l, 1'b0)
  if (~io6132_l) begin
    irq_enable_m <= 1'b0;
  end else
  if (~io6131_l) begin
    irq_enable_m <= 1'b1;
  end else
  if (~(~init)) begin
    irq_enable_m <= 1'b0;
  end
always @(init, io6132_l, io6131_l, irq_enable_m)
  if (~io6132_l) begin
    irq_enable <= 1'b0;
  end else
  if (~io6131_l) begin
    irq_enable <= 1'b1;
  end else
  if (~init) begin
    irq_enable <= irq_enable_m;
  end
// e11: sn7493 
always @(negedge hz1600)
  if (~hz1600) begin
    hz800 <= ~hz800;
  end
always @(negedge hz12800)
  if (~hz12800) begin
    gdollar_2 <= ~gdollar_2;
  end
always @(negedge gdollar_2)
  if (~gdollar_2) begin
    gdollar_3 <= ~gdollar_3;
  end
always @(negedge gdollar_3)
  if (~gdollar_3) begin
    hz1600 <= ~hz1600;
  end
// e12: sp380n 
// e13: sp380n 
assign mymd09 = ~(md09_l
                   | ~myiot);
assign mymd11 = ~(~myiot
                   | md11_l);
assign mymd10 = ~(~myiot
                   | md10_l);
// e14: sn7493 
always @(negedge hz25600)
  if (~hz25600) begin
    hz12800 <= ~hz12800;
  end
always @(negedge hz204800)
  if (~hz204800) begin
    gdollar_4 <= ~gdollar_4;
  end
always @(negedge gdollar_4)
  if (~gdollar_4) begin
    gdollar_5 <= ~gdollar_5;
  end
always @(negedge gdollar_5)
  if (~gdollar_5) begin
    hz25600 <= ~hz25600;
  end
// e15: sn7493 
always @(hz409600, n_t_6x, hz204800)
  if (n_t_6x) begin
    hz204800_m <= 1'b0;
  end else
  if (~(~hz409600)) begin
    hz204800_m <= ~hz204800;
  end
always @(hz409600, n_t_6x, hz204800_m)
  if (n_t_6x) begin
    hz204800 <= 1'b0;
  end else
  if (~hz409600) begin
    hz204800 <= hz204800_m;
  end
always @(hz1843200, n_t_6x, n_t_1x)
  if (n_t_6x) begin
    n_t_1x_m <= 1'b0;
  end else
  if (~(~hz1843200)) begin
    n_t_1x_m <= ~n_t_1x;
  end
always @(hz1843200, n_t_6x, n_t_1x_m)
  if (n_t_6x) begin
    n_t_1x <= 1'b0;
  end else
  if (~hz1843200) begin
    n_t_1x <= n_t_1x_m;
  end
always @(n_t_1x, n_t_6x, gdollar_6)
  if (n_t_6x) begin
    gdollar_6_m <= 1'b0;
  end else
  if (~(~n_t_1x)) begin
    gdollar_6_m <= ~gdollar_6;
  end
always @(n_t_1x, n_t_6x, gdollar_6_m)
  if (n_t_6x) begin
    gdollar_6 <= 1'b0;
  end else
  if (~n_t_1x) begin
    gdollar_6 <= gdollar_6_m;
  end
always @(gdollar_6, n_t_6x, hz409600)
  if (n_t_6x) begin
    hz409600_m <= 1'b0;
  end else
  if (~(~gdollar_6)) begin
    hz409600_m <= ~hz409600;
  end
always @(gdollar_6, n_t_6x, hz409600_m)
  if (n_t_6x) begin
    hz409600 <= 1'b0;
  end else
  if (~gdollar_6) begin
    hz409600 <= hz409600_m;
  end
// e16: sn7408 
assign n_t_6x = (n_t_1x & hz204800);
// r1: r_us_ 
// r7: r_us_ 
// open collector 'wire-or's 
assign int_rqst_l = (ck_flag & irq_enable)? 1'b0: 1'bz;
assign internal_io_l = myiot? ~myiot: 1'bz;
assign skip_l = (~io6133_l & ck_flag)? 1'b0: 1'bz;
endmodule
