{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1758206221974 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II 64-Bit " "Running Quartus II 64-Bit Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition " "Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1758206222038 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Sep 18 07:37:01 2025 " "Processing started: Thu Sep 18 07:37:01 2025" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1758206222038 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1758206222038 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off warv -c warv " "Command: quartus_map --read_settings_files=on --write_settings_files=off warv -c warv" {  } {  } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1758206222039 ""}
{ "Warning" "WQCU_PARALLEL_NO_LICENSE" "" "Parallel compilation is not licensed and has been disabled" {  } {  } 0 20028 "Parallel compilation is not licensed and has been disabled" 1 0 "Quartus II" 0 -1 1758206222421 ""}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "warv.v 1 1 " "Found 1 design units, including 1 entities, in source file warv.v" { { "Info" "ISGN_ENTITY_NAME" "1 warv " "Found entity 1: warv" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 1 -1 0 } }  } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Quartus II" 0 -1 1758206222606 ""}  } {  } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Quartus II" 0 -1 1758206222606 ""}
{ "Info" "ISGN_START_ELABORATION_TOP" "warv " "Elaborating entity \"warv\" for the top level hierarchy" {  } {  } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Quartus II" 0 -1 1758206222761 ""}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "b_dicd_low warv.v(141) " "Verilog HDL or VHDL warning at warv.v(141): object \"b_dicd_low\" assigned a value but never read" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 141 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1758206222769 "|warv"}
{ "Warning" "WVRFX_L2_HDL_OBJECT_ASSIGNED_NOT_READ" "b_load_en_low warv.v(142) " "Verilog HDL or VHDL warning at warv.v(142): object \"b_load_en_low\" assigned a value but never read" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 142 0 0 } }  } 0 10036 "Verilog HDL or VHDL warning at %2!s!: object \"%1!s!\" assigned a value but never read" 0 0 "Quartus II" 0 -1 1758206222769 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y03 warv.v(439) " "Verilog HDL Always Construct warning at warv.v(439): inferring latch(es) for variable \"y03\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 439 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222772 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y02 warv.v(439) " "Verilog HDL Always Construct warning at warv.v(439): inferring latch(es) for variable \"y02\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 439 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222773 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x03 warv.v(446) " "Verilog HDL Always Construct warning at warv.v(446): inferring latch(es) for variable \"x03\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 446 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222773 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x02 warv.v(446) " "Verilog HDL Always Construct warning at warv.v(446): inferring latch(es) for variable \"x02\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 446 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222773 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y07 warv.v(453) " "Verilog HDL Always Construct warning at warv.v(453): inferring latch(es) for variable \"y07\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222774 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y06 warv.v(453) " "Verilog HDL Always Construct warning at warv.v(453): inferring latch(es) for variable \"y06\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222774 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y05 warv.v(453) " "Verilog HDL Always Construct warning at warv.v(453): inferring latch(es) for variable \"y05\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222774 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y04 warv.v(453) " "Verilog HDL Always Construct warning at warv.v(453): inferring latch(es) for variable \"y04\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222774 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x07 warv.v(465) " "Verilog HDL Always Construct warning at warv.v(465): inferring latch(es) for variable \"x07\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222775 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x06 warv.v(465) " "Verilog HDL Always Construct warning at warv.v(465): inferring latch(es) for variable \"x06\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222775 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x05 warv.v(465) " "Verilog HDL Always Construct warning at warv.v(465): inferring latch(es) for variable \"x05\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222775 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x04 warv.v(465) " "Verilog HDL Always Construct warning at warv.v(465): inferring latch(es) for variable \"x04\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222776 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y11 warv.v(476) " "Verilog HDL Always Construct warning at warv.v(476): inferring latch(es) for variable \"y11\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222776 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y10 warv.v(476) " "Verilog HDL Always Construct warning at warv.v(476): inferring latch(es) for variable \"y10\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222776 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y09 warv.v(476) " "Verilog HDL Always Construct warning at warv.v(476): inferring latch(es) for variable \"y09\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222776 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "y08 warv.v(476) " "Verilog HDL Always Construct warning at warv.v(476): inferring latch(es) for variable \"y08\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222777 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x11 warv.v(487) " "Verilog HDL Always Construct warning at warv.v(487): inferring latch(es) for variable \"x11\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222777 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x10 warv.v(487) " "Verilog HDL Always Construct warning at warv.v(487): inferring latch(es) for variable \"x10\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222777 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x09 warv.v(487) " "Verilog HDL Always Construct warning at warv.v(487): inferring latch(es) for variable \"x09\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222778 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "x08 warv.v(487) " "Verilog HDL Always Construct warning at warv.v(487): inferring latch(es) for variable \"x08\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222778 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "int_enable warv.v(527) " "Verilog HDL Always Construct warning at warv.v(527): inferring latch(es) for variable \"int_enable\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 527 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222778 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "device_flag warv.v(532) " "Verilog HDL Always Construct warning at warv.v(532): inferring latch(es) for variable \"device_flag\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 532 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222779 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "dk8ie warv.v(577) " "Verilog HDL Always Construct warning at warv.v(577): inferring latch(es) for variable \"dk8ie\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 577 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222780 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "dk04 warv.v(603) " "Verilog HDL Always Construct warning at warv.v(603): inferring latch(es) for variable \"dk04\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 603 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222780 "|warv"}
{ "Warning" "WVRFX_L2_VERI_ALWAYS_ID_HOLDS_VALUE" "dk8flg warv.v(639) " "Verilog HDL Always Construct warning at warv.v(639): inferring latch(es) for variable \"dk8flg\", which holds its previous value in one or more paths through the always construct" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 639 0 0 } }  } 0 10240 "Verilog HDL Always Construct warning at %2!s!: inferring latch(es) for variable \"%1!s!\", which holds its previous value in one or more paths through the always construct" 0 0 "Quartus II" 0 -1 1758206222781 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dk8flg warv.v(639) " "Inferred latch for \"dk8flg\" at warv.v(639)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 639 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222787 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dk04 warv.v(603) " "Inferred latch for \"dk04\" at warv.v(603)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 603 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222788 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "dk8ie warv.v(577) " "Inferred latch for \"dk8ie\" at warv.v(577)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 577 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222788 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "device_flag warv.v(532) " "Inferred latch for \"device_flag\" at warv.v(532)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 532 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222788 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "int_enable warv.v(527) " "Inferred latch for \"int_enable\" at warv.v(527)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 527 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222789 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x08 warv.v(487) " "Inferred latch for \"x08\" at warv.v(487)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222789 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x09 warv.v(487) " "Inferred latch for \"x09\" at warv.v(487)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222789 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x10 warv.v(487) " "Inferred latch for \"x10\" at warv.v(487)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222789 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x11 warv.v(487) " "Inferred latch for \"x11\" at warv.v(487)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 487 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222789 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y08 warv.v(476) " "Inferred latch for \"y08\" at warv.v(476)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222789 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y09 warv.v(476) " "Inferred latch for \"y09\" at warv.v(476)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222790 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y10 warv.v(476) " "Inferred latch for \"y10\" at warv.v(476)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222790 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y11 warv.v(476) " "Inferred latch for \"y11\" at warv.v(476)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 476 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222790 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x04 warv.v(465) " "Inferred latch for \"x04\" at warv.v(465)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222790 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x05 warv.v(465) " "Inferred latch for \"x05\" at warv.v(465)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222790 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x06 warv.v(465) " "Inferred latch for \"x06\" at warv.v(465)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222790 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x07 warv.v(465) " "Inferred latch for \"x07\" at warv.v(465)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 465 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y04 warv.v(453) " "Inferred latch for \"y04\" at warv.v(453)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y05 warv.v(453) " "Inferred latch for \"y05\" at warv.v(453)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y06 warv.v(453) " "Inferred latch for \"y06\" at warv.v(453)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y07 warv.v(453) " "Inferred latch for \"y07\" at warv.v(453)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 453 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x02 warv.v(446) " "Inferred latch for \"x02\" at warv.v(446)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 446 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "x03 warv.v(446) " "Inferred latch for \"x03\" at warv.v(446)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 446 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222791 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y02 warv.v(439) " "Inferred latch for \"y02\" at warv.v(439)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 439 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222792 "|warv"}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "y03 warv.v(439) " "Inferred latch for \"y03\" at warv.v(439)" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 439 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "Quartus II" 0 -1 1758206222792 "|warv"}
{ "Warning" "WCDB_SGATE_CDB_WARN_LATCH_DISABLED" "device_flag " "LATCH primitive \"device_flag\" is permanently disabled" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 204 -1 0 } }  } 0 14025 "LATCH primitive \"%1!s!\" is permanently disabled" 0 0 "Quartus II" 0 -1 1758206222878 ""}
{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "dly_done_low VCC " "Pin \"dly_done_low\" is stuck at VCC" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 118 -1 0 } }  } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Quartus II" 0 -1 1758206223103 "|warv|dly_done_low"}  } {  } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Quartus II" 0 -1 1758206223103 ""}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "clock " "Promoted clock signal driven by pin \"clock\" to global clock signal" {  } {  } 0 280014 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0 "Quartus II" 0 -1 1758206223131 ""}  } {  } 0 280013 "Promoted pin-driven signal(s) to global signal" 0 0 "Quartus II" 0 -1 1758206223131 ""}
{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "6 " "Design contains 6 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "del_1_low " "No output dependent on input pin \"del_1_low\"" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 72 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1758206223355 "|warv|del_1_low"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "grn_delay " "No output dependent on input pin \"grn_delay\"" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 73 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1758206223355 "|warv|grn_delay"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "ld_del_low " "No output dependent on input pin \"ld_del_low\"" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 75 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1758206223355 "|warv|ld_del_low"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "n_t_35x " "No output dependent on input pin \"n_t_35x\"" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 85 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1758206223355 "|warv|n_t_35x"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "red_delay " "No output dependent on input pin \"red_delay\"" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 87 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1758206223355 "|warv|red_delay"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "set_done " "No output dependent on input pin \"set_done\"" {  } { { "warv.v" "" { Text "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/warv.v" 88 -1 0 } }  } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Quartus II" 0 -1 1758206223355 "|warv|set_done"}  } {  } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Quartus II" 0 -1 1758206223355 ""}
{ "Info" "ICUT_CUT_TM_SUMMARY" "128 " "Implemented 128 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "27 " "Implemented 27 input pins" {  } {  } 0 21058 "Implemented %1!d! input pins" 0 0 "Quartus II" 0 -1 1758206223356 ""} { "Info" "ICUT_CUT_TM_OPINS" "25 " "Implemented 25 output pins" {  } {  } 0 21059 "Implemented %1!d! output pins" 0 0 "Quartus II" 0 -1 1758206223356 ""} { "Info" "ICUT_CUT_TM_BIDIRS" "12 " "Implemented 12 bidirectional pins" {  } {  } 0 21060 "Implemented %1!d! bidirectional pins" 0 0 "Quartus II" 0 -1 1758206223356 ""} { "Info" "ICUT_CUT_TM_MCELLS" "54 " "Implemented 54 macrocells" {  } {  } 0 21063 "Implemented %1!d! macrocells" 0 0 "Quartus II" 0 -1 1758206223356 ""} { "Info" "ICUT_CUT_TM_SEXPS" "10 " "Implemented 10 shareable expanders" {  } {  } 0 21073 "Implemented %1!d! shareable expanders" 0 0 "Quartus II" 0 -1 1758206223356 ""}  } {  } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Quartus II" 0 -1 1758206223356 ""}
{ "Info" "IRDB_WROTE_SUPPRESSED_MSGS" "/home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/output_files/warv.map.smsg " "Generated suppressed messages file /home/vrs/Eagle/projects/DEC/Mxxx/M885/warv/output_files/warv.map.smsg" {  } {  } 0 144001 "Generated suppressed messages file %1!s!" 0 0 "Quartus II" 0 -1 1758206223672 ""}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 37 s Quartus II 64-Bit " "Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 37 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "564 " "Peak virtual memory: 564 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1758206223698 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Sep 18 07:37:03 2025 " "Processing ended: Thu Sep 18 07:37:03 2025" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1758206223698 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1758206223698 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1758206223698 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1758206223698 ""}