Pinlist

Exported from pdp8i-dec.sch at 3/28/2020 11:29:12 PM

EAGLE Version 6.6.0 Copyright (c) 1988-2014 CadSoft

Part     Pad      Pin        Dir      Net

A04      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       MB03_
         E2       E2         in       MB04_
         F2       F2         in       MB05
         H2       H2         in       MB06_
         J2       J2         in       MB07_
         K2       K2         in       MB08_
         L2       L2         out      PWR_SKIP_
         M2       M2         in       IOP2
         N2       N2         out      RESTART
         P2       P2         out      STOP_OK
         R2       R2         out      PWR_LOW_
         S2       S2         in       INITIALIZE_
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U1       U1         out      RESTART_
         U2       U2         in       SHUT_DOWN_

A05      A1       IN1        in       MB10_
         A2       VCC        pwr      VCC
         B1       IN2        in       MB09_
         C1       OUT        out      N$550
         C2       GND        pwr      GND
         D1       IN1        in       +3V(65)
         D2       IN1        in       N$549
         E1       IN2        in       N$548
         E2       IN2        in       N$550
         F1       OUT        out      N$549
         F2       OUT        out      N$551
         H1       IN1        in       N$551
         H2       IN1        in       RIB
         J1       IN2        in       I_IOT_
         J2       IN2        in       S_UF
         K1       OUT        out      N$561
         K2       OUT        out      ME05_
         L1       IN1        in       N$561
         L2       IN1        in       CINT_
         M1       IN2        in       UF
         M2       IN2        in       UINT
         N1       OUT        out      N$563
         N2       OUT        out      N$562
         P1       IN1        in       N$562
         P2       IN1        in       N$566
         R1       IN2        in       N$563
         R2       IN2        in       N$566
         S1       OUT        out      N$564
         S2       OUT        out      UINT_
         T1       GND        pwr      GND
         T2       IN1        in       +3V(66)
         U1       P$1        pas      +3V(62)
         U2       IN2        in       N$552
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      SINT

A06      A1       IN1        in                ***   unused    ***
         A2       VCC        pwr      VCC
         B1       IN2        in                ***   unused    ***
         C1       OUT        out               ***   unused    ***
         C2       GND        pwr      GND
         D1       IN1        in       IOT_
         D2       IN1        in       +3V(65)
         E1       IN2        in       +3V(65)
         E2       IN2        in       OSR_
         F1       OUT        out      IOT
         F2       OUT        out      N$63
         H1       IN1        in       N$63
         H2       IN1        in                ***   unused    ***
         J1       IN2        in       UF_
         J2       IN2        in                ***   unused    ***
         K1       OUT        out      N$70
         K2       OUT        out               ***   unused    ***
         L1       IN1        in       N$451
         L2       IN1        in       N$421
         M1       IN2        in       +3V(67)
         M2       IN2        in       +3V(67)
         N1       OUT        out      B_EXT_INST
         N2       OUT        out      MB06XMB09
         P1       IN1        in       MB07_
         P2       IN1        in       N$420
         R1       IN2        in       MB08_
         R2       IN2        in       +3V(66)
         S1       OUT        out      N$420
         S2       OUT        out      N$422
         T1       GND        pwr      GND
         T2       IN1        in       N$422
         U1       P$1        pas      +3V(65)
         U2       IN2        in       MB06XMB09
         V1       P$1        pas      +3V(67)
         V2       OUT        out      RMF_

A07      A1       1B         in       N$716
         A2       VCC        pwr      VCC
         B1       2B         in       N$713
         C1       4B         in       N$714
         C2       GND        pwr      GND
         D1       8B         in       N$715
         E1       1A         in       MEM00
         F1       2A         in       MEM01
         H1       4A         in       MEM02
         J1       8A         in       MEM03
         K1       ODD        out      N$703
         K2       1B         in       N$718
         L1       EVEN       out      N$702
         L2       2B         in       N$717
         M2       4B         in       N$712
         N2       8B         in       N$719
         P2       1A         in       MEM08
         R2       2A         in       MEM09
         S2       4A         in       MEM10
         T1       GND        pwr      GND
         T2       8A         in       MEM11
         U2       ODD        out      N$707
         V2       EVEN       out      N$706

A08      A1       1B         in       N$702
         A2       VCC        pwr      VCC
         B1       2B         in       N$704
         C1       4B         in       N$706
         C2       GND        pwr      GND
         D1       8B         in       N$720
         E1       1A         in       N$703
         F1       2A         in       N$705
         H1       4A         in       N$707
         J1       8A         in       MEM_P
         K1       ODD        out               *** unconnected ***
         K2       1B         in       N$710
         L1       EVEN       out      MEM_PARITY_EVEN_
         L2       2B         in       N$709
         M2       4B         in       N$708
         N2       8B         in       N$711
         P2       1A         in       MEM04
         R2       2A         in       MEM05
         S2       4A         in       MEM06
         T1       GND        pwr      GND
         T2       8A         in       MEM07
         U2       ODD        out      N$705
         V2       EVEN       out      N$704

A09      A1       1B         in       MB00_
         A2       VCC        pwr      VCC
         B1       2B         in       MB01_
         C1       4B         in       MB02_
         C2       GND        pwr      GND
         D1       8B         in       MB03_
         E1       1A         in       MB00
         F1       2A         in       MB01
         H1       4A         in       MB02
         J1       8A         in       MB03
         K1       ODD        out      N$687
         K2       1B         in       MB08_
         L1       EVEN       out      N$262
         L2       2B         in       MB09_
         M2       4B         in       MB10_
         N2       8B         in       MB11_
         P2       1A         in       MB08
         R2       2A         in       MB09
         S2       4A         in       MB10
         T1       GND        pwr      GND
         T2       8A         in       MB11
         U2       ODD        out      N$692
         V2       EVEN       out      N$691

A10      A1       1B         in       N$262
         A2       VCC        pwr      VCC
         B1       2B         in       N$689
         C1       4B         in       N$691
         C2       GND        pwr      GND
         D1       8B         in       +3V(05)
         E1       1A         in       N$687
         F1       2A         in       N$690
         H1       4A         in       N$692
         J1       8A         in       GND
         K1       ODD        out      MB_PARITY_ODD
         K2       1B         in       MB04_
         L1       EVEN       out               *** unconnected ***
         L2       2B         in       MB05_
         M2       4B         in       MB06_
         N2       8B         in       MB07_
         P2       1A         in       MB04
         R2       2A         in       MB05
         S2       4A         in       MB06
         T1       GND        pwr      GND
         T2       8A         in       MB07
         U2       ODD        out      N$690
         V2       EVEN       out      N$689

A11      A1       IN1        in       MEM_EXT
         A2       VCC        pwr      VCC
         B1       IN2        in       MB11
         C1       OUT        out      N$490
         C2       GND        pwr      GND
         D1       IN1        in       N$459
         D2       IN1        in       RIB
         E1       IN2        in       DF0
         E2       IN2        in       SF0
         F1       OUT        out      N$464
         F2       OUT        out      N$463
         H1       IN1        in       N$460
         H2       IN1        in       N$459
         J1       IN2        in       IF0
         J2       IN2        in       DF1
         K1       OUT        out      N$465
         K2       OUT        out      N$469
         L1       IN1        in       RIB
         L2       IN1        in       N$460
         M1       IN2        in       SF1
         M2       IN2        in       IF1
         N1       OUT        out      N$462
         N2       OUT        out      N$466
         P1       IN1        in       N$459
         P2       IN1        in       RIB
         R1       IN2        in       DF2
         R2       IN2        in       SF2
         S1       OUT        out      N$468
         S2       OUT        out      N$461
         T1       GND        pwr      GND
         T2       IN1        in       N$460
         U1       P$1        pas      +3V(66)
         U2       IN2        in       IF2
         V1       P$1        pas      +3V(09)
         V2       OUT        out      N$467

A12      A1       IN1        in       EXT_GO
         A2       VCC        pwr      VCC
         B1       IN2        in       MB10
         C1       OUT        out      N$497
         C2       GND        pwr      GND
         D1       IN1        in       SR_ENABLE
         D2       IN1        in       N$473
         E1       IN2        in       DFSR0
         E2       IN2        in       MB06
         F1       OUT        out      N$482
         F2       OUT        out      N$481
         H1       IN1        in       SF_ENABLE
         H2       IN1        in       SR_ENABLE
         J1       IN2        in       SF3
         J2       IN2        in       DFSR1
         K1       OUT        out      N$480
         K2       OUT        out      N$478
         L1       IN1        in       N$473
         L2       IN1        in       SF_ENABLE
         M1       IN2        in       MB07
         M2       IN2        in       SF4
         N1       OUT        out      N$477
         N2       OUT        out      N$476
         P1       IN1        in       SR_ENABLE
         P2       IN1        in       N$473
         R1       IN2        in       DFSR2
         R2       IN2        in       MB08
         S1       OUT        out      N$479
         S2       OUT        out      N$474
         T1       GND        pwr      GND
         T2       IN1        in       SF_ENABLE
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       SF5
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$475

A13      A1       IN1        in       MB11_
         A2       VCC        pwr      VCC
         B1       IN2        in       RMF_
         C1       OUT        out      N$493
         C2       GND        pwr      GND
         D1       IN1        in       N$492
         D2       IN1        in       TP3
         E1       IN2        in       +3V(01)
         E2       IN2        in       MEM_EXT
         F1       OUT        out      EXT_GO
         F2       OUT        out      N$492
         H1       IN1        in       +3V(01)
         H2       IN1        in       RIB
         J1       IN2        in       N$490
         J2       IN2        in       SF3
         K1       OUT        out      N$473
         K2       OUT        out      ME09_
         L1       IN1        in       N$470
         L2       IN1        in       RIB
         M1       IN2        in       +3V(01)
         M2       IN2        in       SF4
         N1       OUT        out      ME06_
         N2       OUT        out      ME10_
         P1       IN1        in       N$471
         P2       IN1        in       RIB
         R1       IN2        in       +3V(01)
         R2       IN2        in       SF5
         S1       OUT        out      ME07_
         S2       OUT        out      ME11_
         T1       GND        pwr      GND
         T2       IN1        in       N$472
         U1       P$1        pas      +3V(11)
         U2       IN2        in       +3V(02)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      ME08_

A14      A1       IN1        in       N$452
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(02)
         C1       OUT        out      N$453
         C2       GND        pwr      GND
         D1       IN1        in       N$453
         D2       IN1        in       MB09
         E1       IN2        in       IOT
         E2       IN2        in       MEM_EXT
         F1       OUT        out      MEM_EXT_
         F2       OUT        out      N$454
         H1       IN1        in       MEM_EXT_
         H2       IN1        in       +3V(02)
         J1       IN2        in       +3V(02)
         J2       IN2        in       N$454
         K1       OUT        out      MEM_EXT
         K2       OUT        out      EXT_INST
         L1       IN1        in       +3V(02)
         L2       IN1        in       +3V(03)
         M1       IN2        in       N$455
         M2       IN2        in       N$456
         N1       OUT        out      N$459
         N2       OUT        out      RIB
         P1       IN1        in       +3V(03)
         P2       IN1        in       TP3
         R1       IN2        in       N$457
         R2       IN2        in       N$458
         S1       OUT        out      N$460
         S2       OUT        out      MEM_EXT_AC_LOAD_ENABLE_
         T1       GND        pwr      GND
         T2       IN1        in                ***   unused    ***
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in                ***   unused    ***
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out               ***   unused    ***

A15      A1       IN1        in       IB_TO_IF
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(03)
         C1       OUT        out      N$494
         C2       GND        pwr      GND
         D1       IN1        in       N$494
         D2       IN1        in                ***   unused    ***
         E1       IN2        in       INT_INHIBIT
         E2       IN2        in                ***   unused    ***
         F1       OUT        out      INT_INHIBIT_
         F2       OUT        out               ***   unused    ***
         H1       IN1        in       PC_LOAD
         H2       IN1        in       EXT_GO
         J1       IN2        in       N$425
         J2       IN2        in       N$424
         K1       OUT        out      PC_LOADXSR_ENABLE_
         K2       OUT        out      N$426
         L1       IN1        in       MB10_
         L2       IN1        in       RMF_
         M1       IN2        in       RMF_
         M2       IN2        in       +3V(03)
         N1       OUT        out      N$424
         N2       OUT        out      SF_ENABLE
         P1       IN1        in       +3V(03)
         P2       IN1        in       MB10
         R1       IN2        in       N$423
         R2       IN2        in       MEM_EXT
         S1       OUT        out      MB_TO_IB
         S2       OUT        out      N$423
         T1       GND        pwr      GND
         T2       IN1        in       MB06
         U1       P$1        pas      +3V(01)
         U2       IN2        in       EXT_INST
         V1       P$1        pas      +3V(02)
         V2       OUT        out      N$421

A16      A1       IN1        in       IF_ENABLE
         A2       VCC        pwr      VCC
         B1       IN2        in       IF0
         C1       OUT        out      N$411
         C2       GND        pwr      GND
         D1       IN1        in       DF_ENABLE
         D2       IN1        in       BF_ENABLE
         E1       IN2        in       DF0
         E2       IN2        in       BF0
         F1       OUT        out      N$410
         F2       OUT        out      N$409
         H1       IN1        in       IF_ENABLE
         H2       IN1        in       DF_ENABLE
         J1       IN2        in       IF1
         J2       IN2        in       DF1
         K1       OUT        out      N$413
         K2       OUT        out      N$414
         L1       IN1        in       BF_ENABLE
         L2       IN1        in       IF_ENABLE
         M1       IN2        in       BF1
         M2       IN2        in       IF2
         N1       OUT        out      N$415
         N2       OUT        out      N$416
         P1       IN1        in       DF_ENABLE
         P2       IN1        in       BF_ENABLE
         R1       IN2        in       DF2
         R2       IN2        in       BF2
         S1       OUT        out      N$417
         S2       OUT        out      N$418
         T1       GND        pwr      GND
         T2       IN1        in       F_SET_
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       E_SET_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$445

A17      A1       IN1        in       PC_LOADXSR_ENABLE_
         A2       VCC        pwr      VCC
         B1       IN2        in       N$447
         C1       OUT        out      IB_TO_IF
         C2       GND        pwr      GND
         D1       IN1        in       JMP_
         D2       IN1        in       N$429
         E1       IN2        in       JMS_
         E2       IN2        in       N$439
         F1       OUT        out      N$446
         F2       OUT        out      N$444
         H1       IN1        in       KEY_LAMFTS0_
         H2       IN1        in       N$430
         J1       IN2        in       IB0
         J2       IN2        in       N$440
         K1       OUT        out      N$439
         K2       OUT        out      N$443
         L1       IN1        in       KEY_LAMFTS0_
         L2       IN1        in       N$433
         M1       IN2        in       IB1
         M2       IN2        in       N$441
         N1       OUT        out      N$440
         N2       OUT        out      N$442
         P1       IN1        in       KEY_LAMFTS0_
         P2       IN1        in       N$491
         R1       IN2        in       IB2
         R2       IN2        in       PC_LOADXSR_ENABLE_
         S1       OUT        out      N$441
         S2       OUT        out      N$489
         T1       GND        pwr      GND
         T2       IN1        in       N$493
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       EXT_GO
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$491

A18      A1       IN1        in       PC_LOADXSR_ENABLE_
         A2       VCC        pwr      VCC
         B1       IN2        in       N$426
         C1       OUT        out      LOAD_IB
         C2       GND        pwr      GND
         D1       IN1        in       SR_ENABLE
         D2       IN1        in       MB_TO_IB
         E1       IN2        in       IFSR0
         E2       IN2        in       MB06
         F1       OUT        out      N$429
         F2       OUT        out      N$427
         H1       IN1        in       SF_ENABLE
         H2       IN1        in       SR_ENABLE
         J1       IN2        in       SF0
         J2       IN2        in       IFSR1
         K1       OUT        out      N$428
         K2       OUT        out      N$430
         L1       IN1        in       MB_TO_IB
         L2       IN1        in       SF_ENABLE
         M1       IN2        in       MB07
         M2       IN2        in       SF1
         N1       OUT        out      N$431
         N2       OUT        out      N$432
         P1       IN1        in       SR_ENABLE
         P2       IN1        in       MB_TO_IB
         R1       IN2        in       IFSR2
         R2       IN2        in       MB08
         S1       OUT        out      N$433
         S2       OUT        out      N$434
         T1       GND        pwr      GND
         T2       IN1        in       SF_ENABLE
         U1       P$1        pas      +3V(03)
         U2       IN2        in       SF2
         V1       P$1        pas      +3V(04)
         V2       OUT        out      N$435

A19      A1       IN1        in       WC_SET_
         A2       VCC        pwr      VCC
         B1       IN2        in       WORD_COUNT_
         C1       OUT        out      N$263
         C2       GND        pwr      GND
         D1       IN1        in       +3V(04)
         D2       IN1        in       +3V(04)
         E1       IN2        in       N$263
         E2       IN2        in       B_SET
         F1       OUT        out      N$403
         F2       OUT        out      B_SET_
         H1       IN1        in       N$408
         H2       IN1        in       KEY_STEXDP
         J1       IN2        in       TS4_
         J2       IN2        in       MFTP1
         K1       OUT        out      N$412
         K2       OUT        out      N$408
         L1       IN1        in       TP3
         L2       IN1        in       +3V(04)
         M1       IN2        in       B_SET
         M2       IN2        in       N$407
         N1       OUT        out      N$407
         N2       OUT        out      LOAD_BF
         P1       IN1        in       N$53
         P2       IN1        in       N$53
         R1       IN2        in       LOAD_SF_
         R2       IN2        in       LOAD_SF_
         S1       OUT        out      IF_TO_SF
         S2       OUT        out      N$264
         T1       GND        pwr      GND
         T2       IN1        in       +3V(04)
         U1       P$1        pas      +3V(19)
         U2       IN2        in       KEY_LAMFTS0_
         V1       P$1        pas      +3V(20)
         V2       OUT        out      N$425

A20      A1       IN1        in       N$445
         A2       VCC        pwr      VCC
         B1       IN2        in       TP3
         C1       IN3        in       N$446
         C2       GND        pwr      GND
         D1       OUT        out      N$447
         D2       IN1        in       N$464
         E1       IN1        in       N$469
         E2       IN2        in       N$463
         F1       IN2        in       N$462
         F2       IN3        in       N$465
         H1       IN3        in       N$466
         H2       OUT        out      N$470
         J1       OUT        out      N$471
         J2       IN1        in       N$468
         K1       IN1        in       B_EXT_INST
         K2       IN2        in       N$461
         L1       IN2        in       MB07_
         L2       IN3        in       N$467
         M1       IN3        in       MB08
         M2       OUT        out      N$472
         N1       OUT        out      N$455
         N2       IN1        in       B_EXT_INST
         P1       IN1        in       B_EXT_INST
         P2       IN2        in       MB08
         R1       IN2        in       MB07
         R2       IN3        in       MB07
         S1       IN3        in       MB08_
         S2       OUT        out      N$456
         T1       GND        pwr      GND
         T2       IN1        in       N$455
         U1       OUT        out      N$457
         U2       IN2        in       N$456
         V1       OUT        out      N$458
         V2       IN3        in       N$457

A21      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$277
         F1       OUT        out      N$282
         H1       IN         in       N$281
         H2       H2         in       N$274
         J1       OUT        out      N$283
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out      N$277
         M2       M2         out               *** unconnected ***
         N2       N2         out      N$281
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

A22      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$284
         F1       OUT        out      N$285
         H1       IN         in                ***   unused    ***
         H2       H2         in       N$283
         J1       OUT        out               ***   unused    ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out      N$284
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

A23      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$293
         F1       OUT        out      N$297
         H1       IN         in       N$275
         H2       H2         in       N$292
         J1       OUT        out      N$294
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out      N$293
         N2       N2         out      N$275
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

A24      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$295
         F1       OUT        out      MEM_FINISH
         H1       IN         in                ***   unused    ***
         H2       H2         in       N$294
         J1       OUT        out               ***   unused    ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out      N$295
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

A25      B2       P$1        pas               ***   unused    ***
         C2       P$2        pas               ***   unused    ***
         D2       P$2        pas               ***   unused    ***
         E2       P$2        pas      -6V
         F2       P$1        pas               ***   unused    ***
         H2       P$1        pas      GND
         J2       P$3        pas               ***   unused    ***
         K2       P$1        pas      N$503
         L2       P$1        pas      N$502
         M2       P$1        pas      N$501
         N2       P$1        pas      N$500
         P2       P$2        pas      N$495
         R2       P$2        pas      N$496
         S2       P$2        pas      N$498
         T2       P$2        pas      N$499
         U2       P$2        pas               ***   unused    ***
         V2       P$1        pas               ***   unused    ***

A26      B2       P$1        pas               ***   unused    ***
         C2       P$2        pas               ***   unused    ***
         D2       P$2        pas               ***   unused    ***
         E2       P$2        pas      -6V
         F2       P$1        pas               ***   unused    ***
         H2       P$1        pas      GND
         J2       P$3        pas               ***   unused    ***
         K2       P$1        pas      N$513
         L2       P$1        pas      N$512
         M2       P$1        pas      N$511
         N2       P$1        pas      N$510
         P2       P$2        pas      N$506
         R2       P$2        pas      N$507
         S2       P$2        pas      N$508
         T2       P$2        pas      N$509
         U2       P$2        pas               ***   unused    ***
         V2       P$1        pas               ***   unused    ***

A27      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       MB01_
         D2       D2         in       MB00_
         E1       E1         pas      N$501
         E2       E2         in       B_FIELD
         F1       H          in       N$496
         F2       F2         pas      N$500
         H1       J          pas      N$522
         H2       H          in       N$495
         J1       K          pas      N$523
         J2       J          pas      N$504
         K1       K1         pas      -6V
         K2       K          pas      N$505
         L1       L1         in       MB03_
         L2       L2         pas      -6V
         M1       M1         pas      N$503
         M2       M2         in       MB02_
         N1       H          in       N$499
         N2       N2         in       B_FIELD
         P1       J          pas      N$526
         P2       P2         pas      N$502
         R1       K          pas      N$527
         R2       H          in       N$498
         S1       S1         pas      -6V
         S2       J          pas      N$524
         T1       GND        pwr      GND
         T2       K          pas      N$525
         U2       U2         pas      -6V
         V2       V2         in       -30V

A30      A1       A1         oc       MEM_P
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$351
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$352
         F2       F2         in                *** unconnected ***
         H2       H2         in                *** unconnected ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$365
         M1       M1         in       N$366
         N1       N1         in                *** unconnected ***
         P1       P1         in                *** unconnected ***
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc                *** unconnected ***

A31      A1       A1         oc       MEM00
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$353
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$354
         F2       F2         in       N$367
         H2       H2         in       N$368
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$355
         M1       M1         in       N$356
         N1       N1         in       N$369
         P1       P1         in       N$370
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc       MEM01

A32      A1       A1         oc       MEM02
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$357
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$358
         F2       F2         in       N$371
         H2       H2         in       N$372
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$359
         M1       M1         in       N$360
         N1       N1         in       N$373
         P1       P1         in       N$374
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc       MEM03

A33      A1       A1         oc       MEM04
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$361
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$362
         F2       F2         in       N$375
         H2       H2         in       N$376
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$363
         M1       M1         in       N$364
         N1       N1         in       N$377
         P1       P1         in       N$378
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc       MEM05

A36      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       MB01_
         D2       D2         in       MB00_
         E1       E1         pas      N$302
         E2       E2         in       B_FIELD_
         F1       H          in       N$301
         F2       F2         pas      N$299
         H1       J          pas      N$329
         H2       H          in       N$300
         J1       K          pas      N$330
         J2       J          pas      N$327
         K1       K1         pas      -6V
         K2       K          pas      N$328
         L1       L1         in       MB03_
         L2       L2         pas      -6V
         M1       M1         pas      N$306
         M2       M2         in       MB02_
         N1       H          in       N$305
         N2       N2         in       B_FIELD_
         P1       J          pas      N$333
         P2       P2         pas      N$304
         R1       K          pas      N$334
         R2       H          in       N$303
         S1       S1         pas      -6V
         S2       J          pas      N$331
         T1       GND        pwr      GND
         T2       K          pas      N$332
         U2       U2         pas      -6V
         V2       V2         in       -30V

A37      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in                *** unconnected ***
         D2       D2         in       MB_PARITY_ODD
         E1       E1         pas               *** unconnected ***
         E2       E2         in       B_FIELD_
         F1       H          in                ***   unused    ***
         F2       F2         pas      N$308
         H1       J          pas               ***   unused    ***
         H2       H          in       N$307
         J1       K          pas               ***   unused    ***
         J2       J          pas      N$325
         K1       K1         pas               *** unconnected ***
         K2       K          pas      N$326
         L1       L1         in                *** unconnected ***
         L2       L2         pas      -6V
         M1       M1         pas               *** unconnected ***
         M2       M2         in       MB_PARITY_ODD
         N1       H          in                ***   unused    ***
         N2       N2         in       B_FIELD
         P1       J          pas               ***   unused    ***
         P2       P2         pas      N$544
         R1       K          pas               ***   unused    ***
         R2       H          in       N$545
         S1       S1         pas               *** unconnected ***
         S2       J          pas      N$546
         T1       GND        pwr      GND
         T2       K          pas      N$547
         U2       U2         pas               *** unconnected ***
         V2       V2         in       -30V

A38      B2       P$1        pas      -15V
         C2       P$2        pas      GND
         D2       P$2        pas      Y_RW_RETURN
         E2       P$2        pas      GND
         F2       P$1        pas      N$276
         H2       P$1        pas      -6V
         J2       P$3        pas      -6V
         K2       P$1        pas      N$306
         L2       P$1        pas      N$304
         M2       P$1        pas      N$302
         N2       P$1        pas      N$299
         P2       P$2        pas      N$300
         R2       P$2        pas      N$301
         S2       P$2        pas      N$303
         T2       P$2        pas      N$305
         U2       P$2        pas      -6V
         V2       P$1        pas      -6V

A39      B2       P$1        pas      -15V
         C2       P$2        pas      GND
         D2       P$2        pas      X_RW_SOURCE
         E2       P$2        pas      -6V
         F2       P$1        pas      N$278
         H2       P$1        pas      -30V
         J2       P$3        pas      -6V
         K2       P$1        pas               ***   unused    ***
         L2       P$1        pas      N$544
         M2       P$1        pas      -30V
         N2       P$1        pas      N$308
         P2       P$2        pas      N$307
         R2       P$2        pas      NEG_CLAMP
         S2       P$2        pas      N$545
         T2       P$2        pas               ***   unused    ***
         U2       P$2        pas      -6V
         V2       P$1        pas      -6V

A40      A1       P$2        io                ***   unused    ***
         A2       P$2        io       VCC
         B1       P$2        io                ***   unused    ***
         B2       P$2        io                ***   unused    ***
         C1       P$2        io                ***   unused    ***
         C2       P$2        io       GND
         D1       P$2        io                ***   unused    ***
         D2       P$2        io       DFSR0
         E1       P$2        io                ***   unused    ***
         E2       P$2        io       DFSR1
         F1       P$2        io                ***   unused    ***
         F2       P$2        io       DFSR2
         H1       P$2        io                ***   unused    ***
         H2       P$2        io       IFSR0
         J1       P$2        io                ***   unused    ***
         J2       P$2        io       IFSR1
         K1       P$2        io                ***   unused    ***
         K2       P$2        io       IFSR2
         L1       P$2        io                ***   unused    ***
         L2       P$2        io       SR00
         M1       P$2        io                ***   unused    ***
         M2       P$2        io       SR01
         N1       P$2        io                ***   unused    ***
         N2       P$2        io                ***   unused    ***
         P1       P$2        io                ***   unused    ***
         P2       P$2        io                ***   unused    ***
         R1       P$2        io                ***   unused    ***
         R2       P$2        io       SR02
         S1       P$2        io                ***   unused    ***
         S2       P$2        io       SR03
         T1       P$2        io                ***   unused    ***
         T2       P$2        io       SR04
         U1       P$2        io                ***   unused    ***
         U2       P$2        io       SR05
         V1       P$2        io                ***   unused    ***
         V2       P$2        io       SR06

AB01     AE2      -30V       sup      -30V
         AF2      -30V       pwr      -30V
         AH2      -30V       pwr      -30V
         AJ2      -30V       pwr      -30V
         AK2      -30V       pwr      -30V
         AL2      -30V       pwr      -30V
         AM2      -30V       pwr      -30V
         AN2      -30V       pwr      -30V
         AP2      GND        pwr      GND
         AR2      GND        pwr      GND
         AS2      GND        pwr      GND
         AT2      GND        pwr      GND
         AU2      GND        pwr      GND
         AV2      AV2        in       N$269
         BC2      GND        sup      GND
         BD2      GND        pwr      GND
         BE2      GND        pwr      GND
         BF2      GND        pwr      GND
         BH2      GND        pwr      GND
         BJ2      GND        pwr      GND
         BK2      GND        pwr      GND
         BL2      GND        pwr      GND
         BM2      -6V        sup      -6V
         BN2      -6V        pwr      -6V
         BP2      -6V        pwr      -6V
         BR2      -6V        pwr      -6V
         BS2      -6V        pwr      -6V
         BT2      -6V        pwr      -6V
         BU2      -6V        pwr      -6V
         BV2      -6V        pwr      -6V

AB02     AA2      VCC        pwr      VCC
         AB2      -15V       pwr      -15V
         AC2      GND        pwr      GND
         AF2      AF2        out      SHUT_DOWN_
         AH2      AH2        in       STOP_OK
         AJ2      AJ2        io       POWER_OK_
         AS2      AS2        io       POWER_CLEAR_
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BJ2      BJ2        out      N$269
         BK2      BK2        pas      N$269
         BM2      -6V        sup      -6V
         BR2      BR2        pas      N$268
         BS2      BS2        pas      N$267
         BV2      -30V       sup      -30V

AB03     AD1      GND        pwr      GND
         AD2      VCC        pwr      VCC
         AE1      GND        pwr      GND
         AE2      VCC        pwr      VCC
         AF1      GND        pwr      GND
         AF2      VCC        pwr      VCC
         AH1      GND        pwr      GND
         AH2      VCC        pwr      VCC
         AJ1      GND        pwr      GND
         AJ2      VCC        pwr      VCC
         AK1      GND        pwr      GND
         AK2      VCC        pwr      VCC
         AL1      GND        pwr      GND
         AL2      VCC        pwr      VCC
         AM1      GND        pwr      GND
         AM2      VCC        pwr      VCC
         AN1      GND        pwr      GND
         AN2      VCC        pwr      VCC
         AP1      GND        pwr      GND
         AP2      VCC        pwr      VCC
         AR1      GND        pwr      GND
         AR2      VCC        pwr      VCC
         AS1      GND        pwr      GND
         AS2      VCC        pwr      VCC
         AT1      GND        pwr      GND
         AT2      VCC        pwr      VCC
         AU1      GND        pwr      GND
         AU2      VCC        pwr      VCC
         AV1      GND        pwr      GND
         AV2      VCC        pwr      VCC
         BD1      GND        pwr      GND
         BD2      VCC        pwr      VCC
         BE1      GND        pwr      GND
         BE2      VCC        pwr      VCC
         BF1      GND        pwr      GND
         BF2      VCC        pwr      VCC
         BH1      GND        pwr      GND
         BH2      VCC        pwr      VCC
         BJ1      GND        pwr      GND
         BJ2      VCC        pwr      VCC
         BK1      GND        pwr      GND
         BK2      -15V       pwr      -15V
         BL1      GND        pwr      GND
         BL2      -15V       pwr      -15V
         BM1      GND        pwr      GND
         BM2      -15V       pwr      -15V
         BN1      GND        pwr      GND
         BN2      -15V       pwr      -15V
         BP1      GND        pwr      GND
         BP2      -15V       pwr      -15V
         BR1      GND        pwr      GND
         BR2      -15V       pwr      -15V
         BS1      GND        pwr      GND
         BS2      -15V       pwr      -15V
         BT1      GND        pwr      GND
         BT2      -15V       pwr      -15V
         BU1      GND        pwr      GND
         BU2      -15V       pwr      -15V
         BV1      GND        pwr      GND
         BV2      -15V       pwr      -15V

AB28     AA2      P$2        pas               ***   unused    ***
         AB2      P$2        pas               ***   unused    ***
         AC2      P$2        pas      N$532
         AD2      P$2        pas      N$533
         AE2      P$2        pas      N$534
         AF2      P$2        pas      N$535
         AH2      P$2        pas      N$536
         AJ2      P$2        pas      N$537
         AK2      P$2        pas      N$538
         AL2      P$2        pas      N$539
         AM2      P$2        pas      N$540
         AN2      P$2        pas      N$541
         AP2      P$2        pas      N$542
         AR2      P$2        pas      N$543
         AS2      P$2        pas      N$546
         AT2      P$2        pas      N$547
         AU2      P$2        pas               ***   unused    ***
         AV2      P$2        pas               ***   unused    ***
         BA2      P$2        pas               ***   unused    ***
         BB2      P$2        pas               ***   unused    ***
         BC2      P$2        pas      N$504
         BD2      P$2        pas      N$505
         BE2      P$2        pas      N$522
         BF2      P$2        pas      N$523
         BH2      P$2        pas      N$524
         BJ2      P$2        pas      N$525
         BK2      P$2        pas      N$526
         BL2      P$2        pas      N$527
         BM2      P$2        pas      N$528
         BN2      P$2        pas      N$529
         BP2      P$2        pas      N$530
         BR2      P$2        pas      N$531
         BS2      P$2        pas               ***   unused    ***
         BT2      P$2        pas               ***   unused    ***
         BU2      P$2        pas               ***   unused    ***
         BV2      P$2        pas               ***   unused    ***

AB29     AA2      P$2        pas               ***   unused    ***
         AB2      P$2        pas               ***   unused    ***
         AC2      P$2        pas      N$367
         AD2      P$2        pas      N$368
         AE2      P$2        pas      N$369
         AF2      P$2        pas      N$370
         AH2      P$2        pas      N$371
         AJ2      P$2        pas      N$372
         AK2      P$2        pas      N$373
         AL2      P$2        pas      N$374
         AM2      P$2        pas      N$375
         AN2      P$2        pas      N$376
         AP2      P$2        pas      N$377
         AR2      P$2        pas      N$378
         AS2      P$2        pas      N$365
         AT2      P$2        pas      N$366
         AU2      P$2        pas               ***   unused    ***
         AV2      P$2        pas               ***   unused    ***
         BA2      P$2        pas               ***   unused    ***
         BB2      P$2        pas               ***   unused    ***
         BC2      P$2        pas      N$391
         BD2      P$2        pas      N$392
         BE2      P$2        pas      N$393
         BF2      P$2        pas      N$394
         BH2      P$2        pas      N$395
         BJ2      P$2        pas      N$396
         BK2      P$2        pas      N$397
         BL2      P$2        pas      N$398
         BM2      P$2        pas      N$399
         BN2      P$2        pas      N$400
         BP2      P$2        pas      N$401
         BR2      P$2        pas      N$402
         BS2      P$2        pas               ***   unused    ***
         BT2      P$2        pas               ***   unused    ***
         BU2      P$2        pas               ***   unused    ***
         BV2      P$2        pas               ***   unused    ***

AB34     AA2      P$2        pas               ***   unused    ***
         AB2      P$2        pas               ***   unused    ***
         AC2      P$2        pas      N$353
         AD2      P$2        pas      N$354
         AE2      P$2        pas      N$355
         AF2      P$2        pas      N$356
         AH2      P$2        pas      N$357
         AJ2      P$2        pas      N$358
         AK2      P$2        pas      N$359
         AL2      P$2        pas      N$360
         AM2      P$2        pas      N$361
         AN2      P$2        pas      N$362
         AP2      P$2        pas      N$363
         AR2      P$2        pas      N$364
         AS2      P$2        pas      N$351
         AT2      P$2        pas      N$352
         AU2      P$2        pas               ***   unused    ***
         AV2      P$2        pas               ***   unused    ***
         BA2      P$2        pas               ***   unused    ***
         BB2      P$2        pas               ***   unused    ***
         BC2      P$2        pas      N$387
         BD2      P$2        pas      N$388
         BE2      P$2        pas      N$389
         BF2      P$2        pas      N$390
         BH2      P$2        pas      N$386
         BJ2      P$2        pas      N$385
         BK2      P$2        pas      N$383
         BL2      P$2        pas      N$384
         BM2      P$2        pas      N$381
         BN2      P$2        pas      N$382
         BP2      P$2        pas      N$379
         BR2      P$2        pas      N$380
         BS2      P$2        pas               ***   unused    ***
         BT2      P$2        pas               ***   unused    ***
         BU2      P$2        pas               ***   unused    ***
         BV2      P$2        pas               ***   unused    ***

AB35     AA2      P$2        pas               ***   unused    ***
         AB2      P$2        pas               ***   unused    ***
         AC2      P$2        pas      N$327
         AD2      P$2        pas      N$328
         AE2      P$2        pas      N$329
         AF2      P$2        pas      N$330
         AH2      P$2        pas      N$331
         AJ2      P$2        pas      N$332
         AK2      P$2        pas      N$333
         AL2      P$2        pas      N$334
         AM2      P$2        pas      N$335
         AN2      P$2        pas      N$336
         AP2      P$2        pas      N$337
         AR2      P$2        pas      N$338
         AS2      P$2        pas      N$325
         AT2      P$2        pas      N$326
         AU2      P$2        pas               ***   unused    ***
         AV2      P$2        pas               ***   unused    ***
         BA2      P$2        pas               ***   unused    ***
         BB2      P$2        pas               ***   unused    ***
         BC2      P$2        pas      N$349
         BD2      P$2        pas      N$350
         BE2      P$2        pas      N$348
         BF2      P$2        pas      N$347
         BH2      P$2        pas      N$346
         BJ2      P$2        pas      N$345
         BK2      P$2        pas      N$344
         BL2      P$2        pas      N$343
         BM2      P$2        pas      N$342
         BN2      P$2        pas      N$341
         BP2      P$2        pas      N$340
         BR2      P$2        pas      N$339
         BS2      P$2        pas      N$268
         BT2      P$2        pas      N$267
         BU2      P$2        pas               ***   unused    ***
         BV2      P$2        pas               ***   unused    ***

B04      A1       IN1        in       MB07_
         A2       VCC        pwr      VCC
         B1       IN2        in       MB08_
         C1       IN3        in       B_EXT_INST
         C2       GND        pwr      GND
         D1       OUT        out      CINT_
         D2       IN1        in       MB11_
         E1       IN1        in       MB08
         E2       IN2        in       OP2
         F1       IN2        in       MB06XMB09
         F2       IN3        in       +3V(64)
         H1       IN3        in       MB07_
         H2       OUT        out      N$548
         J1       OUT        out      N$552
         J2       IN1        in       UINT
         K1       IN1        in       TP2E_
         K2       IN2        in       TP3
         L1       IN2        in       TP2E_
         L2       IN3        in       SINT
         M1       IN3        in       PC_LOAD_
         M2       OUT        out      N$567
         N1       OUT        out      N$569
         N2       IN1        in                ***   unused    ***
         P1       IN1        in       N$563
         P2       IN2        in                ***   unused    ***
         R1       IN2        in       N$563
         R2       IN3        in                ***   unused    ***
         S1       IN3        in       N$565
         S2       OUT        out               ***   unused    ***
         T1       GND        pwr      GND
         T2       IN1        in       USF_
         U1       OUT        out      N$566
         U2       IN2        in       SKIP_
         V1       OUT        out      SKIP_OR
         V2       IN3        in       +3V(67)

B05      A1       R          in       CLEAR_IF_
         A2       VCC        pwr      VCC
         B1       C          in       N$558
         C1       D          in       N$556
         C2       GND        pwr      GND
         D1       S          in       +3V(64)
         D2       C          in       IB_TO_IF
         E1       1          out      UB
         E2       D          in       N$560
         F1       0          out               *** unconnected ***
         F2       S          in       +3V(65)
         H1       C          in                ***   unused    ***
         H2       1          out      UF
         J1       D          in                ***   unused    ***
         J2       0          out      UF_
         K1       S          in                ***   unused    ***
         K2       R          in       INITIALIZE_
         L1       1          out               ***   unused    ***
         L2       C          in       TP3
         M1       0          out               ***   unused    ***
         M2       D          in       N$564
         N1       C          in       IF_TO_SF
         N2       S          in       +3V(65)
         P1       D          in       UF
         P2       1          out      UINT
         R1       S          in       +3V(63)
         R2       0          out      N$565
         S1       1          out      S_UF
         S2       C          in       N$569
         T1       GND        pwr      GND
         T2       D          in       GND
         U1       0          out               *** unconnected ***
         U2       S          in       N$567
         V1       0          out      USF_
         V2       1          out               *** unconnected ***

B06      A1       IN1        in       MB07
         A2       VCC        pwr      VCC
         B1       IN2        in       MB06XMB09
         C1       OUT        out      CUF_
         C2       GND        pwr      GND
         D1       IN1        in       CUF_
         D2       IN1        in       EXT_GO
         E1       IN2        in       RMF_
         E2       IN2        in       N$553
         F1       OUT        out      N$553
         F2       OUT        out      N$557
         H1       IN1        in       PC_LOADXSR_ENABLE_
         H2       IN1        in       CUF_
         J1       IN2        in       N$557
         J2       IN2        in       +3V(62)
         K1       OUT        out      N$558
         K2       OUT        out      CUF
         L1       IN1        in       CUF
         L2       IN1        in       N$554
         M1       IN2        in       MB08
         M2       IN2        in       N$555
         N1       OUT        out      N$554
         N2       OUT        out      N$556
         P1       IN1        in       S_UF
         P2       IN1        in       UB
         R1       IN2        in       SF_ENABLE
         R2       IN2        in       KEY_LAMFTS0_
         S1       OUT        out      N$555
         S2       OUT        out      N$559
         T1       GND        pwr      GND
         T2       IN1        in       N$559
         U1       P$1        pas      +3V(64)
         U2       IN2        in       +3V(63)
         V1       P$1        pas      +3V(63)
         V2       OUT        out      N$560

B07      A1       IN1        in       MB03_
         A2       VCC        pwr      VCC
         B1       IN2        in       MB04_
         C1       IN3        in       MB05
         C2       GND        pwr      GND
         D1       OUT        out      N$693
         D2       IN1        in       MB06_
         E1       IN1        in       IOP4
         E2       IN2        in       MB07_
         F1       IN2        in       +3V(07)
         F2       IN3        in       MB08_
         H1       IN3        in       N$697
         H2       OUT        out      N$694
         J1       OUT        out      N$699
         J2       IN1        in       N$697
         K1       IN1        in       +3V(07)
         K2       IN2        in       IOP1
         L1       IN2        in       INITIALIZE_
         L2       IN3        in       MP_INT_
         M1       IN3        in       N$699
         M2       OUT        out      MP_SKIP_
         N1       OUT        out      N$700
         N2       IN1        in       N$700
         P1       IN1        in                ***   unused    ***
         P2       IN2        in       +3V(07)
         R1       IN2        in                ***   unused    ***
         R2       IN3        in       +3V(07)
         S1       IN3        in                ***   unused    ***
         S2       OUT        out      CLR_PARITY_ERROR_
         T1       GND        pwr      GND
         T2       IN1        in                ***   unused    ***
         U1       OUT        out               ***   unused    ***
         U2       IN2        in                ***   unused    ***
         V1       OUT        out               ***   unused    ***
         V2       IN3        in                ***   unused    ***

B08      A1       IN1        in       MEM03
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(05)
         C1       OUT        out      N$715
         C2       GND        pwr      GND
         D1       IN1        in       MEM02
         D2       IN1        in       MEM01
         E1       IN2        in       +3V(05)
         E2       IN2        in       +3V(05)
         F1       OUT        out      N$714
         F2       OUT        out      N$713
         H1       IN1        in       MEM00
         H2       IN1        in       MEM07
         J1       IN2        in       +3V(05)
         J2       IN2        in       +3V(05)
         K1       OUT        out      N$716
         K2       OUT        out      N$711
         L1       IN1        in       MEM06
         L2       IN1        in       MEM05
         M1       IN2        in       +3V(05)
         M2       IN2        in       +3V(05)
         N1       OUT        out      N$708
         N2       OUT        out      N$709
         P1       IN1        in       MEM04
         P2       IN1        in       MEM11
         R1       IN2        in       +3V(06)
         R2       IN2        in       +3V(06)
         S1       OUT        out      N$710
         S2       OUT        out      N$719
         T1       GND        pwr      GND
         T2       IN1        in       MEM10
         U1       P$1        pas      +3V(05)
         U2       IN2        in       +3V(06)
         V1       P$1        pas      MEM_P
         V2       OUT        out      N$712

B09      A1       IN1        in       MEM09
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(06)
         C1       OUT        out      N$717
         C2       GND        pwr      GND
         D1       IN1        in       MEM08
         D2       IN1        in       +3V(06)
         E1       IN2        in       +3V(06)
         E2       IN2        in       MEM_P
         F1       OUT        out      N$718
         F2       OUT        out      N$720
         H1       IN1        in       N$693
         H2       IN1        in       +3V(06)
         J1       IN2        in       +3V(07)
         J2       IN2        in       N$694
         K1       OUT        out      N$695
         K2       OUT        out      N$696
         L1       IN1        in       N$695
         L2       IN1        in       N$698
         M1       IN2        in       N$696
         M2       IN2        in       +3V(07)
         N1       OUT        out      N$698
         N2       OUT        out      N$697
         P1       IN1        in       CLR_PARITY_ERROR_
         P2       IN1        in       MP_INT_
         R1       IN2        in       MP_INT
         R2       IN2        in       N$701
         S1       OUT        out      MP_INT_
         S2       OUT        out      MP_INT
         T1       GND        pwr      GND
         T2       IN1        in       TP3
         U1       P$1        pas      +3V(06)
         U2       IN2        in       MEM_PARITY_EVEN_
         V1       P$1        pas      +3V(07)
         V2       OUT        out      N$701

B10      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         oc       MEM_DONE_
         E2       E2         oc       STROBE_
         J2       J2         in       RUN
         S2       IN1        in                ***   unused    ***
         T2       IN2        in                ***   unused    ***
         U2       OUT        out               ***   unused    ***
         V2       V2         in       TP3

B11      A1       R          in       +3V(08)
         A2       VCC        pwr      VCC
         B1       C          in       N$412
         C1       D          in       IF_ENABLE_
         C2       GND        pwr      GND
         D1       S          in       MANUAL_PRESET_
         D2       C          in       N$412
         E1       1          out               *** unconnected ***
         E2       D          in       DF_ENABLE_
         F1       0          out      IF_ENABLE
         F2       S          in       MANUAL_PRESET_
         H1       C          in       N$412
         H2       1          out               *** unconnected ***
         J1       D          in       B_SET_
         J2       0          out      DF_ENABLE
         K1       S          in       MANUAL_PRESET_
         K2       R          in                ***   unused    ***
         L1       1          out               *** unconnected ***
         L2       C          in                ***   unused    ***
         M1       0          out      BF_ENABLE
         M2       D          in                ***   unused    ***
         N1       C          in                ***   unused    ***
         N2       S          in                ***   unused    ***
         P1       D          in                ***   unused    ***
         P2       1          out               ***   unused    ***
         R1       S          in                ***   unused    ***
         R2       0          out               ***   unused    ***
         S1       1          out               ***   unused    ***
         S2       C          in                ***   unused    ***
         T1       GND        pwr      GND
         T2       D          in                ***   unused    ***
         U1       0          out               ***   unused    ***
         U2       S          in                ***   unused    ***
         V1       0          out               ***   unused    ***
         V2       1          out               ***   unused    ***

B12      A1       IN1        in       MB00
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(08)
         C1       IN3        in       +3V(08)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(08)
         D2       IN1        in       MB01
         E1       OUT        oc       MCBMB00_
         E2       IN2        in       +3V(08)
         F1       IN1        in       MB02
         F2       IN3        in       +3V(08)
         H1       IN2        in       +3V(08)
         H2       IN4        in       +3V(08)
         J1       IN3        in       +3V(08)
         J2       OUT        oc       MCBMB01_
         K1       IN4        in       +3V(08)
         K2       IN1        in       MB03
         L1       OUT        oc       MCBMB02_
         L2       IN2        in       +3V(09)
         M1       IN1        in       MB04
         M2       IN3        in       +3V(09)
         N1       IN2        in       +3V(09)
         N2       IN4        in       +3V(09)
         P1       IN3        in       +3V(09)
         P2       OUT        oc       MCBMB03_
         R1       IN4        in       +3V(09)
         R2       IN1        in       MB05
         S1       OUT        oc       MCBMB04_
         S2       IN2        in       +3V(10)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(10)
         U1       P$1        pas               ***   unused    ***
         U2       IN4        in       +3V(10)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        oc       MCBMB05_

B13      A1       IN1        in       MB06
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(10)
         C1       IN3        in       +3V(10)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(10)
         D2       IN1        in       MB07
         E1       OUT        oc       MCBMB06_
         E2       IN2        in       +3V(10)
         F1       IN1        in       MB08
         F2       IN3        in       +3V(10)
         H1       IN2        in       +3V(11)
         H2       IN4        in       +3V(10)
         J1       IN3        in       +3V(11)
         J2       OUT        oc       MCBMB07_
         K1       IN4        in       +3V(11)
         K2       IN1        in       MB09
         L1       OUT        oc       MCBMB08_
         L2       IN2        in       +3V(12)
         M1       IN1        in       MB10
         M2       IN3        in       +3V(12)
         N1       IN2        in       +3V(12)
         N2       IN4        in       +3V(12)
         P1       IN3        in       +3V(12)
         P2       OUT        oc       MCBMB09_
         R1       IN4        in       +3V(12)
         R2       IN1        in       MB11
         S1       OUT        oc       MCBMB10_
         S2       IN2        in       +3V(12)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(12)
         U1       P$1        pas      +3V(12)
         U2       IN4        in       +3V(12)
         V1       P$1        pas      +3V(13)
         V2       OUT        oc       MCBMB11_

B14      A1       IN1        in       MA00_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(12)
         C1       IN3        in       +3V(12)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(12)
         D2       IN1        in       MA01_
         E1       OUT        oc       BMA00
         E2       IN2        in       +3V(13)
         F1       IN1        in       MA02_
         F2       IN3        in       +3V(13)
         H1       IN2        in       +3V(14)
         H2       IN4        in       +3V(13)
         J1       IN3        in       +3V(14)
         J2       OUT        oc       BMA01
         K1       IN4        in       +3V(14)
         K2       IN1        in       MA03_
         L1       OUT        oc       BMA02
         L2       IN2        in       +3V(14)
         M1       IN1        in       MA04_
         M2       IN3        in       +3V(14)
         N1       IN2        in       +3V(14)
         N2       IN4        in       +3V(14)
         P1       IN3        in       +3V(14)
         P2       OUT        oc       BMA03
         R1       IN4        in       +3V(14)
         R2       IN1        in       MA05_
         S1       OUT        oc       BMA04
         S2       IN2        in       +3V(15)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(15)
         U1       P$1        pas      +3V(14)
         U2       IN4        in       +3V(15)
         V1       P$1        pas      +3V(15)
         V2       OUT        oc       BMA05

B15      A1       IN1        in       MA06_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(15)
         C1       IN3        in       +3V(15)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(15)
         D2       IN1        in       MA07_
         E1       OUT        oc       BMA06
         E2       IN2        in       +3V(16)
         F1       IN1        in       MA08_
         F2       IN3        in       +3V(16)
         H1       IN2        in       +3V(16)
         H2       IN4        in       +3V(16)
         J1       IN3        in       +3V(16)
         J2       OUT        oc       BMA07
         K1       IN4        in       +3V(16)
         K2       IN1        in       MA09_
         L1       OUT        oc       BMA08
         L2       IN2        in       +3V(17)
         M1       IN1        in       MA10_
         M2       IN3        in       +3V(17)
         N1       IN2        in       +3V(17)
         N2       IN4        in       +3V(17)
         P1       IN3        in       +3V(17)
         P2       OUT        oc       BMA09
         R1       IN4        in       +3V(17)
         R2       IN1        in       MA11_
         S1       OUT        oc       BMA10
         S2       IN2        in       +3V(17)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(17)
         U1       P$1        pas      +3V(16)
         U2       IN4        in       +3V(17)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        oc       BMA11

B16      A1       IN1        in       N$411
         A2       VCC        pwr      VCC
         B1       IN2        in       N$410
         C1       IN3        in       N$409
         C2       GND        pwr      GND
         D1       IN4        in       +3V(18)
         D2       IN1        in       N$413
         E1       OUT        oc       EA0
         E2       IN2        in       N$414
         F1       IN1        in       N$416
         F2       IN3        in       N$415
         H1       IN2        in       N$417
         H2       IN4        in       +3V(18)
         J1       IN3        in       N$418
         J2       OUT        oc       EA1
         K1       IN4        in       +3V(18)
         K2       IN1        in       B_FETCH
         L1       OUT        oc       EA2
         L2       IN2        in       MB03_
         M1       IN1        in       EA0
         M2       IN3        in       MB04
         N1       IN2        in       +3V(18)
         N2       IN4        in       MB05_
         P1       IN3        in       +3V(18)
         P2       OUT        oc       N$452
         R1       IN4        in       +3V(18)
         R2       IN1        in       EA1
         S1       OUT        oc       EA0_
         S2       IN2        in       +3V(18)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(18)
         U1       P$1        pas      +3V(18)
         U2       IN4        in       +3V(18)
         V1       P$1        pas      +3V(17)
         V2       OUT        oc       EA1_

B17      A1       R          in       CLEAR_IF_
         A2       VCC        pwr      VCC
         B1       C          in       IB_TO_IF
         C1       D          in       N$444
         C2       GND        pwr      GND
         D1       S          in       +3V(19)
         D2       C          in       IB_TO_IF
         E1       1          out      IF0
         E2       D          in       N$443
         F1       0          out      IF0_
         F2       S          in       +3V(19)
         H1       C          in       IB_TO_IF
         H2       1          out      IF1
         J1       D          in       N$442
         J2       0          out      IF1_
         K1       S          in       +3V(19)
         K2       R          in       CLEAR_IB_
         L1       1          out      IF2
         L2       C          in       LOAD_IB
         M1       0          out      IF2_
         M2       D          in       N$438
         N1       C          in       LOAD_IB
         N2       S          in       +3V(19)
         P1       D          in       N$437
         P2       1          out      IB0
         R1       S          in       +3V(19)
         R2       0          out               *** unconnected ***
         S1       1          out      IB1
         S2       C          in       LOAD_IB
         T1       GND        pwr      GND
         T2       D          in       N$436
         U1       0          out               *** unconnected ***
         U2       S          in       +3V(19)
         V1       0          out               *** unconnected ***
         V2       1          out      IB2

B18      A1       R          in       CLEAR_DF_
         A2       VCC        pwr      VCC
         B1       C          in       N$489
         C1       D          in       N$483
         C2       GND        pwr      GND
         D1       S          in       +3V(19)
         D2       C          in       N$489
         E1       1          out      DF0
         E2       D          in       N$484
         F1       0          out      DF0_
         F2       S          in       +3V(19)
         H1       C          in       N$489
         H2       1          out      DF1
         J1       D          in       N$485
         J2       0          out      DF1_
         K1       S          in       +3V(19)
         K2       R          in       +3V(19)
         L1       1          out      DF2
         L2       C          in       LOAD_BF
         M1       0          out      DF2_
         M2       D          in       EXT_DATA_ADD0
         N1       C          in       LOAD_BF
         N2       S          in       +3V(20)
         P1       D          in       EXT_DATA_ADD1
         P2       1          out      BF0
         R1       S          in       +3V(20)
         R2       0          out               *** unconnected ***
         S1       1          out      BF1
         S2       C          in       LOAD_BF
         T1       GND        pwr      GND
         T2       D          in       EXT_DATA_ADD2
         U1       0          out               *** unconnected ***
         U2       S          in       +3V(20)
         V1       0          out               *** unconnected ***
         V2       1          out      BF2

B19      A1       R          in       +3V(20)
         A2       VCC        pwr      VCC
         B1       C          in       IF_TO_SF
         C1       D          in       IF0
         C2       GND        pwr      GND
         D1       S          in       +3V(20)
         D2       C          in       IF_TO_SF
         E1       1          out      SF0
         E2       D          in       IF1
         F1       0          out               *** unconnected ***
         F2       S          in       +3V(20)
         H1       C          in       N$264
         H2       1          out      SF1
         J1       D          in       IF2
         J2       0          out               *** unconnected ***
         K1       S          in       +3V(20)
         K2       R          in       +3V(20)
         L1       1          out      SF2
         L2       C          in       N$264
         M1       0          out               *** unconnected ***
         M2       D          in       DF0
         N1       C          in       N$264
         N2       S          in       +3V(20)
         P1       D          in       DF1
         P2       1          out      SF3
         R1       S          in       +3V(20)
         R2       0          out               *** unconnected ***
         S1       1          out      SF4
         S2       C          in       N$264
         T1       GND        pwr      GND
         T2       D          in       DF2
         U1       0          out               *** unconnected ***
         U2       S          in       +3V(20)
         V1       0          out               *** unconnected ***
         V2       1          out      SF5

B20      A1       IN1        in       JMP_
         A2       VCC        pwr      VCC
         B1       IN2        in       JMS_
         C1       IN3        in       DEFER
         C2       GND        pwr      GND
         D1       OUT        out      DF_ENABLE_
         D2       IN1        in       DF_ENABLE_
         E1       IN1        in       N$429
         E2       IN2        in       N$403
         F1       IN2        in       N$427
         F2       IN3        in       B_SET_
         H1       IN3        in       N$428
         H2       OUT        out      IF_ENABLE_
         J1       OUT        out      N$438
         J2       IN1        in       N$430
         K1       IN1        in       N$433
         K2       IN2        in       N$431
         L1       IN2        in       N$434
         L2       IN3        in       N$432
         M1       IN3        in       N$435
         M2       OUT        out      N$437
         N1       OUT        out      N$436
         N2       IN1        in       N$482
         P1       IN1        in       N$478
         P2       IN2        in       N$481
         R1       IN2        in       N$477
         R2       IN3        in       N$480
         S1       IN3        in       N$476
         S2       OUT        out      N$483
         T1       GND        pwr      GND
         T2       IN1        in       N$479
         U1       OUT        out      N$484
         U2       IN2        in       N$474
         V1       OUT        out      N$485
         V2       IN3        in       N$475

B21      A1       IN1        in       N$273
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(21)
         C1       OUT        out      N$274
         C2       GND        pwr      GND
         D1       IN1        in       N$272
         D2       IN1        in       N$297
         E1       IN2        in       MEM_START
         E2       IN2        in       +3V(21)
         F1       OUT        out      N$273
         F2       OUT        out      N$296
         H1       IN1        in       +3V(21)
         H2       IN1        in       N$271
         J1       IN2        in       N$294
         J2       IN2        in       +3V(21)
         K1       OUT        out      N$298
         K2       OUT        out      N$272
         L1       IN1        in       EA0_
         L2       IN1        in       CLEAR_IFDFBF_
         M1       IN2        in       EA1_
         M2       IN2        in       IF_TO_SF
         N1       OUT        out      N$271
         N2       OUT        out      CLEAR_IB_
         P1       IN1        in       CLEAR_IFDFBF_
         P2       IN1        in       CLEAR_IFDFBF_
         R1       IN2        in       IF_TO_SF
         R2       IN2        in       IF_TO_SF
         S1       OUT        out      CLEAR_IF_
         S2       OUT        out      CLEAR_DF_
         T1       GND        pwr      GND
         T2       IN1        in       POWER_CLEAR_
         U1       P$1        pas      +3V(21)
         U2       IN2        in       POWER_CLEAR_
         V1       P$1        pas      +3V(25)
         V2       OUT        out      N$270

B22      A1       R          in       B_POWER_CLEAR_
         A2       VCC        pwr      VCC
         B1       C          in       MEM_START
         C1       D          in       N$272
         C2       GND        pwr      GND
         D1       S          in       +3V(21)
         D2       C          in       N$274
         E1       1          out               *** unconnected ***
         E2       D          in       EA2
         F1       0          out      MEM_ENABLE_
         F2       S          in       +3V(21)
         H1       C          in       N$285
         H2       1          out      FIELD
         J1       D          in       GND
         J2       0          out      FIELD_
         K1       S          in       MEM_BEGIN_
         K2       R          in       B_POWER_CLEAR_
         L1       1          out      READ
         L2       C          in       MEM_FINISH
         M1       0          out               *** unconnected ***
         M2       D          in       GND
         N1       C          in       MEM_FINISH
         N2       S          in       N$296
         P1       D          in       GND
         P2       1          out               *** unconnected ***
         R1       S          in       N$298
         R2       0          out      INHIBIT_
         S1       1          out      WRITE
         S2       C          in                ***   unused    ***
         T1       GND        pwr      GND
         T2       D          in                ***   unused    ***
         U1       0          out               *** unconnected ***
         U2       S          in                ***   unused    ***
         V1       0          out               ***   unused    ***
         V2       1          out               ***   unused    ***

B23      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         P2       P          in       N$283
         R2       R          in       FIELD_
         S2       S          out      STROBE_FIELD0
         T2       T          oc       STROBE_
         U2       IN         in       MEM_FINISH
         V2       OUT        oc       MEM_DONE_

B24      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         P2       P          in       N$283
         R2       R          in       FIELD
         S2       S          out      STROBE_FIELD1
         T2       T          oc       STROBE_
         U2       IN         in                ***   unused    ***
         V2       OUT        oc                ***   unused    ***

B25      B2       P$1        pas               ***   unused    ***
         C2       P$2        pas               ***   unused    ***
         D2       P$2        pas               ***   unused    ***
         E2       P$2        pas      -6V
         F2       P$1        pas               ***   unused    ***
         H2       P$1        pas      GND
         J2       P$3        pas               ***   unused    ***
         K2       P$1        pas      N$521
         L2       P$1        pas      N$520
         M2       P$1        pas      N$519
         N2       P$1        pas      N$518
         P2       P$2        pas      N$514
         R2       P$2        pas      N$515
         S2       P$2        pas      N$516
         T2       P$2        pas      N$517
         U2       P$2        pas               ***   unused    ***
         V2       P$1        pas               ***   unused    ***

B26      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       MB05_
         D2       D2         in       MB04_
         E1       E1         pas      N$511
         E2       E2         in       B_FIELD
         F1       H          in       N$507
         F2       F2         pas      N$510
         H1       J          pas      N$530
         H2       H          in       N$506
         J1       K          pas      N$531
         J2       J          pas      N$528
         K1       K1         pas      -6V
         K2       K          pas      N$529
         L1       L1         in       MB07_
         L2       L2         pas      -6V
         M1       M1         pas      N$513
         M2       M2         in       MB06_
         N1       H          in       N$509
         N2       N2         in       B_FIELD
         P1       J          pas      N$534
         P2       P2         pas      N$512
         R1       K          pas      N$535
         R2       H          in       N$508
         S1       S1         pas      -6V
         S2       J          pas      N$532
         T1       GND        pwr      GND
         T2       K          pas      N$533
         U2       U2         pas      -6V
         V2       V2         in       -30V

B27      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       MB09_
         D2       D2         in       MB08_
         E1       E1         pas      N$519
         E2       E2         in       B_FIELD
         F1       H          in       N$515
         F2       F2         pas      N$518
         H1       J          pas      N$538
         H2       H          in       N$514
         J1       K          pas      N$539
         J2       J          pas      N$536
         K1       K1         pas      -6V
         K2       K          pas      N$537
         L1       L1         in       MB11_
         L2       L2         pas      -6V
         M1       M1         pas      N$521
         M2       M2         in       MB10_
         N1       H          in       N$517
         N2       N2         in       B_FIELD
         P1       J          pas      N$542
         P2       P2         pas      N$520
         R1       K          pas      N$543
         R2       H          in       N$516
         S1       S1         pas      -6V
         S2       J          pas      N$540
         T1       GND        pwr      GND
         T2       K          pas      N$541
         U2       U2         pas      -6V
         V2       V2         in       -30V

B30      A1       IN1        in       MEM_ENABLE_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(21)
         C1       IN3        in       +3V(21)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(21)
         D2       IN1        in       +3V(21)
         E1       OUT        oc       B_MEM_ENABLE
         E2       IN2        in       +3V(22)
         F1       IN1        in       FIELD
         F2       IN3        in       +3V(22)
         H1       IN2        in       +3V(22)
         H2       IN4        in       FIELD_
         J1       IN3        in       +3V(22)
         J2       OUT        oc       B_FIELD
         K1       IN4        in       +3V(22)
         K2       IN1        in       INHIBIT_
         L1       OUT        oc       BB_FIELD_
         L2       IN2        in       +3V(22)
         M1       IN1        in       N$282
         M2       IN3        in       +3V(22)
         N1       IN2        in       +3V(22)
         N2       IN4        in       +3V(22)
         P1       IN3        in       +3V(22)
         P2       OUT        oc       B_INHIBIT
         R1       IN4        in       +3V(22)
         R2       IN1        in       FIELD
         S1       OUT        oc       MEM_BEGIN_
         S2       IN2        in       +3V(22)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(22)
         U1       P$1        pas      +3V(22)
         U2       IN4        in       +3V(22)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        oc       B_FIELD_

B31      A1       A1         oc       MEM06
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$387
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$388
         F2       F2         in       N$391
         H2       H2         in       N$392
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$389
         M1       M1         in       N$390
         N1       N1         in       N$393
         P1       P1         in       N$394
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc       MEM07

B32      A1       A1         oc       MEM08
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$386
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$385
         F2       F2         in       N$395
         H2       H2         in       N$396
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$383
         M1       M1         in       N$384
         N1       N1         in       N$397
         P1       P1         in       N$398
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc       MEM09

B33      A1       A1         oc       MEM10
         A2       VCC        pwr      VCC
         B1       B1         in       MEM_BEGIN_
         B2       -15V       pwr      -15V
         C1       C1         out               *** unconnected ***
         C2       GND        pwr      GND
         D1       D1         in       STROBE_FIELD0
         D2       D2         in       N$381
         E1       E1         out               *** unconnected ***
         E2       E2         in       N$382
         F2       F2         in       N$399
         H2       H2         in       N$400
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L1       L1         in       N$379
         M1       M1         in       N$380
         N1       N1         in       N$401
         P1       P1         in       N$402
         R1       R1         in       STROBE_FIELD1
         R2       R2         out               *** unconnected ***
         S1       S1         out               *** unconnected ***
         S2       S2         pas      SLICE
         T1       GND        pwr      GND
         T2       T2         in       B_MEM_ENABLE
         U2       U2         oc       MEM11

B36      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       MB05_
         D2       D2         in       MB04_
         E1       E1         pas      N$309
         E2       E2         in       B_FIELD_
         F1       H          in       N$315
         F2       F2         pas      N$312
         H1       J          pas      N$337
         H2       H          in       N$316
         J1       K          pas      N$338
         J2       J          pas      N$335
         K1       K1         pas      -6V
         K2       K          pas      N$336
         L1       L1         in       MB07_
         L2       L2         pas      -6V
         M1       M1         pas      N$311
         M2       M2         in       MB06_
         N1       H          in       N$313
         N2       N2         in       B_FIELD_
         P1       J          pas      N$348
         P2       P2         pas      N$310
         R1       K          pas      N$347
         R2       H          in       N$314
         S1       S1         pas      -6V
         S2       J          pas      N$349
         T1       GND        pwr      GND
         T2       K          pas      N$350
         U2       U2         pas      -6V
         V2       V2         in       -30V

B37      A1       A1         in       B_INHIBIT
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       MB09_
         D2       D2         in       MB08_
         E1       E1         pas      N$318
         E2       E2         in       B_FIELD_
         F1       H          in       N$324
         F2       F2         pas      N$317
         H1       J          pas      N$344
         H2       H          in       N$321
         J1       K          pas      N$343
         J2       J          pas      N$346
         K1       K1         pas      -6V
         K2       K          pas      N$345
         L1       L1         in       MB11_
         L2       L2         pas      -6V
         M1       M1         pas      N$320
         M2       M2         in       MB10_
         N1       H          in       N$322
         N2       N2         in       B_FIELD_
         P1       J          pas      N$340
         P2       P2         pas      N$319
         R1       K          pas      N$339
         R2       H          in       N$323
         S1       S1         pas      -6V
         S2       J          pas      N$342
         T1       GND        pwr      GND
         T2       K          pas      N$341
         U2       U2         pas      -6V
         V2       V2         in       -30V

B38      B2       P$1        pas      -15V
         C2       P$2        pas      GND
         D2       P$2        pas      Y_RW_SOURCE
         E2       P$2        pas      -6V
         F2       P$1        pas      N$280
         H2       P$1        pas      -30V
         J2       P$3        pas      -30V
         K2       P$1        pas      N$311
         L2       P$1        pas      N$310
         M2       P$1        pas      N$309
         N2       P$1        pas      N$312
         P2       P$2        pas      N$316
         R2       P$2        pas      N$315
         S2       P$2        pas      N$314
         T2       P$2        pas      N$313
         U2       P$2        pas      -30V
         V2       P$1        pas      -6V

B39      B2       P$1        pas      -15V
         C2       P$2        pas      GND
         D2       P$2        pas      X_RW_RETURN
         E2       P$2        pas      GND
         F2       P$1        pas      N$279
         H2       P$1        pas      -30V
         J2       P$3        pas      -30V
         K2       P$1        pas      N$320
         L2       P$1        pas      N$319
         M2       P$1        pas      N$318
         N2       P$1        pas      N$317
         P2       P$2        pas      N$321
         R2       P$2        pas      N$324
         S2       P$2        pas      N$323
         T2       P$2        pas      N$322
         U2       P$2        pas      -30V
         V2       P$1        pas      -6V

B40      A1       P$2        io                ***   unused    ***
         A2       P$2        io       VCC
         B1       P$2        io                ***   unused    ***
         B2       P$2        io                ***   unused    ***
         C1       P$2        io                ***   unused    ***
         C2       P$2        io       GND
         D1       P$2        io                ***   unused    ***
         D2       P$2        io       SR07
         E1       P$2        io                ***   unused    ***
         E2       P$2        io       SR08
         F1       P$2        io                ***   unused    ***
         F2       P$2        io       SR09
         H1       P$2        io                ***   unused    ***
         H2       P$2        io       SR10
         J1       P$2        io                ***   unused    ***
         J2       P$2        io       SR11
         K1       P$2        io                ***   unused    ***
         K2       P$2        io       KEY_ST_
         L1       P$2        io                ***   unused    ***
         L2       P$2        io       KEY_LA_
         M1       P$2        io                ***   unused    ***
         M2       P$2        io       KEY_DP_
         N1       P$2        io                ***   unused    ***
         N2       P$2        io                ***   unused    ***
         P1       P$2        io                ***   unused    ***
         P2       P$2        io                ***   unused    ***
         R1       P$2        io                ***   unused    ***
         R2       P$2        io       KEY_EX_
         S1       P$2        io                ***   unused    ***
         S2       P$2        io       KEY_CONT_
         T1       P$2        io                ***   unused    ***
         T2       P$2        io       KEY_STOP_
         U1       P$2        io                ***   unused    ***
         U2       P$2        io       KEY_SS_
         V1       P$2        io                ***   unused    ***
         V2       P$2        io       KEY_SI_

C01      A2       P$2        io                ***   unused    ***
         B2       P$2        io                ***   unused    ***
         C2       P$2        io       GND
         D2       P$2        io       -36V
         E2       P$2        io       GND
         F2       P$2        io       SYNC_PUN
         H2       P$2        io       FEED_HOLE
         J2       P$2        io       HOLE1
         K2       P$2        io       HOLE8
         L2       P$2        io       HOLE7
         M2       P$2        io       HOLE6
         N2       P$2        io       HOLE5
         P2       P$2        io       HOLE4
         R2       P$2        io       HOLE3
         S2       P$2        io       HOLE2
         T2       P$2        io       FEED_HOLE
         U2       P$2        io       PUN_FEED_SWITCH_
         V2       P$2        io       +3VC01

C02      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       D          in       N$722
         E2       E          in       N$734
         F2       F          in       N$734
         H2       H          in       N$734
         J2       D          in       N$722
         K2       E          in       N$735
         L2       F          in       N$735
         M2       H          in       N$735
         R2       R          oc       HOLE8
         S2       R          oc       HOLE7
         V2       P$1        in       -36V

C03      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       D          in       N$722
         E2       E          in       N$737
         F2       F          in       N$737
         H2       H          in       N$737
         J2       D          in       N$722
         K2       E          in       N$738
         L2       F          in       N$738
         M2       H          in       N$738
         R2       R          oc       HOLE6
         S2       R          oc       HOLE5
         V2       P$1        in       -36V

C04      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       D          in       N$722
         E2       E          in       N$739
         F2       F          in       N$739
         H2       H          in       N$739
         J2       D          in       N$722
         K2       E          in       N$722
         L2       F          in       N$722
         M2       H          in       N$722
         R2       R          oc       HOLE4
         S2       R          oc       FEED_HOLE
         V2       P$1        in       -36V

C05      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       D          in       N$722
         E2       E          in       N$740
         F2       F          in       N$740
         H2       H          in       N$740
         J2       D          in       N$722
         K2       E          in       N$741
         L2       F          in       N$741
         M2       H          in       N$741
         R2       R          oc       HOLE3
         S2       R          oc       HOLE2
         V2       P$1        in       -36V

C06      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       D          in       N$722
         E2       E          in       N$736
         F2       F          in       N$736
         H2       H          in       N$736
         J2       D          in                ***   unused    ***
         K2       E          in                ***   unused    ***
         L2       F          in                ***   unused    ***
         M2       H          in                ***   unused    ***
         R2       R          oc       HOLE1
         S2       R          oc                ***   unused    ***
         V2       P$1        in       -36V

C07      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      B_LINE_HOLD_
         F2       IN3        in       +3V(57)
         H2       IN2        in       +3V(57)
         J2       IN1        in       LINE_HOLD_
         K2       OUT        out      B_C_
         M2       IN1        in       C_
         N2       IN2        in       +3V(57)
         P2       IN3        in       +3V(57)
         S2       OUT        out      BSTLR
         T2       IN3        in       MEM_DONE_
         U2       IN2        in       S
         V2       IN1        in       TS1

C08      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       OUT        out      BTP3
         H2       IN1        in       +3V(57)
         J2       IN2        in       TP3
         K2       OUT        out      B_MEM_TO_LSR
         N2       IN1        in       +3V(57)
         P2       IN2        in       MEM_TO_LSR_
         S2       OUT        out      B_DC_INST
         U2       IN1        in       +3V(57)
         V2       IN2        in       DC_INST_

C09      A1       IN1        in       MEM00
         A2       VCC        pwr      VCC
         B1       IN2        in       HS_
         C1       OUT        out      N$728
         C2       GND        pwr      GND
         D1       IN1        in       N$728
         D2       IN1        in       TT_LINE_SHIFT_
         E1       IN2        in       +3V(57)
         E2       IN2        in       TT_RIGHT_SHIFT_ENABLE_
         F1       OUT        out      N$729
         F2       OUT        out      TT_SHIFT_ENABLE
         H1       IN1        in       TT_SHIFT_ENABLE
         H2       IN1        in       N$729
         J1       IN2        in       +3V(57)
         J2       IN2        in       N$727
         K1       OUT        out      TT_SHIFT_ENABLE_
         K2       OUT        out      MEM_INH9_11_
         L1       IN1        in       N$726
         L2       IN1        in       R0
         M1       IN2        in       +3V(57)
         M2       IN2        in       +3V(57)
         N1       OUT        out      N$727
         N2       OUT        out      R0_
         P1       IN1        in       TT_CARRY_INSERT
         P2       IN1        in       TT_CARRY_INSERT_S_
         R1       IN2        in       +3V(57)
         R2       IN2        in       +3V(57)
         S1       OUT        out      TT_CARRY_INSERT_
         S2       OUT        out      TT_CARRY_INSERT_S
         T1       GND        pwr      GND
         T2       IN1        in                ***   unused    ***
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in                ***   unused    ***
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out               ***   unused    ***

C10      A1       IN1        in       N$731
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(23)
         C1       OUT        out      TT_SET_
         C2       GND        pwr      GND
         D1       IN1        in       +3V(23)
         D2       IN1        in       +3V(23)
         E1       IN2        in       TT_RIGHT_SHIFT_ENABLE
         E2       IN2        in       TT_INST_
         F1       OUT        out      TT_RIGHT_SHIFT_ENABLE_
         F2       OUT        out      TT_INST
         H1       IN1        in       N$742
         H2       IN1        in       +3V(23)
         J1       IN2        in       +3V(23)
         J2       IN2        in       N$743
         K1       OUT        out      N$733
         K2       OUT        out      N$744
         L1       IN1        in       TT_L_DISABLE
         L2       IN1        in       N$746
         M1       IN2        in       TT_INST_
         M2       IN2        in       N$747
         N1       OUT        out      TT_CYCLE_
         N2       OUT        out      TT_DATA
         P1       IN1        in       LINE_
         P2       IN1        in       C
         R1       IN2        in       S
         R2       IN2        in       N$745
         S1       OUT        out      N$746
         S2       OUT        out      N$747
         T1       GND        pwr      GND
         T2       IN1        in       LINE_
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       +3V(23)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$745

C11      A1       IN1        in       C_SET_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(23)
         C1       IN3        in       S_SET_
         C2       GND        pwr      GND
         D1       OUT        out      N$731
         D2       IN1        in       N$730
         E1       IN1        in       C
         E2       IN2        in       CSR_ENABLE_
         F1       IN2        in       HS_
         F2       IN3        in       TT_IO_ENABLE_
         H1       IN3        in       TS2
         H2       OUT        out      TT_RIGHT_SHIFT_ENABLE
         J1       OUT        out      N$730
         J2       IN1        in       TS2
         K1       IN1        in       TS3
         K2       IN2        in       N$728
         L1       IN2        in       MB09
         L2       IN3        in       S
         M1       IN3        in       TT_INST
         M2       OUT        out      TT_LINE_SHIFT_
         N1       OUT        out      TT_IO_ENABLE_
         N2       IN1        in       TS3
         P1       IN1        in       MB03
         P2       IN2        in       S
         R1       IN2        in       MB04_
         R2       IN3        in       C_SET_
         S1       IN3        in       MB05_
         S2       OUT        out      TT_CARRY_INSERT_S_
         T1       GND        pwr      GND
         T2       IN1        in       MB06_
         U1       OUT        out      N$742
         U2       IN2        in       MB07_
         V1       OUT        out      N$743
         V2       IN3        in       MB08_

C12      A1       IN1        in       FIELD_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(61)
         C1       IN3        in       +3V(61)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(61)
         D2       IN1        in       N$458
         E1       OUT        oc       BB_FIELD
         E2       IN2        in       TS3
         F1       IN1        in       +3V(43)
         F2       IN3        in       IOT
         H1       IN2        in       INITIALIZE
         H2       IN4        in       IOT
         J1       IN3        in       +3V(61)
         J2       OUT        oc       MEM_EXT_IO_ENABLE_
         K1       IN4        in       +3V(61)
         K2       IN1        in       INT_OK
         L1       OUT        oc       INITIALIZE_
         L2       IN2        in       TS4
         M1       IN1        in       N$270
         M2       IN3        in       INT_STROBE_
         N1       IN2        in       N$270
         N2       IN4        in       +3V(61)
         P1       IN3        in       N$270
         P2       OUT        oc       LOAD_SF_
         R1       IN4        in       N$270
         R2       IN1        in                ***   unused    ***
         S1       OUT        oc       B_POWER_CLEAR_
         S2       IN2        in                ***   unused    ***
         T1       GND        pwr      GND
         T2       IN3        in                ***   unused    ***
         U1       P$1        pas      +3V(61)
         U2       IN4        in                ***   unused    ***
         V1       P$1        pas      +3V(08)
         V2       OUT        oc                ***   unused    ***

C13      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$596
         F1       OUT        out      N$608
         H1       IN         in       N$597
         H2       H2         in       N$607
         J1       OUT        out      EAE_TP
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out      N$597
         R2       R2         out               *** unconnected ***
         S2       S2         out      N$596
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

C14      A1       IN1        in       RIGHT_SHIFT
         A2       VCC        pwr      VCC
         B1       IN2        in       ADDER11_
         C1       OUT        out      N$622
         C2       GND        pwr      GND
         D1       IN1        in       AC_TO_MQ_ENABLE
         D2       IN1        in       B_LEFT_SHIFT
         E1       IN2        in       AC00
         E2       IN2        in       MQ01
         F1       OUT        out      N$610
         F2       OUT        out      N$623
         H1       IN1        in       RIGHT_SHIFT
         H2       IN1        in       AC_TO_MQ_ENABLE
         J1       IN2        in       MQ00
         J2       IN2        in       AC01
         K1       OUT        out      N$624
         K2       OUT        out      N$611
         L1       IN1        in       B_LEFT_SHIFT
         L2       IN1        in       RIGHT_SHIFT
         M1       IN2        in       MQ02
         M2       IN2        in       MQ01
         N1       OUT        out      N$625
         N2       OUT        out      N$626
         P1       IN1        in       AC_TO_MQ_ENABLE
         P2       IN1        in       B_LEFT_SHIFT
         R1       IN2        in       AC02
         R2       IN2        in       MQ03
         S1       OUT        out      N$612
         S2       OUT        out      N$627
         T1       GND        pwr      GND
         T2       IN1        in       MB_TO_SC_ENABLE
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       MB07_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$660

C15      A1       IN1        in       RIGHT_SHIFT
         A2       VCC        pwr      VCC
         B1       IN2        in       MQ02
         C1       OUT        out      N$628
         C2       GND        pwr      GND
         D1       IN1        in       AC_TO_MQ_ENABLE
         D2       IN1        in       B_LEFT_SHIFT
         E1       IN2        in       AC03
         E2       IN2        in       MQ04
         F1       OUT        out      N$613
         F2       OUT        out      N$629
         H1       IN1        in       RIGHT_SHIFT
         H2       IN1        in       AC_TO_MQ_ENABLE
         J1       IN2        in       MQ03
         J2       IN2        in       AC04
         K1       OUT        out      N$630
         K2       OUT        out      N$614
         L1       IN1        in       B_LEFT_SHIFT
         L2       IN1        in       RIGHT_SHIFT
         M1       IN2        in       MQ05
         M2       IN2        in       MQ04
         N1       OUT        out      N$631
         N2       OUT        out      N$632
         P1       IN1        in       AC_TO_MQ_ENABLE
         P2       IN1        in       B_LEFT_SHIFT
         R1       IN2        in       AC05
         R2       IN2        in       MQ06
         S1       OUT        out      N$615
         S2       OUT        out      N$633
         T1       GND        pwr      GND
         T2       IN1        in       MB_TO_SC_ENABLE
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       MB08_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$674

C16      A1       IN1        in       RIGHT_SHIFT
         A2       VCC        pwr      VCC
         B1       IN2        in       MQ05
         C1       OUT        out      N$634
         C2       GND        pwr      GND
         D1       IN1        in       AC_TO_MQ_ENABLE
         D2       IN1        in       BB_LEFT_SHIFT
         E1       IN2        in       AC06
         E2       IN2        in       MQ07
         F1       OUT        out      N$616
         F2       OUT        out      N$635
         H1       IN1        in       RIGHT_SHIFT
         H2       IN1        in       AC_TO_MQ_ENABLE
         J1       IN2        in       MQ06
         J2       IN2        in       AC07
         K1       OUT        out      N$636
         K2       OUT        out      N$617
         L1       IN1        in       BB_LEFT_SHIFT
         L2       IN1        in       RIGHT_SHIFT
         M1       IN2        in       MQ08
         M2       IN2        in       MQ07
         N1       OUT        out      N$637
         N2       OUT        out      N$638
         P1       IN1        in       AC_TO_MQ_ENABLE
         P2       IN1        in       BB_LEFT_SHIFT
         R1       IN2        in       AC08
         R2       IN2        in       MQ09
         S1       OUT        out      N$618
         S2       OUT        out      N$639
         T1       GND        pwr      GND
         T2       IN1        in       MB_TO_SC_ENABLE
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       MB09_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$675

C17      A1       IN1        in       RIGHT_SHIFT
         A2       VCC        pwr      VCC
         B1       IN2        in       MQ08
         C1       OUT        out      N$640
         C2       GND        pwr      GND
         D1       IN1        in       AC_TO_MQ_ENABLE
         D2       IN1        in       BB_LEFT_SHIFT
         E1       IN2        in       AC09
         E2       IN2        in       MQ10
         F1       OUT        out      N$619
         F2       OUT        out      N$641
         H1       IN1        in       RIGHT_SHIFT
         H2       IN1        in       AC_TO_MQ_ENABLE
         J1       IN2        in       MQ09
         J2       IN2        in       AC10
         K1       OUT        out      N$642
         K2       OUT        out      N$620
         L1       IN1        in       BB_LEFT_SHIFT
         L2       IN1        in       RIGHT_SHIFT
         M1       IN2        in       MQ11
         M2       IN2        in       MQ10
         N1       OUT        out      N$643
         N2       OUT        out      N$644
         P1       IN1        in       AC_TO_MQ_ENABLE
         P2       IN1        in       BB_LEFT_SHIFT
         R1       IN2        in       AC11
         R2       IN2        in       N$682
         S1       OUT        out      N$621
         S2       OUT        out      N$645
         T1       GND        pwr      GND
         T2       IN1        in       MB_TO_SC_ENABLE
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       MB10_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$676

C18      A1       IN1        in       +3V(24)
         A2       VCC        pwr      VCC
         B1       IN2        in       N$677
         C1       OUT        out      SC_FULL
         C2       GND        pwr      GND
         D1       IN1        in       +3V(24)
         D2       IN1        in       +3V(24)
         E1       IN2        in       N$678
         E2       IN2        in       N$680
         F1       OUT        out      N$679
         F2       OUT        out      N$681
         H1       IN1        in       SC3
         H2       IN1        in       +3V(24)
         J1       IN2        in       SC4
         J2       IN2        in       NORM
         K1       OUT        out      N$680
         K2       OUT        out      NORM_
         L1       IN1        in       N$662
         L2       IN1        in       EAE_ON
         M1       IN2        in       N$663
         M2       IN2        in       SC4_
         N1       OUT        out      N$667
         N2       OUT        out      N$662
         P1       IN1        in       MB_TO_SC_ENABLE
         P2       IN1        in       SC0_3_0_
         R1       IN2        in       MB11_
         R2       IN2        in       +3V(24)
         S1       OUT        out      N$663
         S2       OUT        out      SC0_3_0
         T1       GND        pwr      GND
         T2       IN1        in       ADDER_L_
         U1       P$1        pas      +3V(24)
         U2       IN2        in       +3V(24)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      ADDER_L

C19      A1       IN1        in       N$622
         A2       VCC        pwr      VCC
         B1       IN2        in       N$610
         C1       IN3        in       N$623
         C2       GND        pwr      GND
         D1       OUT        out      N$646
         D2       IN1        in       N$624
         E1       IN1        in       N$626
         E2       IN2        in       N$611
         F1       IN2        in       N$612
         F2       IN3        in       N$625
         H1       IN3        in       N$627
         H2       OUT        out      N$647
         J1       OUT        out      N$648
         J2       IN1        in       N$628
         K1       IN1        in       N$630
         K2       IN2        in       N$613
         L1       IN2        in       N$614
         L2       IN3        in       N$629
         M1       IN3        in       N$631
         M2       OUT        out      N$649
         N1       OUT        out      N$650
         N2       IN1        in       N$632
         P1       IN1        in       N$634
         P2       IN2        in       N$615
         R1       IN2        in       N$616
         R2       IN3        in       N$633
         S1       IN3        in       N$635
         S2       OUT        out      N$651
         T1       GND        pwr      GND
         T2       IN1        in       N$636
         U1       OUT        out      N$652
         U2       IN2        in       N$617
         V1       OUT        out      N$653
         V2       IN3        in       N$637

C20      A1       IN1        in       N$638
         A2       VCC        pwr      VCC
         B1       IN2        in       N$618
         C1       IN3        in       N$639
         C2       GND        pwr      GND
         D1       OUT        out      N$654
         D2       IN1        in       N$640
         E1       IN1        in       N$642
         E2       IN2        in       N$619
         F1       IN2        in       N$620
         F2       IN3        in       N$641
         H1       IN3        in       N$643
         H2       OUT        out      N$655
         J1       OUT        out      N$656
         J2       IN1        in       N$644
         K1       IN1        in       N$659
         K2       IN2        in       N$621
         L1       IN2        in       N$658
         L2       IN3        in       N$645
         M1       IN3        in       N$660
         M2       OUT        out      N$657
         N1       OUT        out      N$661
         N2       IN1        in       N$668
         P1       IN1        in       N$669
         P2       IN2        in       N$671
         R1       IN2        in       N$672
         R2       IN3        in       N$674
         S1       IN3        in       N$675
         S2       OUT        out      N$664
         T1       GND        pwr      GND
         T2       IN1        in       N$670
         U1       OUT        out      N$665
         U2       IN2        in       N$673
         V1       OUT        out      N$666
         V2       IN3        in       N$676

C21      A1       IN1        in       EAE_ON
         A2       VCC        pwr      VCC
         B1       IN2        in       SC_FULL
         C1       IN3        in       SC0_
         C2       GND        pwr      GND
         D1       OUT        out      N$659
         D2       IN1        in       EAE_ON
         E1       IN1        in       EAE_ON
         E2       IN2        in       N$677
         F1       IN2        in       N$679
         F2       IN3        in       SC0
         H1       IN3        in       SC1_
         H2       OUT        out      N$658
         J1       OUT        out      N$668
         J2       IN1        in       EAE_ON
         K1       IN1        in       EAE_ON
         K2       IN2        in       N$678
         L1       IN2        in       N$681
         L2       IN3        in       SC1
         M1       IN3        in       SC2_
         M2       OUT        out      N$671
         N1       OUT        out      N$669
         N2       IN1        in       EAE_ON
         P1       IN1        in       SC3_
         P2       IN2        in       N$680
         R1       IN2        in       EAE_ON
         R2       IN3        in       SC2
         S1       IN3        in       SC4
         S2       OUT        out      N$672
         T1       GND        pwr      GND
         T2       IN1        in       EAE_ON
         U1       OUT        out      N$670
         U2       IN2        in       SC3
         V1       OUT        out      N$673
         V2       IN3        in       SC4_

C22      A1       R          in       +3V(25)
         A2       VCC        pwr      VCC
         B1       C          in       SC_LOAD
         C1       D          in       N$661
         C2       GND        pwr      GND
         D1       S          in       +3V(25)
         D2       C          in       SC_LOAD
         E1       1          out      SC0
         E2       D          in       N$664
         F1       0          out      SC0_
         F2       S          in       +3V(25)
         H1       C          in       SC_LOAD
         H2       1          out      SC1
         J1       D          in       N$665
         J2       0          out      SC1_
         K1       S          in       +3V(25)
         K2       R          in       +3V(25)
         L1       1          out      SC2
         L2       C          in       SC_LOAD
         M1       0          out      SC2_
         M2       D          in       N$666
         N1       C          in       SC_LOAD
         N2       S          in       +3V(25)
         P1       D          in       N$667
         P2       1          out      SC3
         R1       S          in       +3V(25)
         R2       0          out      SC3_
         S1       1          out      SC4
         S2       C          in       EAE_TP
         T1       GND        pwr      GND
         T2       D          in       EAE_COMPLETE_
         U1       0          out      SC4_
         U2       S          in       EAE_RUN
         V1       0          out               *** unconnected ***
         V2       1          out      EAE_END

C23      A1       R          in       +3V(26)
         A2       VCC        pwr      VCC
         B1       C          in       MQ_LOAD
         C1       D          in       N$646
         C2       GND        pwr      GND
         D1       S          in       +3V(26)
         D2       C          in       MQ_LOAD
         E1       1          out      MQ00
         E2       D          in       N$647
         F1       0          out      MQ00_
         F2       S          in       +3V(26)
         H1       C          in       MQ_LOAD
         H2       1          out      MQ01
         J1       D          in       N$648
         J2       0          out      MQ01_
         K1       S          in       +3V(26)
         K2       R          in       +3V(26)
         L1       1          out      MQ02
         L2       C          in       MQ_LOAD
         M1       0          out      MQ02_
         M2       D          in       N$649
         N1       C          in       MQ_LOAD
         N2       S          in       +3V(26)
         P1       D          in       N$650
         P2       1          out      MQ03
         R1       S          in       +3V(26)
         R2       0          out      MQ03_
         S1       1          out      MQ04
         S2       C          in       MQ_LOAD
         T1       GND        pwr      GND
         T2       D          in       N$651
         U1       0          out      MQ04_
         U2       S          in       +3V(26)
         V1       0          out      MQ05_
         V2       1          out      MQ05

C24      A1       R          in       +3V(27)
         A2       VCC        pwr      VCC
         B1       C          in       MQ_LOAD
         C1       D          in       N$652
         C2       GND        pwr      GND
         D1       S          in       +3V(27)
         D2       C          in       MQ_LOAD
         E1       1          out      MQ06
         E2       D          in       N$653
         F1       0          out      MQ06_
         F2       S          in       +3V(27)
         H1       C          in       MQ_LOAD
         H2       1          out      MQ07
         J1       D          in       N$654
         J2       0          out      MQ07_
         K1       S          in       +3V(27)
         K2       R          in       +3V(27)
         L1       1          out      MQ08
         L2       C          in       MQ_LOAD
         M1       0          out      MQ08_
         M2       D          in       N$655
         N1       C          in       MQ_LOAD
         N2       S          in       +3V(27)
         P1       D          in       N$656
         P2       1          out      MQ09
         R1       S          in       +3V(27)
         R2       0          out      MQ09_
         S1       1          out      MQ10
         S2       C          in       MQ_LOAD
         T1       GND        pwr      GND
         T2       D          in       N$657
         U1       0          out      MQ10_
         U2       S          in       +3V(27)
         V1       0          out      MQ11_
         V2       1          out      MQ11

C25      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD
         E2       E2         in       MA06_
         F2       F2         in       MA08
         H2       H2         in       MA07
         J2       J2         pas      C24J4
         K2       K2         pas      C24K4
         L2       L2         pas      V24L4
         M2       M2         pas      C24M4
         N2       N2         pas      C24N4
         P2       P2         pas      C24P4
         R2       R2         pas      C24R4
         S2       S2         pas      C24S4
         T2       T2         in       Y_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C26      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD
         E2       E2         in       MA06
         F2       F2         in       MA08
         H2       H2         in       MA07
         J2       J2         pas      C23J4
         K2       K2         pas      C23K4
         L2       L2         pas      C23L4
         M2       M2         pas      C23M4
         N2       N2         pas      C23N4
         P2       P2         pas      C23P4
         R2       R2         pas      C23R4
         S2       S2         pas      C23S4
         T2       T2         in       Y_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C30      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD
         E2       E2         in       MA00_
         F2       F2         in       MA02
         H2       H2         in       MA01
         J2       J2         pas      C24J3
         K2       K2         pas      C24K3
         L2       L2         pas      V24L3
         M2       M2         pas      C24M3
         N2       N2         pas      C24N3
         P2       P2         pas      C24P3
         R2       R2         pas      C24R3
         S2       S2         pas      C24S3
         T2       T2         in       X_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C31      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD
         E2       E2         in       MA00
         F2       F2         in       MA02
         H2       H2         in       MA01
         J2       J2         pas      C23J3
         K2       K2         pas      C23K3
         L2       L2         pas      C23L3
         M2       M2         pas      C23M3
         N2       N2         pas      C23N3
         P2       P2         pas      C23P3
         R2       R2         pas      C23R3
         S2       S2         pas      C23S3
         T2       T2         in       X_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C32      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD_
         E2       E2         in       MA06_
         F2       F2         in       MA08
         H2       H2         in       MA07
         J2       J2         pas      C24J1
         K2       K2         pas      C24K1
         L2       L2         pas      V24L1
         M2       M2         pas      C24M1
         N2       N2         pas      C24N1
         P2       P2         pas      C24P1
         R2       R2         pas      C24R1
         S2       S2         pas      C24S1
         T2       T2         in       Y_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C33      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD_
         E2       E2         in       MA06
         F2       F2         in       MA08
         H2       H2         in       MA07
         J2       J2         pas      C23J1
         K2       K2         pas      C23K1
         L2       L2         pas      C23L1
         M2       M2         pas      C23M1
         N2       N2         pas      C23N1
         P2       P2         pas      C23P1
         R2       R2         pas      C23R1
         S2       S2         pas      C23S1
         T2       T2         in       Y_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C37      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD_
         E2       E2         in       MA00_
         F2       F2         in       MA02
         H2       H2         in       MA01
         J2       J2         pas      C24J2
         K2       K2         pas      C24K2
         L2       L2         pas      V24L2
         M2       M2         pas      C24M2
         N2       N2         pas      C24N2
         P2       P2         pas      C24P2
         R2       R2         pas      C24R2
         S2       S2         pas      C24S2
         T2       T2         in       X_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C38      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD_
         E2       E2         in       MA00
         F2       F2         in       MA02
         H2       H2         in       MA01
         J2       J2         pas      C23J2
         K2       K2         pas      C23K2
         L2       L2         pas      C23L2
         M2       M2         pas      C23M2
         N2       N2         pas      C23N2
         P2       P2         pas      C23P2
         R2       R2         pas      C23R2
         S2       S2         pas      C23S2
         T2       T2         in       X_RW_SOURCE
         V2       V2         in       NEG_CLAMP

C39      A1       A1         in       WRITE
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       +3V(42)
         D2       D2         in       READ
         E1       E1         pas      N$280
         E2       E2         in       WRITE
         F1       H          in                ***   unused    ***
         F2       F2         pas      X_RW_SOURCE
         H1       J          pas               ***   unused    ***
         H2       H          in                ***   unused    ***
         J1       K          pas               ***   unused    ***
         J2       J          pas               ***   unused    ***
         K1       K1         pas      X_RW_SOURCE
         K2       K          pas               ***   unused    ***
         L1       L1         in       +3V(42)
         L2       L2         pas      N$278
         M1       M1         pas      N$279
         M2       M2         in       READ
         N1       H          in                ***   unused    ***
         N2       N2         in       WRITE
         P1       J          pas               ***   unused    ***
         P2       P2         pas      Y_RW_SOURCE
         R1       K          pas               ***   unused    ***
         R2       H          in                ***   unused    ***
         S1       S1         pas      Y_RW_SOURCE
         S2       J          pas               ***   unused    ***
         T1       GND        pwr      GND
         T2       K          pas               ***   unused    ***
         U2       U2         pas      N$276
         V2       V2         in       NEG_CLAMP

C40      A1       P$2        io                ***   unused    ***
         A2       P$2        io       VCC
         B1       P$2        io       LINK_
         B2       P$2        io                ***   unused    ***
         C1       P$2        io       IF1_
         C2       P$2        io       GND
         D1       P$2        io       IF2_
         D2       P$2        io                ***   unused    ***
         E1       P$2        io                ***   unused    ***
         E2       P$2        io                ***   unused    ***
         F1       P$2        io       SC4_
         F2       P$2        io                ***   unused    ***
         H1       P$2        io                ***   unused    ***
         H2       P$2        io                ***   unused    ***
         J1       P$2        io                ***   unused    ***
         J2       P$2        io       DF0_
         K1       P$2        io                ***   unused    ***
         K2       P$2        io                ***   unused    ***
         L1       P$2        io                ***   unused    ***
         L2       P$2        io       SC3_
         M1       P$2        io                ***   unused    ***
         M2       P$2        io       SC1_
         N1       P$2        io       IF0_
         N2       P$2        io       SC2_
         P1       P$2        io                ***   unused    ***
         P2       P$2        io       DF2_
         R1       P$2        io                ***   unused    ***
         R2       P$2        io                ***   unused    ***
         S1       P$2        io       DF1_
         S2       P$2        io       SC0_
         T1       P$2        io                ***   unused    ***
         T2       P$2        io                ***   unused    ***
         U1       P$2        io                ***   unused    ***
         U2       P$2        io                ***   unused    ***
         V1       P$2        io                ***   unused    ***
         V2       P$2        io                ***   unused    ***

CD27     AC2      C2         pas      C24K4
         AD2      D2         pas      C24J4
         AE2      E2         pas      C24M4
         AF2      F2         pas      V24L4
         AH2      H2         pas      C24P4
         AJ2      J2         pas      C24N4
         AK2      K2         pas      C24S4
         AL2      L2         pas      C24R4
         AM2      M2         pas      C23K4
         AN2      N2         pas      C23J4
         AP2      P2         pas      C23M4
         AR2      R2         pas      C23L4
         AS2      S2         pas      C23P4
         AT2      T2         pas      C23N4
         AU2      U2         pas      C23S4
         AV2      V2         pas      C23R4
         BC2      C2         pas      D18R3
         BD2      D2         pas      D18S3
         BE2      E2         pas      D18N3
         BF2      F2         pas      D18P3
         BH2      H2         pas      D18L3
         BJ2      J2         pas      D18M3
         BK2      K2         pas      D18J3
         BL2      L2         pas      D18K3
         BM2      M2         pas      D19R3
         BN2      N2         pas      D19S3
         BP2      P2         pas      D19N3
         BR2      R2         pas      D19P3
         BS2      S2         pas      D19L3
         BT2      T2         pas      D19M3
         BU2      U2         pas      D19J3
         BV2      V2         pas      D19K3

CD29     AC2      C2         pas      C24K3
         AD2      D2         pas      C24J3
         AE2      E2         pas      C24M3
         AF2      F2         pas      V24L3
         AH2      H2         pas      C24P3
         AJ2      J2         pas      C24N3
         AK2      K2         pas      C24S3
         AL2      L2         pas      C24R3
         AM2      M2         pas      C23K3
         AN2      N2         pas      C23J3
         AP2      P2         pas      C23M3
         AR2      R2         pas      C23L3
         AS2      S2         pas      C23P3
         AT2      T2         pas      C23N3
         AU2      U2         pas      C23S3
         AV2      V2         pas      C23R3
         BC2      C2         pas      D18R4
         BD2      D2         pas      D18S4
         BE2      E2         pas      D18N4
         BF2      F2         pas      D18P4
         BH2      H2         pas      D18L4
         BJ2      J2         pas      D18M4
         BK2      K2         pas      D18J4
         BL2      L2         pas      D18K4
         BM2      M2         pas      D19R4
         BN2      N2         pas      D19S4
         BP2      P2         pas      D19N4
         BR2      R2         pas      D19P4
         BS2      S2         pas      D19L4
         BT2      T2         pas      D19M4
         BU2      U2         pas      D19J4
         BV2      V2         pas      D19K4

CD34     AC2      C2         pas      C24K1
         AD2      D2         pas      C24J1
         AE2      E2         pas      C24M1
         AF2      F2         pas      V24L1
         AH2      H2         pas      C24P1
         AJ2      J2         pas      C24N1
         AK2      K2         pas      C24S1
         AL2      L2         pas      C24R1
         AM2      M2         pas      C23K1
         AN2      N2         pas      C23J1
         AP2      P2         pas      C23M1
         AR2      R2         pas      C23L1
         AS2      S2         pas      C23P1
         AT2      T2         pas      C23N1
         AU2      U2         pas      C23S1
         AV2      V2         pas      C23R1
         BC2      C2         pas      D18R2
         BD2      D2         pas      D18S2
         BE2      E2         pas      D18N2
         BF2      F2         pas      D18P2
         BH2      H2         pas      D18L2
         BJ2      J2         pas      D18M2
         BK2      K2         pas      D18J2
         BL2      L2         pas      D18K2
         BM2      M2         pas      D19R2
         BN2      N2         pas      D19S2
         BP2      P2         pas      D19N2
         BR2      R2         pas      D19P2
         BS2      S2         pas      D19L2
         BT2      T2         pas      D19M2
         BU2      U2         pas      D19J2
         BV2      V2         pas      D19K2

CD36     AC2      C2         pas      C24K2
         AD2      D2         pas      C24J2
         AE2      E2         pas      C24M2
         AF2      F2         pas      V24L2
         AH2      H2         pas      C24P2
         AJ2      J2         pas      C24N2
         AK2      K2         pas      C24S2
         AL2      L2         pas      C24R2
         AM2      M2         pas      C23K2
         AN2      N2         pas      C23J2
         AP2      P2         pas      C23M2
         AR2      R2         pas      C23L2
         AS2      S2         pas      C23P2
         AT2      T2         pas      C23N2
         AU2      U2         pas      C23S2
         AV2      V2         pas      C23R2
         BC2      C2         pas      D18R1
         BD2      D2         pas      D18S1
         BE2      E2         pas      D18N1
         BF2      F2         pas      D18P1
         BH2      H2         pas      D18L1
         BJ2      J2         pas      D18M1
         BK2      K2         pas      D18J1
         BL2      L2         pas      D18K1
         BM2      M2         pas      D19R1
         BN2      N2         pas      D19S1
         BP2      P2         pas      D19N1
         BR2      R2         pas      D19P1
         BS2      S2         pas      D19L1
         BT2      T2         pas      D19M1
         BU2      U2         pas      D19J1
         BV2      V2         pas      D19K1

D01      A2       P$2        io                ***   unused    ***
         B2       P$2        io       -15V
         C2       P$2        io                ***   unused    ***
         D2       P$2        io       RD_HOLE1
         E2       P$2        io       RD_HOLE2
         F2       P$2        io       RD_HOLE3
         H2       P$2        io       RD_HOLE4
         J2       P$2        io       RD_HOLE5
         K2       P$2        io       RD_HOLE6
         L2       P$2        io       RD_HOLE7
         M2       P$2        io       RD_HOLE8
         N2       P$2        io       S_FEED_HOLE
         P2       P$2        io       BA_
         R2       P$2        io       BA
         S2       P$2        io       BB_
         T2       P$2        io       BB
         U2       P$2        io       PWR
         V2       P$2        io       RDR_FEED_SWITCH

D02      A2       P$2        io                ***   unused    ***
         B2       P$2        io                ***   unused    ***
         C2       P$2        io       GND
         D2       P$2        io                ***   unused    ***
         E2       P$2        io                ***   unused    ***
         F2       P$2        io                ***   unused    ***
         H2       P$2        io                ***   unused    ***
         J2       P$2        io                ***   unused    ***
         K2       P$2        io                ***   unused    ***
         L2       P$2        io                ***   unused    ***
         M2       P$2        io                ***   unused    ***
         N2       P$2        io                ***   unused    ***
         P2       P$2        io       PEN_RIGHT
         R2       P$2        io       PEN_LEFT
         S2       P$2        io       DRUM_UP
         T2       P$2        io       DRUM_DOWN
         U2       P$2        io       PEN_UP
         V2       P$2        io       PEN_DOWN

D03      A2       P$2        io       VCC
         B2       P$2        io       -15V
         C2       P$2        io       GND
         D2       P$2        io       X_AXIS
         E2       P$2        io       Y_AXIS
         F2       P$2        io       Z_AXIS
         H2       P$2        io                ***   unused    ***
         J2       P$2        io                ***   unused    ***
         K2       P$2        io                ***   unused    ***
         L2       P$2        io                ***   unused    ***
         M2       P$2        io                ***   unused    ***
         N2       P$2        io                ***   unused    ***
         P2       P$2        io                ***   unused    ***
         R2       P$2        io                ***   unused    ***
         S2       P$2        io                ***   unused    ***
         T2       P$2        io                ***   unused    ***
         U2       P$2        io                ***   unused    ***
         V2       P$2        io       LIGHT_PEN

D04      C2       GND        pwr      GND
         D2       P$2        io       B_LINE_HOLD_
         E2       P$2        io       BTP3
         F2       GND        pwr      GND
         H2       P$2        io       B_MEM_TO_LSR
         J2       GND        pwr      GND
         K2       P$2        io       B_C_
         L2       GND        pwr      GND
         M2       P$2        io       BSTLR
         N2       GND        pwr      GND
         P2       P$2        io       B_DC_INST
         R2       GND        pwr      GND
         S2       P$2        io                ***   unused    ***
         T2       P$2        io       LHS_
         U2       GND        pwr      GND
         V2       P$2        io       B_R0_

D05      A1       IN         in       LHS_
         A2       VCC        pwr      VCC
         B1       IN2        io       LHS_
         C1       IN3        in       LHS_
         C2       GND        pwr      GND
         D1       IN4        in       LHS_
         D2       IN         in       B_R0_
         E1       OUT        out      LHS
         E2       IN2        io       B_R0_
         F1       IN         in                ***   unused    ***
         F2       IN3        in       B_R0_
         H1       IN2        io                ***   unused    ***
         H2       IN4        in       B_R0_
         J1       IN3        in                ***   unused    ***
         J2       OUT        out      R0
         K1       IN4        in                ***   unused    ***
         K2       IN         in                ***   unused    ***
         L1       OUT        out               ***   unused    ***
         L2       IN2        io                ***   unused    ***
         M1       IN         in                ***   unused    ***
         M2       IN3        in                ***   unused    ***
         N1       IN2        io                ***   unused    ***
         N2       IN4        in                ***   unused    ***
         P1       IN3        in                ***   unused    ***
         P2       OUT        out               ***   unused    ***
         R1       IN4        in                ***   unused    ***
         R2       IN         in                ***   unused    ***
         S1       OUT        out               ***   unused    ***
         S2       IN2        io                ***   unused    ***
         T1       GND        pwr      GND
         T2       IN3        in                ***   unused    ***
         U2       IN4        in                ***   unused    ***
         V2       OUT        out               ***   unused    ***

D06      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$4
         F1       OUT        out      LH_TO_HS
         H1       IN         in                ***   unused    ***
         H2       H2         in       N$3
         J1       OUT        out               ***   unused    ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out      N$4
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

D07      A1       IN1        in       N$725
         A2       VCC        pwr      VCC
         B1       IN2        in       HS
         C1       OUT        out      C_NO_SHIFT_
         C2       GND        pwr      GND
         D1       IN1        in       N$725
         D2       IN1        in       STORE_
         E1       IN2        in       HS_
         E2       IN2        in       +3V(58)
         F1       OUT        out      CSR_ENABLE_
         F2       OUT        out      N$725
         H1       IN1        in       +3V(58)
         H2       IN1        in       +3V(58)
         J1       IN2        in       N$3
         J2       IN2        in       N$291
         K1       OUT        out      MEM_TO_LSR_
         K2       OUT        out      N$290
         L1       IN1        in       S
         L2       IN1        in       +3V(58)
         M1       IN2        in       N$285
         M2       IN2        in       N$287
         N1       OUT        out      N$287
         N2       OUT        out      N$288
         P1       IN1        in       +3V(58)
         P2       IN1        in       +3V(58)
         R1       IN2        in       LH_TO_HS
         R2       IN2        in       N$2
         S1       OUT        out      N$5
         S2       OUT        out      N$3
         T1       GND        pwr      GND
         T2       IN1        in       S
         U1       P$1        pas      +3V(58)
         U2       IN2        in       TP1
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$2

D08      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$289
         F1       OUT        out      N$291
         H1       IN         in                ***   unused    ***
         H2       H2         in       N$288
         J1       OUT        out               ***   unused    ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out      N$289
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

D09      A1       IN1        in       S
         A2       VCC        pwr      VCC
         B1       IN2        in       TS2
         C1       IN3        in       MEM09
         C2       GND        pwr      GND
         D1       OUT        out      N$726
         D2       IN1        in       TS3
         E1       IN1        in       N$733
         E2       IN2        in       C
         F1       IN2        in       IOT
         F2       IN3        in       MB11_
         H1       IN3        in       +3V(58)
         H2       OUT        out      TT_CARRY_INSERT_C_
         J1       OUT        out      DC_INST_
         J2       IN1        in                ***   unused    ***
         K1       IN1        in       TT_CARRY_INSERT_C_
         K2       IN2        in                ***   unused    ***
         L1       IN2        in       TT_CARRY_INSERT_S_
         L2       IN3        in                ***   unused    ***
         M1       IN3        in       LINE_HOLD_
         M2       OUT        out               ***   unused    ***
         N1       OUT        out      TT_CARRY_INSERT
         N2       IN1        in       C_
         P1       IN1        in       STORE_
         P2       IN2        in       TT_INST_
         R1       IN2        in       +3V(58)
         R2       IN3        in       S_
         S1       IN3        in       TT_IO_ENABLE_
         S2       OUT        out      TT_L_DISABLE
         T1       GND        pwr      GND
         T2       IN1        in       N$732
         U1       OUT        out      N$732
         U2       IN2        in       TP3
         V1       OUT        out      TT_AC_LOAD_
         V2       IN3        in       +3V(58)

D10      A1       IN1        in       TT_INST
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(23)
         C1       IN3        in       +3V(23)
         C2       GND        pwr      GND
         D1       IN4        in       MB10
         D2       IN1        in       S
         E1       OUT        out      S_SET_
         E2       IN2        in       +3V(58)
         F1       IN1        in       TS2
         F2       IN3        in       MB10
         H1       IN2        in       N$729
         H2       IN4        in       MB11_
         J1       IN3        in       MEM_INH9_11_
         J2       OUT        out      C_SET_
         K1       IN4        in       S
         K2       IN1        in       IOT
         L1       OUT        out      TT_INCREMENT_
         L2       IN2        in       N$733
         M1       IN1        in       R0_
         M2       IN3        in       N$744
         N1       IN2        in       C
         N2       IN4        in       B_FETCH
         P1       IN3        in       TS3
         P2       OUT        out      TT_INST_
         R1       IN4        in       MB11
         R2       IN1        in       R0
         S1       OUT        out      STORE_
         S2       IN2        in       C
         T1       GND        pwr      GND
         T2       IN3        in       TS3
         U1       P$1        pas      +3V(23)
         U2       IN4        in       MB11
         V1       P$1        pas      +3V(57)
         V2       OUT        out      LINE_HOLD_

D11      A1       R          in       +3V(23)
         A2       VCC        pwr      VCC
         B1       C          in       TP4
         C1       D          in       S_SET_
         C2       GND        pwr      GND
         D1       S          in       MANUAL_PRESET_
         D2       C          in       TP4
         E1       1          out      S_
         E2       D          in       C_SET_
         F1       0          out      S
         F2       S          in       MANUAL_PRESET_
         H1       C          in                ***   unused    ***
         H2       1          out      C_
         J1       D          in                ***   unused    ***
         J2       0          out      C
         K1       S          in                ***   unused    ***
         K2       R          in       +3V(57)
         L1       1          out               ***   unused    ***
         L2       C          in       LH_TO_HS
         M1       0          out               ***   unused    ***
         M2       D          in       LHS
         N1       C          in                ***   unused    ***
         N2       S          in       +3V(57)
         P1       D          in                ***   unused    ***
         P2       1          out      HS
         R1       S          in                ***   unused    ***
         R2       0          out      HS_
         S1       1          out               ***   unused    ***
         S2       C          in                ***   unused    ***
         T1       GND        pwr      GND
         T2       D          in                ***   unused    ***
         U1       0          out               ***   unused    ***
         U2       S          in                ***   unused    ***
         V1       0          out               ***   unused    ***
         V2       1          out               ***   unused    ***

D12      A1       IN1        in       DIV_LAST
         A2       VCC        pwr      VCC
         B1       IN2        in       DVI
         C1       OUT        out      DIV_LAST_
         C2       GND        pwr      GND
         D1       IN1        in       N$587
         D2       IN1        in       DIV_LAST_
         E1       IN2        in       +3V(28)
         E2       IN2        in       MQ10_
         F1       OUT        out      N$589
         F2       OUT        out      N$587
         H1       IN1        in       EAE_RIGHT_SHIFT_ENABLE_
         H2       IN1        in       LEFT_SHIFT_
         J1       IN2        in       B_EAE_ON
         J2       IN2        in       +3V(28)
         K1       OUT        out      LEFT_SHIFT_
         K2       OUT        out      B_LEFT_SHIFT
         L1       IN1        in       N$608
         L2       IN1        in       DIV_LAST_
         M1       IN2        in       +3V(28)
         M2       IN2        in       EAE_RUN
         N1       OUT        out      N$604
         N2       OUT        out      N$603
         P1       IN1        in       EAE_TP_
         P2       IN1        in       TP3
         R1       IN2        in       MFTS2_
         R2       IN2        in       EAE_BEGIN
         S1       OUT        out      N$605
         S2       OUT        out      N$595
         T1       GND        pwr      GND
         T2       IN1        in       +3V(28)
         U1       P$1        pas      +3V(28)
         U2       IN2        in       LEFT_SHIFT_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      BB_LEFT_SHIFT

D13      A1       IN1        in       EAE_ACBAR_ENABLE_
         A2       VCC        pwr      VCC
         B1       IN2        in       B_EAE_ON
         C1       OUT        out      EAE_AC_ENABLE_
         C2       GND        pwr      GND
         D1       IN1        in       EAE_INST
         D2       IN1        in       MQ10
         E1       IN2        in       MB09
         E2       IN2        in       DIV_LAST
         F1       OUT        out      N$591
         F2       OUT        out      N$588
         H1       IN1        in       EAE_ON_
         H2       IN1        in       N$683
         J1       IN2        in       +3V(28)
         J2       IN2        in       +3V(28)
         K1       OUT        out      B_EAE_ON
         K2       OUT        out      EAE_INST
         L1       IN1        in       N$684
         L2       IN1        in       OPR
         M1       IN2        in       EAE_INST
         M2       IN2        in       B_EXECUTE
         N1       OUT        out      EAE_E_SET_
         N2       OUT        out      EAE_EXECUTE_
         P1       IN1        in       MB09_
         P2       IN1        in       SC0_3_0
         R1       IN2        in       MB10_
         R2       IN2        in       SC4_
         S1       OUT        out      N$684
         S2       OUT        out      SC_0_
         T1       GND        pwr      GND
         T2       IN1        in       SC_0_
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       MQ11_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$685

D14      A1       IN1        in       EAE_RUN
         A2       VCC        pwr      VCC
         B1       IN2        in       EAE_TP
         C1       OUT        out      EAE_TP_
         C2       GND        pwr      GND
         D1       IN1        in       EAE_TP_
         D2       IN1        in       OPR
         E1       IN2        in       EAE_START_
         E2       IN2        in       B_EXECUTE
         F1       OUT        out      N$607
         F2       OUT        out      N$602
         H1       IN1        in       EAE_BEGIN
         H2       IN1        in       N$606
         J1       IN2        in       SCL_
         J2       IN2        in       N$602
         K1       OUT        out      EAE_SET_
         K2       OUT        out      EAE_BEGIN
         L1       IN1        in       AC01
         L2       IN1        in       NORM_
         M1       IN2        in       AC02_
         M2       IN2        in       NMI
         N1       OUT        out      N$568
         N2       OUT        out      N$606
         P1       IN1        in       +3V(29)
         P2       IN1        in       TP3
         R1       IN2        in       N$601
         R2       IN2        in       EAE_INST
         S1       OUT        out      N$600
         S2       OUT        out      N$601
         T1       GND        pwr      GND
         T2       IN1        in       TP3
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       NMI
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$599

D15      A1       IN1        in       AC00_
         A2       VCC        pwr      VCC
         B1       IN2        in       AC01
         C1       OUT        out      N$579
         C2       GND        pwr      GND
         D1       IN1        in       AC01_
         D2       IN1        in       +3V(29)
         E1       IN2        in       AC00
         E2       IN2        in       N$577
         F1       OUT        out      N$580
         F2       OUT        out      MQ_LOW_AC0
         H1       IN1        in       EAE_IR0_
         H2       IN1        in       +3V(29)
         J1       IN2        in       EAE_IR1
         J2       IN2        in       EAE_COMPLETE_
         K1       OUT        out      MUY_DVI_
         K2       OUT        out      N$590
         L1       IN1        in       N$590
         L2       IN1        in       N$581
         M1       IN2        in       EAE_RUN_
         M2       IN2        in       +3V(29)
         N1       OUT        out      N$609
         N2       OUT        out      MB_TO_SC_ENABLE
         P1       IN1        in       +3V(29)
         P2       IN1        in       MQ11_
         R1       IN2        in       AC_TO_MQ_ENABLE_
         R2       IN2        in       MUY
         S1       OUT        out      AC_TO_MQ_ENABLE
         S2       OUT        out      N$584
         T1       GND        pwr      GND
         T2       IN1        in       N$592
         U1       P$1        pas      +3V(29)
         U2       IN2        in       +3V(29)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      ASR_ENABLE

D16      A1       IN1        in       +3V(30)
         A2       VCC        pwr      VCC
         B1       IN2        in       N$571
         C1       OUT        out      N$574
         C2       GND        pwr      GND
         D1       IN1        in       +3V(30)
         D2       IN1        in       +3V(30)
         E1       IN2        in       N$572
         E2       IN2        in       N$573
         F1       OUT        out      N$576
         F2       OUT        out      N$575
         H1       IN1        in       N$404
         H2       IN1        in       AC01_
         J1       IN2        in       N$405
         J2       IN2        in       AC02
         K1       OUT        out      DIV_LAST
         K2       OUT        out      N$419
         L1       IN1        in       N$685
         L2       IN1        in       N$686
         M1       IN2        in       DVI
         M2       IN2        in       +3V(30)
         N1       OUT        out      N$686
         N2       OUT        out      N$688
         P1       IN1        in       MUY_
         P2       IN1        in       DVI_
         R1       IN2        in       +3V(30)
         R2       IN2        in       +3V(30)
         S1       OUT        out      MUY
         S2       OUT        out      DVI
         T1       GND        pwr      GND
         T2       IN1        in       NMI_
         U1       P$1        pas      +3V(30)
         U2       IN2        in       +3V(30)
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      NMI

D17      A1       IN1        in       EAE_IR1
         A2       VCC        pwr      VCC
         B1       IN2        in       DVI_
         C1       IN3        in       B_EAE_ON
         C2       GND        pwr      GND
         D1       OUT        out      EAE_RIGHT_SHIFT_ENABLE_
         D2       IN1        in       N$579
         E1       IN1        in       SC1
         E2       IN2        in       N$578
         F1       IN2        in       DVI
         F2       IN3        in       N$580
         H1       IN3        in       SC2
         H2       OUT        out      NORM
         J1       OUT        out      N$582
         J2       IN1        in       DIV_LAST_
         K1       IN1        in       B_EAE_ON
         K2       IN2        in       N$582
         L1       IN2        in       N$583
         L2       IN3        in       B_EAE_ON
         M1       IN3        in       DVI
         M2       OUT        out      EAE_NO_SHIFT_ENABLE
         N1       OUT        out      EAE_ACBAR_ENABLE_
         N2       IN1        in       SC0_3_0_
         P1       IN1        in       EAE_ACBAR_ENABLE_
         P2       IN2        in       N$585
         R1       IN2        in       N$591
         R2       IN3        in       N$588
         S1       IN3        in       N$592
         S2       OUT        out      N$583
         T1       GND        pwr      GND
         T2       IN1        in       SCL_
         U1       OUT        out      EAE_L_DISABLE
         U2       IN2        in       TP3
         V1       OUT        out      EAE_START_
         V2       IN3        in       EAE_BEGIN

D18      A1       IN1        in       B_EAE_ON
         A2       VCC        pwr      VCC
         B1       IN2        in       EAE_IR0
         C1       IN3        in       EAE_IR1
         C2       GND        pwr      GND
         D1       OUT        out      N$592
         D2       IN1        in       MB05
         E1       IN1        in       MB11
         E2       IN2        in       OP2
         F1       IN2        in       OP2
         F2       IN3        in       MB11
         H1       IN3        in       MB06
         H2       OUT        out      N$593
         J1       OUT        out      N$598
         J2       IN1        in       AC00
         K1       IN1        in       MB07
         K2       IN2        in       ASR_ENABLE
         L1       IN2        in       EAE_INST
         L2       IN3        in       EAE_IR2_
         M1       IN3        in       TP3
         M2       OUT        out      ASR_L_SET_
         N1       OUT        out      N$594
         N2       IN1        in       MQ00_
         P1       IN1        in       B_EAE_ON
         P2       IN2        in       N$686
         R1       IN2        in       N$688
         R2       IN3        in       B_EAE_ON
         S1       IN3        in       MQ00
         S2       OUT        out      EAE_MQ0_ENABLE_
         T1       GND        pwr      GND
         T2       IN1        in                ***   unused    ***
         U1       OUT        out      EAE_MQ0BAR_ENABLE_
         U2       IN2        in                ***   unused    ***
         V1       OUT        out               ***   unused    ***
         V2       IN3        in                ***   unused    ***

D19      A1       IN1        in       SC2
         A2       VCC        pwr      VCC
         B1       IN2        in       SC3
         C1       IN3        in       SC4
         C2       GND        pwr      GND
         D1       OUT        out      N$678
         D2       IN1        in       N$419
         E1       IN1        in       SC0_3_0
         E2       IN2        in       N$406
         F1       IN2        in       ADDER_L
         F2       IN3        in       N$568
         H1       IN3        in       SC4_
         H2       OUT        out      N$570
         J1       OUT        out      N$404
         J2       IN1        in       SC1
         K1       IN1        in       AC03_
         K2       IN2        in       SC4
         L1       IN2        in       MQ_LOW_AC0
         L2       IN3        in       SC2
         M1       IN3        in       MID_AC0
         M2       OUT        out      N$405
         N1       OUT        out      N$406
         N2       IN1        in       EAE_IR0_
         P1       IN1        in       EAE_IR0_
         P2       IN2        in       EAE_IR1_
         R1       IN2        in       EAE_IR1
         R2       IN3        in       EAE_IR2
         S1       IN3        in       EAE_IR2_
         S2       OUT        out      SCL_
         T1       GND        pwr      GND
         T2       IN1        in       EAE_IR0_
         U1       OUT        out      MUY_
         U2       IN2        in       EAE_IR1
         V1       OUT        out      DVI_
         V2       IN3        in       EAE_IR2

D20      A1       IN1        in       MQ_LOW_AC0
         A2       VCC        pwr      VCC
         B1       IN2        in       MID_AC0
         C1       IN3        in       AC03_
         C2       GND        pwr      GND
         D1       IN4        in       AC02_
         D2       IN1        in       EAE_RIGHT_SHIFT_ENABLE_
         E1       OUT        out      N$578
         E2       IN2        in       B_EAE_ON
         F1       IN1        in       EAE_IR0_
         F2       IN3        in       N$582
         H1       IN2        in       N$586
         H2       IN4        in       DIV_LAST_
         J1       IN3        in       B_EAE_ON
         J2       OUT        out      EAE_LEFT_SHIFT_ENABLE_
         K1       IN4        in       N$584
         K2       IN1        in       MQ01
         L1       OUT        out      EAE_MEM_ENABLE_
         L2       IN2        in       SC1
         M1       IN1        in       B_FETCH
         M2       IN3        in       DIV_LAST
         N1       IN2        in       OPR
         N2       IN4        in       DVI
         P1       IN3        in       MB03
         P2       OUT        out      N$586
         R1       IN4        in       MB11
         R2       IN1        in       EAE_IR0
         S1       OUT        out      N$683
         S2       IN2        in       EAE_IR1_
         T1       GND        pwr      GND
         T2       IN3        in       EAE_IR2_
         U1       P$1        pas               ***   unused    ***
         U2       IN4        in       EAE_INST
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      NMI_

D21      A1       IN1        in       N$574
         A2       VCC        pwr      VCC
         B1       IN2        in       N$576
         C1       IN3        in       N$575
         C2       GND        pwr      GND
         D1       IN4        in       LOW_AC0
         D2       IN1        in       MUY_DVI_
         E1       OUT        out      N$577
         E2       IN2        in       EAE_ON_
         F1       IN1        in       MB11
         F2       IN3        in       OPR
         H1       IN2        in       MB07
         H2       IN4        in       B_EXECUTE
         J1       IN3        in       MB04_
         J2       OUT        out      N$581
         K1       IN4        in       OP2
         K2       IN1        in       MQ00_
         L1       OUT        out      AC_TO_MQ_ENABLE_
         L2       IN2        in       MQ01_
         M1       IN1        in       MQ04_
         M2       IN3        in       MQ02_
         N1       IN2        in       MQ05_
         N2       IN4        in       MQ03_
         P1       IN3        in       MQ06_
         P2       OUT        out      N$571
         R1       IN4        in       MQ07_
         R2       IN1        in       MQ08_
         S1       OUT        out      N$572
         S2       IN2        in       MQ09_
         T1       GND        pwr      GND
         T2       IN3        in       MQ10_
         U1       P$1        pas               ***   unused    ***
         U2       IN4        in       MQ11_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$573

D22      A1       IN1        in       SC1
         A2       VCC        pwr      VCC
         B1       IN2        in       SC2
         C1       IN3        in       SC3
         C2       GND        pwr      GND
         D1       IN4        in       SC4
         D2       IN1        in       EAE_TP_
         E1       OUT        oc       N$677
         E2       IN2        in       SC1_
         F1       IN1        in       N$593
         F2       IN3        in       SC2_
         H1       IN2        in       +3V(31)
         H2       IN4        in       SC3_
         J1       IN3        in       +3V(31)
         J2       OUT        oc       SC0_3_0_
         K1       IN4        in       +3V(31)
         K2       IN1        in       N$598
         L1       OUT        oc       MQ_ENABLE
         L2       IN2        in       +3V(31)
         M1       IN1        in       +3V(31)
         M2       IN3        in       +3V(31)
         N1       IN2        in       +3V(31)
         N2       IN4        in       +3V(31)
         P1       IN3        in       EAE_TG
         P2       OUT        oc       SC_ENABLE
         R1       IN4        in       N$594
         R2       IN1        in       EAE_TG
         S1       OUT        oc       MQ_LOAD
         S2       IN2        in       N$599
         T1       GND        pwr      GND
         T2       IN3        in       +3V(31)
         U1       P$1        pas      +3V(26)
         U2       IN4        in       N$595
         V1       P$1        pas      +3V(27)
         V2       OUT        oc       SC_LOAD

D23      A1       IN1A       in       MUY
         A2       VCC        pwr      VCC
         B1       IN1B       in       SC1
         C1       IN1C       in       SC3
         C2       GND        pwr      GND
         D1       IN1D       in       SC4
         D2       IN1A       in       +3V(32)
         E1       IN2A       in       DIV_LAST
         E2       IN1B       in       +3V(32)
         F1       IN2B       in       DVI
         F2       IN1C       in       SC0_3_0
         H1       IN3A       in       GND
         H2       IN1D       in       SC4_
         J1       IN3B       in       GND
         J2       IN2A       in       MQ11
         K1       IN4A       in       SC_FULL
         K2       IN2B       in       ADDER_L_
         L1       IN4B       in       SC0
         L2       IN3A       in       ADDER_L
         M1       IN5A       in       +3V(32)
         M2       IN3B       in       MQ11_
         N1       IN5B       in       NMI
         N2       IN4A       in       +3V(32)
         P1       IN5C       in       N$570
         P2       IN4B       in       +3V(32)
         R1       OUT        out      EAE_COMPLETE_
         R2       IN4C       in       +3V(32)
         S1       IN1A       in       N$589
         S2       IN4D       in       DVI_
         T1       GND        pwr      GND
         T2       OUT        out      N$682
         U1       IN1B       in       MQ11
         U2       IN2B       in       MQ11_
         V1       IN2A       in       MQ10
         V2       OUT        out      N$585

D24      A1       R          in       EAE_IR_CLEAR_
         A2       VCC        pwr      VCC
         B1       C          in       N$600
         C1       D          in       MB08
         C2       GND        pwr      GND
         D1       S          in       +3V(32)
         D2       C          in       N$600
         E1       1          out      EAE_IR0
         E2       D          in       MB09
         F1       0          out      EAE_IR0_
         F2       S          in       +3V(32)
         H1       C          in       N$600
         H2       1          out      EAE_IR1
         J1       D          in       MB10
         J2       0          out      EAE_IR1_
         K1       S          in       +3V(32)
         K2       R          in       B_POWER_CLEAR_
         L1       1          out      EAE_IR2
         L2       C          in       N$607
         M1       0          out      EAE_IR2_
         M2       D          in       N$609
         N1       C          in       N$608
         N2       S          in       +3V(32)
         P1       D          in       EAE_ON
         P2       1          out      EAE_ON
         R1       S          in       EAE_START_
         R2       0          out      EAE_ON_
         S1       1          out      EAE_RUN
         S2       C          in       N$605
         T1       GND        pwr      GND
         T2       D          in       N$603
         U1       0          out      EAE_RUN_
         U2       S          in       N$604
         V1       0          out               *** unconnected ***
         V2       1          out      EAE_TG

D25      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD
         E2       E2         in       MA03_
         F2       F2         in       MA05
         H2       H2         in       MA04
         J2       J2         pas      D18J3
         K2       K2         pas      D18K3
         L2       L2         pas      D18L3
         M2       M2         pas      D18M3
         N2       N2         pas      D18N3
         P2       P2         pas      D18P3
         R2       R2         pas      D18R3
         S2       S2         pas      D18S3
         T2       T2         in       X_RW_RETURN
         V2       V2         in       NEG_CLAMP

D26      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD
         E2       E2         in       MA03
         F2       F2         in       MA05
         H2       H2         in       MA04
         J2       J2         pas      D19J3
         K2       K2         pas      D19K3
         L2       L2         pas      D19L3
         M2       M2         pas      D19M3
         N2       N2         pas      D19N3
         P2       P2         pas      D19P3
         R2       R2         pas      D19R3
         S2       S2         pas      D19S3
         T2       T2         in       X_RW_RETURN
         V2       V2         in       NEG_CLAMP

D30      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD
         E2       E2         in       MA09_
         F2       F2         in       MA11
         H2       H2         in       MA10
         J2       J2         pas      D18J4
         K2       K2         pas      D18K4
         L2       L2         pas      D18L4
         M2       M2         pas      D18M4
         N2       N2         pas      D18N4
         P2       P2         pas      D18P4
         R2       R2         pas      D18R4
         S2       S2         pas      D18S4
         T2       T2         in       Y_RW_RETURN
         V2       V2         in       NEG_CLAMP

D31      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD
         E2       E2         in       MA09
         F2       F2         in       MA11
         H2       H2         in       MA10
         J2       J2         pas      D19J4
         K2       K2         pas      D19K4
         L2       L2         pas      D19L4
         M2       M2         pas      D19M4
         N2       N2         pas      D19N4
         P2       P2         pas      D19P4
         R2       R2         pas      D19R4
         S2       S2         pas      D19S4
         T2       T2         in       Y_RW_RETURN
         V2       V2         in       NEG_CLAMP

D32      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD_
         E2       E2         in       MA03_
         F2       F2         in       MA05
         H2       H2         in       MA04
         J2       J2         pas      D18J2
         K2       K2         pas      D18K2
         L2       L2         pas      D18L2
         M2       M2         pas      D18M2
         N2       N2         pas      D18N2
         P2       P2         pas      D18P2
         R2       R2         pas      D18R2
         S2       S2         pas      D18S2
         T2       T2         in       X_RW_RETURN
         V2       V2         in       NEG_CLAMP

D33      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       BB_FIELD_
         E2       E2         in       MA03
         F2       F2         in       MA05
         H2       H2         in       MA04
         J2       J2         pas      D19J2
         K2       K2         pas      D19K2
         L2       L2         pas      D19L2
         M2       M2         pas      D19M2
         N2       N2         pas      D19N2
         P2       P2         pas      D19P2
         R2       R2         pas      D19R2
         S2       S2         pas      D19S2
         T2       T2         in       X_RW_RETURN
         V2       V2         in       NEG_CLAMP

D37      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD_
         E2       E2         in       MA09_
         F2       F2         in       MA11
         H2       H2         in       MA10
         J2       J2         pas      D18J1
         K2       K2         pas      D18K1
         L2       L2         pas      D18L1
         M2       M2         pas      D18M1
         N2       N2         pas      D18N1
         P2       P2         pas      D18P1
         R2       R2         pas      D18R1
         S2       S2         pas      D18S1
         T2       T2         in       Y_RW_RETURN
         V2       V2         in       NEG_CLAMP

D38      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         in       B_FIELD_
         E2       E2         in       MA09
         F2       F2         in       MA11
         H2       H2         in       MA10
         J2       J2         pas      D19J1
         K2       K2         pas      D19K1
         L2       L2         pas      D19L1
         M2       M2         pas      D19M1
         N2       N2         pas      D19N1
         P2       P2         pas      D19P1
         R2       R2         pas      D19R1
         S2       S2         pas      D19S1
         T2       T2         in       Y_RW_RETURN
         V2       V2         in       NEG_CLAMP

D39      A1       A1         in       +3V(22)
         A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D1       D1         in       +3V(42)
         D2       D2         in       READ
         E1       E1         pas      N$280
         E2       E2         in       +3V(22)
         F1       H          in                ***   unused    ***
         F2       F2         pas      X_RW_RETURN
         H1       J          pas               ***   unused    ***
         H2       H          in                ***   unused    ***
         J1       K          pas               ***   unused    ***
         J2       J          pas               ***   unused    ***
         K1       K1         pas      X_RW_RETURN
         K2       K          pas               ***   unused    ***
         L1       L1         in       +3V(42)
         L2       L2         pas      N$278
         M1       M1         pas      N$279
         M2       M2         in       READ
         N1       H          in                ***   unused    ***
         N2       N2         in       +3V(22)
         P1       J          pas               ***   unused    ***
         P2       P2         pas      Y_RW_RETURN
         R1       K          pas               ***   unused    ***
         R2       H          in                ***   unused    ***
         S1       S1         pas      Y_RW_RETURN
         S2       J          pas               ***   unused    ***
         T1       GND        pwr      GND
         T2       K          pas               ***   unused    ***
         U2       U2         pas      N$276
         V2       V2         in       NEG_CLAMP

D40      A1       P$2        io       WORD_COUNT_
         A2       P$2        io                ***   unused    ***
         B1       P$2        io       DEFER_
         B2       P$2        io                ***   unused    ***
         C1       P$2        io                ***   unused    ***
         C2       P$2        io                ***   unused    ***
         D1       P$2        io       INT_ENABLE_
         D2       P$2        io       OPR_
         E1       P$2        io       CURRENT_ADDRESS_
         E2       P$2        io       BREAK_
         F1       P$2        io       RUN_
         F2       P$2        io                ***   unused    ***
         H1       P$2        io                ***   unused    ***
         H2       P$2        io       IOT_
         J1       P$2        io                ***   unused    ***
         J2       P$2        io                ***   unused    ***
         K1       P$2        io                ***   unused    ***
         K2       P$2        io                ***   unused    ***
         L1       P$2        io                ***   unused    ***
         L2       P$2        io       JMP_
         M1       P$2        io       PAUSE_
         M2       P$2        io       AND_
         N1       P$2        io       FETCH_
         N2       P$2        io                ***   unused    ***
         P1       P$2        io       ISZ_
         P2       P$2        io                ***   unused    ***
         R1       P$2        io       EXECUTE_
         R2       P$2        io       DCA_
         S1       P$2        io       JMS_
         S2       P$2        io                ***   unused    ***
         T1       P$2        io                ***   unused    ***
         T2       P$2        io       TAD_
         U1       P$2        io                ***   unused    ***
         U2       P$2        io                ***   unused    ***
         V1       P$2        io                ***   unused    ***
         V2       P$2        io                ***   unused    ***

E03      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

E04      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

E05      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

E06      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

E07      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

E08      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

E09      A1       IN1        in       S_
         A2       VCC        pwr      VCC
         B1       IN2        in       TP1
         C1       OUT        out      N$1
         C2       GND        pwr      GND
         D1       IN1        in       N$5
         D2       IN1        in       S_
         E1       IN2        in       N$1
         E2       IN2        in       N$285
         F1       OUT        out      E09F1
         F2       OUT        out      N$286
         H1       IN1        in       N$290
         H2       IN1        in       MEM_ENABLE5_8
         J1       IN2        in       N$286
         J2       IN2        in       MEM_INH9_11_
         K1       OUT        out      N$292
         K2       OUT        out      N$58
         L1       IN1        in                ***   unused    ***
         L2       IN1        in       +3V(58)
         M1       IN2        in                ***   unused    ***
         M2       IN2        in       IOP1_
         N1       OUT        out               ***   unused    ***
         N2       OUT        out      BIOP1
         P1       IN1        in       +3V(58)
         P2       IN1        in       +3V(58)
         R1       IN2        in       IOP2_
         R2       IN2        in       IOP4_
         S1       OUT        out      BIOP2
         S2       OUT        out      BIOP4
         T1       GND        pwr      GND
         T2       IN1        in       IOP124_
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       IO_ON
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      IO_PC_ENABLE_

E11      A1       IN1        in       KEY_LA_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(33)
         C1       OUT        out      KEY_LA
         C2       GND        pwr      GND
         D1       IN1        in       KEY_ST_
         D2       IN1        in       KEY_DP_
         E1       IN2        in       RESTART_
         E2       IN2        in       +3V(33)
         F1       OUT        out      KEY_ST
         F2       OUT        out      KEY_DP
         H1       IN1        in       KEY_DP_
         H2       IN1        in       +3V(33)
         J1       IN2        in       KEY_EX_
         J2       IN2        in       KEY_SS_
         K1       OUT        out      KEY_EXDP
         K2       OUT        out      KEY_SS
         L1       IN1        in       KEY_STOP_
         L2       IN1        in       KEY_EXDP
         M1       IN2        in       KEY_SI_
         M2       IN2        in       +3V(33)
         N1       OUT        out      KEY_SISTOP
         N2       OUT        out      KEY_EXDP_
         P1       IN1        in       N$120
         P2       IN1        in       +3V(33)
         R1       IN2        in       +3V(69)
         R2       IN2        in       KEY_CONT_
         S1       OUT        out      IOP124_
         S2       OUT        out      KEY_CONT
         T1       GND        pwr      GND
         T2       IN1        in       BREAK
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       MEMORY_INCREMENT
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$117

E12      A1       IN1        in       N$15
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(33)
         C1       OUT        out      N$16
         C2       GND        pwr      GND
         D1       IN1        in       IO_START_
         D2       IN1        in       EAE_END
         E1       IN2        in       EAE_START_
         E2       IN2        in       IO_END_
         F1       OUT        out      N$15
         F2       OUT        out      N$17
         H1       IN1        in       IO_END
         H2       IN1        in       KEY_EXDP_
         J1       IN2        in       +3V(33)
         J2       IN2        in       KEY_LA_
         K1       OUT        out      IO_END_
         K2       OUT        out      KEY_LAEXDP
         L1       IN1        in       +3V(33)
         L2       IN1        in       RESTART
         M1       IN2        in       SLOW_CYCLE_
         M2       IN2        in       MFTP1
         N1       OUT        out      SLOW_CYCLE
         N2       OUT        out      N$53
         P1       IN1        in       N$266
         P2       IN1        in       WORD_COUNT_
         R1       IN2        in       +3V(33)
         R2       IN2        in       N$117
         S1       OUT        out      TT_SKIP_
         S2       OUT        out      N$118
         T1       GND        pwr      GND
         T2       IN1        in       +3V(33)
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       N$265
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      TT_INT_

E13      A1       IN1A       in       MB10
         A2       VCC        pwr      VCC
         B1       IN1B       in       MB11_
         C1       IN1C       in       OP2
         C2       GND        pwr      GND
         D1       IN1D       in       UF_
         D2       IN1A       in                ***   unused    ***
         E1       IN2A       in       KEY_SISTOP
         E2       IN1B       in                ***   unused    ***
         F1       IN2B       in       F_SET
         F2       IN1C       in                ***   unused    ***
         H1       IN3A       in       KEY_EXDP
         H2       IN1D       in                ***   unused    ***
         J1       IN3B       in       MFTS0
         J2       IN2A       in                ***   unused    ***
         K1       IN4A       in       STOP_OK
         K2       IN2B       in                ***   unused    ***
         L1       IN4B       in       POWER_OK_
         L2       IN3A       in                ***   unused    ***
         M1       IN5A       in       KEY_SS
         M2       IN3B       in                ***   unused    ***
         N1       IN5B       in       +3V(34)
         N2       IN4A       in                ***   unused    ***
         P1       IN5C       in       +3V(34)
         P2       IN4B       in                ***   unused    ***
         R1       OUT        out      N$11
         R2       IN4C       in                ***   unused    ***
         S1       IN1A       in                ***   unused    ***
         S2       IN4D       in                ***   unused    ***
         T1       GND        pwr      GND
         T2       OUT        out               ***   unused    ***
         U1       IN1B       in                ***   unused    ***
         U2       IN2B       in                ***   unused    ***
         V1       IN2A       in                ***   unused    ***
         V2       OUT        out               ***   unused    ***

E14      A1       IN1        in       MEM_IDLE
         A2       VCC        pwr      VCC
         B1       IN2        in       PAUSE_
         C1       IN3        in       RUN
         C2       GND        pwr      GND
         D1       OUT        out      N$19
         D2       IN1        in       RESTART_
         E1       IN1        in       N$135
         E2       IN2        in       MFTS1
         F1       IN2        in       N$125
         F2       IN3        in       KEY_STEXDP
         H1       IN3        in       MB10
         H2       OUT        out      N$64
         J1       OUT        out      CLEAR_IFDFBF_
         J2       IN1        in       KEY_ST_
         K1       IN1        in       TP3
         K2       IN2        in       RESTART_
         L1       IN2        in       EAE_SET_
         L2       IN3        in       KEY_EXDP_
         M1       IN3        in       SLOW_CYCLE_
         M2       OUT        out      KEY_STEXDP
         N1       OUT        out      N$25
         N2       IN1        in       N$25
         P1       IN1        in       IOP4_SET_
         P2       IN2        in       EAE_END
         R1       IN2        in       IOP2_SET_
         R2       IN3        in       IO_END_
         S1       IN3        in       IOP1_SET_
         S2       OUT        out      INT_STROBE
         T1       GND        pwr      GND
         T2       IN1        in       MFTS0
         U1       OUT        out      N$46
         U2       IN2        in       MFTS1_
         V1       OUT        out      N$13
         V2       IN3        in       MFTS2_

E15      A1       IN1        in       MFTP2
         A2       VCC        pwr      VCC
         B1       IN2        in       KEY_LA_
         C1       OUT        out      N$20
         C2       GND        pwr      GND
         D1       IN1        in       N$20
         D2       IN1        in       N$19
         E1       IN2        in       N$19
         E2       IN2        in       N$21
         F1       OUT        out      MEM_START
         F2       OUT        out      TP4
         H1       IN1        in       MFTP2
         H2       IN1        in       STROBE_
         J1       IN2        in       KEY_CONT
         J2       IN2        in       +3V(34)
         K1       OUT        out      N$21
         K2       OUT        out      TP1
         L1       IN1        in       TP2
         L2       IN1        in       INT_STROBE
         M1       IN2        in       +3V(34)
         M2       IN2        in       +3V(34)
         N1       OUT        out      N$24
         N2       OUT        out      INT_STROBE_
         P1       IN1        in       TP3
         P2       IN1        in       +3V(34)
         R1       IN2        in       SLOW_CYCLE
         R2       IN2        in       IO_START_
         S1       OUT        out      IO_START_
         S2       OUT        out      N$29
         T1       GND        pwr      GND
         T2       IN1        in       N$13
         U1       P$1        pas      +3V(34)
         U2       IN2        in       +3V(34)
         V1       P$1        pas      +3V(35)
         V2       OUT        out      MFTS3

E16      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$14
         F1       OUT        out      N$18
         H1       IN         in                ***   unused    ***
         H2       H2         in       N$17
         J1       OUT        out               ***   unused    ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out      N$14
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

E17      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$22
         F1       OUT        out      TP2
         H1       IN         in       N$748
         H2       H2         in       E09F1
         J1       OUT        out      TP3
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out      N$22
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U2       U2         out      N$748
         V2       V2         out               *** unconnected ***

E18      A1       R          in       STROBE_
         A2       VCC        pwr      VCC
         B1       C          in       TP4
         C1       D          in       +3V(35)
         C2       GND        pwr      GND
         D1       S          in       MANUAL_PRESET_
         D2       C          in       GND
         E1       1          out      TS1
         E2       D          in       GND
         F1       0          out      TS1_
         F2       S          in       MEM_DONE_
         H1       C          in       N$18
         H2       1          out      MEM_IDLE
         J1       D          in       GND
         J2       0          out               *** unconnected ***
         K1       S          in       N$16
         K2       R          in       B_POWER_CLEAR_
         L1       1          out               *** unconnected ***
         L2       C          in       TP3
         M1       0          out      PAUSE_
         M2       D          in       N$11
         N1       C          in       N$111
         N2       S          in       +3V(35)
         P1       D          in       N$108
         P2       1          out      RUN
         R1       S          in       PC_LOAD_
         R2       0          out      RUN_
         S1       1          out      SKIP_
         S2       C          in                ***   unused    ***
         T1       GND        pwr      GND
         T2       D          in                ***   unused    ***
         U1       0          out               *** unconnected ***
         U2       S          in                ***   unused    ***
         V1       0          out               ***   unused    ***
         V2       1          out               ***   unused    ***

E19      A1       R          in       MANUAL_PRESET_
         A2       VCC        pwr      VCC
         B1       C          in       TP2
         C1       D          in       GND
         C2       GND        pwr      GND
         D1       S          in       STROBE_
         D2       C          in       TP3
         E1       1          out      TS2
         E2       D          in       GND
         F1       0          out               *** unconnected ***
         F2       S          in       N$24
         H1       C          in       TP4
         H2       1          out      TS3
         J1       D          in       GND
         J2       0          out      TS3_
         K1       S          in       INT_STROBE_
         K2       R          in       INITIALIZE_
         L1       1          out      TS4
         L2       C          in       IOP1_CLR
         M1       0          out      TS4_
         M2       D          in       GND
         N1       C          in       IOP2_CLR
         N2       S          in       IOP1_SET_
         P1       D          in       GND
         P2       1          out      IOP1
         R1       S          in       IOP2_SET_
         R2       0          out      IOP1_
         S1       1          out      IOP2
         S2       C          in       IOP4_CLR
         T1       GND        pwr      GND
         T2       D          in       GND
         U1       0          out      IOP2_
         U2       S          in       IOP4_SET_
         V1       0          out      IOP4_
         V2       1          out      IOP4

E20      A1       R          in       N$6
         A2       VCC        pwr      VCC
         B1       C          in       N$51
         C1       D          in       N$50
         C2       GND        pwr      GND
         D1       S          in       +3V(35)
         D2       C          in       N$51
         E1       1          out      IR0_
         E2       D          in       MEM01
         F1       0          out      IR0
         F2       S          in       +3V(35)
         H1       C          in       N$51
         H2       1          out      IR1
         J1       D          in       MEM02
         J2       0          out      IR1_
         K1       S          in       +3V(35)
         K2       R          in       MANUAL_PRESET_
         L1       1          out      IR2
         L2       C          in       TP1
         M1       0          out      IR2_
         M2       D          in       BRK_RQST
         N1       C          in       IO_END
         N2       S          in       +3V(35)
         P1       D          in       GND
         P2       1          out      BRK_SYNC
         R1       S          in       IO_START_
         R2       0          out               *** unconnected ***
         S1       1          out      IO_ON
         S2       C          in                ***   unused    ***
         T1       GND        pwr      GND
         T2       D          in                ***   unused    ***
         U1       0          out               *** unconnected ***
         U2       S          in                ***   unused    ***
         V1       0          out               ***   unused    ***
         V2       1          out               ***   unused    ***

E21      A1       IN1        in       IR0_
         A2       VCC        pwr      VCC
         B1       IN2        in       IR1_
         C1       IN3        in       IR2
         C2       GND        pwr      GND
         D1       OUT        out      TAD_
         D2       IN1        in       IR0_
         E1       IN1        in       IR0_
         E2       IN2        in       IR1_
         F1       IN2        in       IR1
         F2       IN3        in       IR2_
         H1       IN3        in       IR2_
         H2       OUT        out      AND_
         J1       OUT        out      ISZ_
         J2       IN1        in       IR0_
         K1       IN1        in       IR0
         K2       IN2        in       IR1
         L1       IN2        in       IR1_
         L2       IN3        in       IR2
         M1       IN3        in       IR2_
         M2       OUT        out      DCA_
         N1       OUT        out      JMS_
         N2       IN1        in       IR0
         P1       IN1        in       IR0
         P2       IN2        in       IR1
         R1       IN2        in       IR1_
         R2       IN3        in       IR2_
         S1       IN3        in       IR2
         S2       OUT        out      I_IOT_
         T1       GND        pwr      GND
         T2       IN1        in       IR0
         U1       OUT        out      JMP_
         U2       IN2        in       IR1
         V1       OUT        out      OPR_
         V2       IN3        in       IR2

E22      A1       IN1        in       AND_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(55)
         C1       OUT        out      AND
         C2       GND        pwr      GND
         D1       IN1        in       TAD_
         D2       IN1        in       ISZ_
         E1       IN2        in       +3V(55)
         E2       IN2        in       +3V(55)
         F1       OUT        out      TAD
         F2       OUT        out      ISZ
         H1       IN1        in       JMS_
         H2       IN1        in       DCA_
         J1       IN2        in       +3V(55)
         J2       IN2        in       +3V(55)
         K1       OUT        out      JMS
         K2       OUT        out      DCA
         L1       IN1        in       TP2
         L2       IN1        in       JMP_
         M1       IN2        in       B_FETCH
         M2       IN2        in       +3V(36)
         N1       OUT        out      EAE_IR_CLEAR_
         N2       OUT        out      JMP
         P1       IN1        in       EAE_IR_CLEAR_
         P2       IN1        in       OPR_
         R1       IN2        in       +3V(36)
         R2       IN2        in       +3V(36)
         S1       OUT        out      N$51
         S2       OUT        out      OPR
         T1       GND        pwr      GND
         T2       IN1        in       I_IOT_
         U1       P$1        pas      +3V(36)
         U2       IN2        in       +3V(36)
         V1       P$1        pas      +3V(31)
         V2       OUT        out               *** unconnected ***

E23      A1       R          in       MANUAL_PRESET_
         A2       VCC        pwr      VCC
         B1       C          in       TP4
         C1       D          in       F_SET
         C2       GND        pwr      GND
         D1       S          in       N$52
         D2       C          in       TP4
         E1       1          out               *** unconnected ***
         E2       D          in       D_SET
         F1       0          out      FETCH_
         F2       S          in       +3V(36)
         H1       C          in       TP4
         H2       1          out      DEFER
         J1       D          in       E_SET
         J2       0          out      DEFER_
         K1       S          in       +3V(36)
         K2       R          in       MANUAL_PRESET_
         L1       1          out               *** unconnected ***
         L2       C          in       TP4
         M1       0          out      EXECUTE_
         M2       D          in       WC_SET
         N1       C          in       TP4
         N2       S          in       +3V(36)
         P1       D          in       WORD_COUNT
         P2       1          out      WORD_COUNT
         R1       S          in       +3V(36)
         R2       0          out      WORD_COUNT_
         S1       1          out      CURRENT_ADDRESS
         S2       C          in       TP4
         T1       GND        pwr      GND
         T2       D          in       B_SET
         U1       0          out      CURRENT_ADDRESS_
         U2       S          in       +3V(36)
         V1       0          out      BREAK_
         V2       1          out      BREAK

E24      A1       IN1        in       EAE_ON_
         A2       VCC        pwr      VCC
         B1       IN2        in       ADDER_L_
         C1       OUT        out      N$140
         C2       GND        pwr      GND
         D1       IN1        in       DEFER
         D2       IN1        in       IR0
         E1       IN2        in       JMP_
         E2       IN2        in       IR1
         F1       OUT        out      N$54
         F2       OUT        out      IOT_OPR_
         H1       IN1        in       N$59
         H2       IN1        in       TP4
         J1       IN2        in       +3V(36)
         J2       IN2        in       INT_OK
         K1       OUT        out      SPECIAL_CYCLE_
         K2       OUT        out      N$6
         L1       IN1        in       AC00
         L2       IN1        in       N$100
         M1       IN2        in       MB05
         M2       IN2        in       +3V(36)
         N1       OUT        out      N$104
         N2       OUT        out      N$103
         P1       IN1        in       +3V(36)
         P2       IN1        in       +3V(36)
         R1       IN2        in       N$99
         R2       IN2        in       N$98
         S1       OUT        out      MID_AC0
         S2       OUT        out      LOW_AC0
         T1       GND        pwr      GND
         T2       IN1        in       LINK
         U1       P$1        pas      +3V(32)
         U2       IN2        in       MB07
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$102

E25      A1       IN1        in       N$140
         A2       VCC        pwr      VCC
         B1       IN2        in       EAE_MQ0BAR_ENABLE_
         C1       IN3        in       EAE_MQ0_ENABLE_
         C2       GND        pwr      GND
         D1       OUT        out      E25D1
         D2       IN1        in       INT_SYNC
         E1       IN1        in       TT_SET_
         E2       IN2        in       INT_INHIBIT_
         F1       IN2        in       CURRENT_ADDRESS_
         F2       IN3        in       INT_DELAY
         H1       IN3        in       WORD_COUNT_
         H2       OUT        out      INT_OK_
         J1       OUT        out      N$59
         J2       IN1        in       IOT_OPR_
         K1       IN1        in       N$104
         K2       IN2        in       B_FETCH
         L1       IN2        in       N$101
         L2       IN3        in       MB03
         M1       IN3        in       N$102
         M2       OUT        out      D_SET_
         N1       OUT        out      N$105
         N2       IN1        in       MB11_
         P1       IN1        in       N$113
         P2       IN2        in       N$105
         R1       IN2        in       TP2E_
         R2       IN3        in       OP2
         S1       IN3        in       N$115
         S2       OUT        out      N$107
         T1       GND        pwr      GND
         T2       IN1        in       TP3
         U1       OUT        out      N$111
         U2       IN2        in       B_FETCH
         V1       OUT        out      N$113
         V2       IN3        in       OPR

E26      A1       IN1A       in       TP3
         A2       VCC        pwr      VCC
         B1       IN1B       in       JMP
         C1       IN1C       in       MB03_
         C2       GND        pwr      GND
         D1       IN1D       in       B_FETCH
         D2       IN1A       in       +3V(37)
         E1       IN2A       in       TP1
         E2       IN1B       in       TP3
         F1       IN2B       in       PC_INCREMENT
         F2       IN1C       in       N$93
         H1       IN3A       in       TP3
         H2       IN1D       in       B_EXECUTE
         J1       IN3B       in       TT_CARRY_INSERT
         J2       IN2A       in       MFTP2
         K1       IN4A       in       MFTP2
         K2       IN2B       in       KEY_ST
         L1       IN4B       in       KEY_LAEXDP
         L2       IN3A       in       IO_STROBE
         M1       IN5A       in       TP3
         M2       IN3B       in       IOT
         N1       IN5B       in       DEFER
         N2       IN4A       in       +3V(37)
         P1       IN5C       in       JMP
         P2       IN4B       in       TP3
         R1       OUT        out      N$96
         R2       IN4C       in       B_FETCH
         S1       IN1A       in       TP1
         S2       IN4D       in       OPR
         T1       GND        pwr      GND
         T2       OUT        out      N$95
         U1       IN1B       in       INT_OK
         U2       IN2B       in       KEY_ST
         V1       IN2A       in       MFTP2
         V2       OUT        out      0_TO_INT_ENAB_

E27      A1       IN1A       in       TS2
         A2       VCC        pwr      VCC
         B1       IN1B       in       B_EXECUTE
         C1       IN1C       in       +3V(37)
         C2       GND        pwr      GND
         D1       IN1D       in       ISZ
         D2       IN1A       in       WORD_COUNT
         E1       IN2A       in       TS1
         E2       IN1B       in       +3V(37)
         F1       IN2B       in       PC_INCREMENT
         F2       IN1C       in       +3V(37)
         H1       IN3A       in       OP1
         H2       IN1D       in       +3V(37)
         J1       IN3B       in       MB11
         J2       IN2A       in       MFTS2
         K1       IN4A       in       N$80
         K2       IN2B       in       KEY_EXDP
         L1       IN4B       in       SKIP_OR
         L2       IN3A       in       CA_INCREMENT
         M1       IN5A       in       TS3
         M2       IN3B       in       CURRENT_ADDRESS
         N1       IN5B       in       B_EXECUTE
         N2       IN4A       in       +3V(37)
         P1       IN5C       in       JMS
         P2       IN4B       in       TS2
         R1       OUT        out      N$82
         R2       IN4C       in       MEMORY_INCREMENT
         S1       IN1A       in                ***   unused    ***
         S2       IN4D       in       BREAK
         T1       GND        pwr      GND
         T2       OUT        out      N$81
         U1       IN1B       in                ***   unused    ***
         U2       IN2B       in                ***   unused    ***
         V1       IN2A       in                ***   unused    ***
         V2       OUT        out               ***   unused    ***

E28      A1       IN1A       in       +3V(37)
         A2       VCC        pwr      VCC
         B1       IN1B       in       MB05_
         C1       IN1C       in       OP1
         C2       GND        pwr      GND
         D1       IN1D       in       MB07
         D2       IN1A       in       TS2
         E1       IN2A       in       MFTS2
         E2       IN1B       in       B_EXECUTE
         F1       IN2B       in       KEY_ST
         F2       IN1C       in       CARRY_OUT0
         H1       IN3A       in       +3V(37)
         H2       IN1D       in       ISZ
         J1       IN3B       in       TT_L_DISABLE
         J2       IN2A       in       IO_ENABLE
         K1       IN4A       in       +3V(38)
         K2       IN2B       in       IO_SKIP
         L1       IN4B       in       EAE_L_DISABLE
         L2       IN3A       in       N$106
         M1       IN5A       in       MB05
         M2       IN3B       in       MB08_
         N1       IN5B       in       OP1
         N2       IN4A       in       N$107
         P1       IN5C       in       MB07_
         P2       IN4B       in       OP2
         R1       OUT        out      L_ENABLE
         R2       IN4C       in       MB08
         S1       IN1A       in                ***   unused    ***
         S2       IN4D       in       MB11_
         T1       GND        pwr      GND
         T2       OUT        out      N$108
         U1       IN1B       in                ***   unused    ***
         U2       IN2B       in                ***   unused    ***
         V1       IN2A       in                ***   unused    ***
         V2       OUT        out               ***   unused    ***

E29      A1       IN1A       in       TS3
         A2       VCC        pwr      VCC
         B1       IN1B       in       +3V(38)
         C1       IN1C       in       DEFER
         C2       GND        pwr      GND
         D1       IN1D       in       JMP
         D2       IN1A       in       B_EXECUTE
         E1       IN2A       in       TS2
         E2       IN1B       in       +3V(38)
         F1       IN2B       in       N$68
         F2       IN1C       in       JMS
         H1       IN3A       in       +3V(38)
         H2       IN1D       in       +3V(38)
         J1       IN3B       in       GND
         J2       IN2A       in       DCA
         K1       IN4A       in       TS4
         K2       IN2B       in       B_EXECUTE
         L1       IN4B       in       CURRENT_ADDRESS
         L2       IN3A       in       BREAK
         M1       IN5A       in       TS4
         M2       IN3B       in       DATA_IN
         N1       IN5B       in       DEFER
         N2       IN4A       in       MFTS3
         P1       IN5C       in       JMP_
         P2       IN4B       in       +3V(38)
         R1       OUT        out      N$57
         R2       IN4C       in       +3V(38)
         S1       IN1A       in                ***   unused    ***
         S2       IN4D       in       KEY_DP
         T1       GND        pwr      GND
         T2       OUT        out      N$68
         U1       IN1B       in                ***   unused    ***
         U2       IN2B       in                ***   unused    ***
         V1       IN2A       in                ***   unused    ***
         V2       OUT        out               ***   unused    ***

E30      A1       IN1A       in       GND
         A2       VCC        pwr      VCC
         B1       IN1B       in       +3V(39)
         C1       IN1C       in       +3V(39)
         C2       GND        pwr      GND
         D1       IN1D       in       +3V(39)
         D2       IN1A       in       OP2
         E1       IN2A       in       TS1
         E2       IN1B       in       +3V(39)
         F1       IN2B       in       PC_INCREMENT
         F2       IN1C       in       AC_TO_MQ_ENABLE_
         H1       IN3A       in       TS4
         H2       IN1D       in       MB04_
         J1       IN3B       in       WORD_COUNT
         J2       IN2A       in       IO_ENABLE
         K1       IN4A       in       MFTS2
         K2       IN2B       in       AC_CLEAR_
         L1       IN4B       in       KEY_EXDP
         L2       IN3A       in       OP1
         M1       IN5A       in       TS3
         M2       IN3B       in       N$84
         N1       IN5B       in       B_EXECUTE
         N2       IN4A       in       +3V(39)
         P1       IN5C       in       JMS
         P2       IN4B       in       TS2
         R1       OUT        out      N$62
         R2       IN4C       in       B_EXECUTE
         S1       IN1A       in       MB04_
         S2       IN4D       in       DCA
         T1       GND        pwr      GND
         T2       OUT        out      N$79
         U1       IN1B       in       MB06
         U2       IN2B       in       MB06_
         V1       IN2A       in       MB04
         V2       OUT        out      N$84

E31      A1       IN1        in       N$94
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(39)
         C1       IN3        in       +3V(39)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(39)
         D2       IN1        in       +3V(39)
         E1       OUT        oc       DOUBLE_RIGHT_ROTATE
         E2       IN2        in       +3V(39)
         F1       IN1        in       +3V(40)
         F2       IN3        in       +3V(40)
         H1       IN2        in       TT_RIGHT_SHIFT_ENABLE_
         H2       IN4        in       N$90
         J1       IN3        in       N$91
         J2       OUT        oc       DOUBLE_LEFT_ROTATE
         K1       IN4        in       EAE_RIGHT_SHIFT_ENABLE_
         K2       IN1        in       +3V(40)
         L1       OUT        oc       RIGHT_SHIFT
         L2       IN2        in       +3V(40)
         M1       IN1        in       N$88
         M2       IN3        in       N$92
         N1       IN2        in       N$83
         N2       IN4        in       EAE_LEFT_SHIFT_ENABLE_
         P1       IN3        in       TT_CARRY_INSERT_
         P2       OUT        oc       LEFT_SHIFT
         R1       IN4        in       C_NO_SHIFT_
         R2       IN1        in       AND_ENABLE_
         S1       OUT        oc       NO_SHIFT
         S2       IN2        in       +3V(40)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(40)
         U1       P$1        pas      +3V(39)
         U2       IN4        in       +3V(40)
         V1       P$1        pas      +3V(40)
         V2       OUT        oc       AND_ENABLE

E32      A1       IN1        in       N$110
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(41)
         C1       IN3        in       +3V(41)
         C2       GND        pwr      GND
         D1       IN4        in       N$109
         D2       IN1        in       +3V(41)
         E1       OUT        oc       MA_LOAD
         E2       IN2        in       N$750
         F1       IN1        in       +3V(41)
         F2       IN3        in       N$96
         H1       IN2        in       +3V(41)
         H2       IN4        in       N$97
         J1       IN3        in       +3V(41)
         J2       OUT        oc       PC_LOAD
         K1       IN4        in       N$112
         K2       IN1        in       EAE_TP_
         L1       OUT        oc       MB_LOAD
         L2       IN2        in       N$95
         M1       IN1        in       AND_ENABLE_
         M2       IN3        in       TT_AC_LOAD_
         N1       IN2        in       N$79
         N2       IN4        in       MEM_EXT_AC_LOAD_ENABLE_
         P1       IN3        in       ADD_
         P2       OUT        oc       AC_LOAD
         R1       IN4        in       EAE_AC_ENABLE_
         R2       IN1        in       +3V(42)
         S1       OUT        oc       AC_ENABLE
         S2       IN2        in       +3V(42)
         T1       GND        pwr      GND
         T2       IN3        in       N$72
         U1       P$1        pas      +3V(41)
         U2       IN4        in       EAE_ACBAR_ENABLE_
         V1       P$1        pas      +3V(42)
         V2       OUT        oc       ACBAR_ENABLE

E33      A1       R          in       +3V(42)
         A2       VCC        pwr      VCC
         B1       C          in       TP4
         C1       D          in       BREAK_OK_
         C2       GND        pwr      GND
         D1       S          in       N$116
         D2       C          in       TP2
         E1       1          out      ADD_ACCEPTED_
         E2       D          in       N$119
         F1       0          out               *** unconnected ***
         F2       S          in       +3V(42)
         H1       C          in       INT_STROBE
         H2       1          out      WC_OVERFLOW_
         J1       D          in       N$23
         J2       0          out               *** unconnected ***
         K1       S          in       MANUAL_PRESET_
         K2       R          in       +3V(42)
         L1       1          out               *** unconnected ***
         L2       C          in       N$122
         M1       0          out      INT_SYNC
         M2       D          in       INT_ENABLE_
         N1       C          in       N$123
         N2       S          in       INT_ENABLE
         P1       D          in       MB11_
         P2       1          out               *** unconnected ***
         R1       S          in       0_TO_INT_ENAB_
         R2       0          out      INT_DELAY
         S1       1          out      INT_ENABLE_
         S2       C          in       AC_LOAD
         T1       GND        pwr      GND
         T2       D          in       N$128
         U1       0          out      INT_ENABLE
         U2       S          in       +3V(42)
         V1       0          out      LINK_
         V2       1          out      LINK

E40      A1       P$2        io       MB05_
         A2       P$2        io       VCC
         B1       P$2        io       AC05_
         B2       P$2        io                ***   unused    ***
         C1       P$2        io       PC04_
         C2       P$2        io       GND
         D1       P$2        io       PC05_
         D2       P$2        io       MB03_
         E1       P$2        io       MA05_
         E2       P$2        io       MA03_
         F1       P$2        io       MQ04_
         F2       P$2        io       MB02_
         H1       P$2        io       MQ05_
         H2       P$2        io       AC03_
         J1       P$2        io       AC02_
         J2       P$2        io       PC00_
         K1       P$2        io       MB04_
         K2       P$2        io       MA02_
         L1       P$2        io       MA04_
         L2       P$2        io       MQ03_
         M1       P$2        io       AC04_
         M2       P$2        io       MQ01_
         N1       P$2        io       PC03_
         N2       P$2        io       MQ02_
         P1       P$2        io       MB01_
         P2       P$2        io       PC02_
         R1       P$2        io       MB00_
         R2       P$2        io       MA01_
         S1       P$2        io       PC01_
         S2       P$2        io       MQ00_
         T1       P$2        io                ***   unused    ***
         T2       P$2        io       AC01_
         U1       P$2        io                ***   unused    ***
         U2       P$2        io       MA00_
         V1       P$2        io                ***   unused    ***
         V2       P$2        io       AC00_

EF01     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AD1      AD1        out               *** unconnected ***
         AD2      AD2        in       MB03_
         AE1      AE1        in       MB04_
         AE2      AE2        out      KCC_
         AF1      AF1        in       MB05_
         AF2      AF2        out      KEYBOARD_FLAG_
         AH1      AH1        in       MB06_
         AH2      AH2        in       MB07
         AJ1      AJ1        in       MB08
         AJ2      AJ2        out      TTI2
         AK1      AK1        in       TTI2
         AK2      AK2        out      TT0_
         AL1      AL1        out      TT3_
         AL2      AL2        in       IOP4
         AM1      AM1        out      TT4_
         AM2      AM2        out      TTI_DATA
         AN1      AN1        in       TTI_CLOCK
         AN2      AN2        out      TT7_
         AP2      AP2        out      TT5_
         AR1      AR1        in       TTI_DATA
         AR2      AR2        out      TT1_
         AS1      AS1        out               *** unconnected ***
         AS2      AS2        out      TT2_
         AT1      GND        pwr      GND
         AT2      AT2        out      TT6_
         AU2      AU2        out      READER_RUN_
         AV2      AV2        in       KCC_
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD1      BD1        in       GND
         BD2      BD2        in       IOP1
         BE2      BE2        out      TT_AC_CLR_
         BF2      BF2        in       INITIALIZE
         BH2      BH2        out      TTI_SKIP_
         BJ2      BJ2        in       IOP2
         BK2      BK2        out               *** unconnected ***
         BM2      BM2        in       RX_DATA
         BN2      BN2        out               *** unconnected ***
         BR1      BR1        in       +3V(33)
         BR2      BR2        in       IN_STOP_2_
         BS1      BS1        out               *** unconnected ***
         BS2      BS2        out               *** unconnected ***
         BT1      GND        pwr      GND
         BT2      BT2        out      CLOCK_SCALE_2
         BU1      BU1        in       CLOCK_SCALE_2
         BU2      BU2        out               *** unconnected ***
         BV2      BV2        out      IN_STOP_2_

EF02     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AD1      AD1        out               *** unconnected ***
         AD2      AD2        out               *** unconnected ***
         AE1      AE1        in       MB04_
         AE2      AE2        in       MB03_
         AF1      AF1        in       MB06
         AF2      AF2        in       MB05_
         AH1      AH1        in       ENABLE_
         AH2      AH2        in       MB07_
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       MB08_
         AK1      AK1        in       ENABLE
         AK2      AK2        out      ENABLE
         AL1      AL1        out      ENABLE_
         AL2      AL2        in       AC06
         AM2      AM2        in       AC07
         AN1      AN1        in       +3V(33)
         AN2      AN2        in       +3V(33)
         AP2      AP2        in       AC04
         AR1      AR1        out               *** unconnected ***
         AR2      AR2        in       AC05
         AS1      AS1        in       IOP4
         AS2      AS2        in       AC09
         AT1      GND        pwr      GND
         AT2      AT2        in       AC10
         AU1      AU1        in       AC11
         AU2      AU2        in       AC08
         AV2      AV2        out      TX_DATA
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD2      BD2        in       IOP2
         BE2      BE2        in       INITIALIZE
         BF2      BF2        in       +3V(33)
         BH2      BH2        in       IOP1
         BJ1      BJ1        out      +3V(33)
         BJ2      BJ2        out      TTO_SKIP_
         BK2      BK2        out      TELEPRINTER_FLAG_
         BN1      BN1        out      OUT_STOP2_
         BN2      BN2        in       OUT_STOP2_
         BP1      BP1        out               *** unconnected ***
         BP2      BP2        in       TTO_CLOCK_
         BR2      BR2        out               *** unconnected ***
         BS2      BS2        in       +3V(33)
         BT1      GND        pwr      GND

EF10     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AE2      CE2        out      MFTP1
         AF2      CF2        out      MFTS2
         AH2      CH2        out      MFTS2_
         AJ2      CJ2        out      MFTS1
         AK2      CK2        out      MFTS1_
         AL2      CL2        in       B_POWER_CLEAR_
         AM2      CM2        out      MFTS0
         AN2      CN2        out               *** unconnected ***
         AP2      CP2        in       RUN_
         AR2      CR2        in       RESTART_
         AS2      CS2        in       N$7
         AT2      CT2        out      MFTP0
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD2      DD2        out      MFTP2
         BE2      P$1        pas      STROBE_
         BF2      P$1        pas      +3V(49)

EF34     AA1      AA1        in       AND_ENABLE
         AA2      VCC        pwr      VCC
         AB1      AB1        in       ADDER11
         AB2      AB2        in       TT_LINE_SHIFT_
         AC1      AC1        in       ADDER_L_
         AC2      GND        pwr      GND
         AD1      AD1        in       DOUBLE_RIGHT_ROTATE
         AD2      AD2        in       RIGHT_SHIFT
         AE1      AE1        in       NO_SHIFT
         AE2      AE2        out      ADDER00
         AF1      AF1        out      ADDER01
         AF2      AF2        in       LEFT_SHIFT
         AH1      AH1        in       DOUBLE_LEFT_ROTATE
         AH2      AH2        in       ADDER02
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       ADDER03
         AK1      AK1        in       MA_LOAD
         AK2      AK2        out               *** unconnected ***
         AL1      AL1        out      MA01_
         AL2      AL2        out      MA01
         AM1      AM1        out      MA00_
         AM2      AM2        out      MA00
         AN1      AN1        out               *** unconnected ***
         AN2      AN2        in       PC_LOAD
         AP1      AP1        out               *** unconnected ***
         AP2      AP2        out      PC01_
         AR1      AR1        in       MB_LOAD
         AR2      AR2        out      PC00_
         AS1      AS1        out      MB01_
         AS2      AS2        out      MB01
         AT1      GND        pwr      GND
         AT2      AT2        out      MB00
         AU1      AU1        in       AC_LOAD
         AU2      AU2        out      MB00_
         AV1      AV1        out      AC01
         AV2      AV2        out      AC01_
         BA1      BA1        out      AC00
         BA2      VCC        pwr      VCC
         BB1      BB1        out      AC00_
         BB2      BB2        in       ADDER_L_
         BC1      BC1        in       SR_ENABLE
         BC2      GND        pwr      GND
         BD1      BD1        in       GND
         BD2      BD2        in       SR01
         BE1      BE1        in       SR00
         BE2      BE2        in       GND
         BF1      BF1        in       MQ_ENABLE
         BF2      BF2        in       SC_ENABLE
         BH1      BH1        in       MQ00
         BH2      BH2        in       AC_ENABLE
         BJ1      BJ1        in       N$160
         BJ2      BJ2        in       ACBAR_ENABLE
         BK1      BK1        in       INPUT_BUS00
         BK2      BK2        out      CARRY_OUT0_
         BL1      BL1        in       DATA_ENABLE
         BL2      BL2        in       IO_ENABLE
         BM1      BM1        in       INPUT_BUS01
         BM2      BM2        in       DATA00
         BN1      BN1        in       GND
         BN2      BN2        in       MQ01
         BP1      BP1        in       MA_ENABLE0_4
         BP2      BP2        in       DATA01
         BR1      BR1        in       MEM00
         BR2      BR2        in       MA_ENABLE0_4
         BS1      BS1        in       DATA_ADD00
         BS2      BS2        in       PC_ENABLE
         BT1      GND        pwr      GND
         BT2      BT2        in       DATA_ADD_ENABLE
         BU1      BU1        in       DATA_ADD01
         BU2      BU2        in       MEM_ENABLE0_4
         BV1      BV1        in       MEM_ENABLE0_4
         BV2      BV2        in       MEM01

EF35     AA1      AA1        in       AND_ENABLE
         AA2      VCC        pwr      VCC
         AB1      AB1        in       ADDER00
         AB2      AB2        in       TT_LINE_SHIFT_
         AC1      AC1        in       ADDER01
         AC2      GND        pwr      GND
         AD1      AD1        in       DOUBLE_RIGHT_ROTATE
         AD2      AD2        in       RIGHT_SHIFT
         AE1      AE1        in       NO_SHIFT
         AE2      AE2        out      ADDER02
         AF1      AF1        out      ADDER03
         AF2      AF2        in       LEFT_SHIFT
         AH1      AH1        in       DOUBLE_LEFT_ROTATE
         AH2      AH2        in       ADDER04
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       ADDER03
         AK1      AK1        in       MA_LOAD
         AK2      AK2        out               *** unconnected ***
         AL1      AL1        out      MA03_
         AL2      AL2        out      MA03
         AM1      AM1        out      MA02_
         AM2      AM2        out      MA02
         AN1      AN1        out               *** unconnected ***
         AN2      AN2        in       PC_LOAD
         AP1      AP1        out               *** unconnected ***
         AP2      AP2        out      PC03_
         AR1      AR1        in       MB_LOAD
         AR2      AR2        out      PC02_
         AS1      AS1        out      MB03_
         AS2      AS2        out      MB03
         AT1      GND        pwr      GND
         AT2      AT2        out      MB02
         AU1      AU1        in       AC_LOAD
         AU2      AU2        out      MB02_
         AV1      AV1        out      AC03
         AV2      AV2        out      AC03_
         BA1      BA1        out      AC02
         BA2      VCC        pwr      VCC
         BB1      BB1        out      AC02_
         BB2      BB2        in       ADDER02
         BC1      BC1        in       SR_ENABLE
         BC2      GND        pwr      GND
         BD1      BD1        in       GND
         BD2      BD2        in       SR03
         BE1      BE1        in       SR02
         BE2      BE2        in       GND
         BF1      BF1        in       MQ_ENABLE
         BF2      BF2        in       SC_ENABLE
         BH1      BH1        in       MQ02
         BH2      BH2        in       AC_ENABLE
         BJ1      BJ1        in       N$133
         BJ2      BJ2        in       ACBAR_ENABLE
         BK1      BK1        in       INPUT_BUS02
         BK2      BK2        out      N$160
         BL1      BL1        in       DATA_ENABLE
         BL2      BL2        in       IO_ENABLE
         BM1      BM1        in       INPUT_BUS03
         BM2      BM2        in       DATA02
         BN1      BN1        in       GND
         BN2      BN2        in       MQ03
         BP1      BP1        in       MA_ENABLE0_4
         BP2      BP2        in       DATA03
         BR1      BR1        in       MEM02
         BR2      BR2        in       MA_ENABLE0_4
         BS1      BS1        in       DATA_ADD02
         BS2      BS2        in       PC_ENABLE
         BT1      GND        pwr      GND
         BT2      BT2        in       DATA_ADD_ENABLE
         BU1      BU1        in       DATA_ADD03
         BU2      BU2        in       MEM_ENABLE0_4
         BV1      BV1        in       MEM_ENABLE0_4
         BV2      BV2        in       MEM03

EF36     AA1      AA1        in       AND_ENABLE
         AA2      VCC        pwr      VCC
         AB1      AB1        in       ADDER02
         AB2      AB2        in       TT_LINE_SHIFT_
         AC1      AC1        in       ADDER03
         AC2      GND        pwr      GND
         AD1      AD1        in       DOUBLE_RIGHT_ROTATE
         AD2      AD2        in       RIGHT_SHIFT
         AE1      AE1        in       NO_SHIFT
         AE2      AE2        out      ADDER04
         AF1      AF1        out      ADDER05
         AF2      AF2        in       LEFT_SHIFT
         AH1      AH1        in       DOUBLE_LEFT_ROTATE
         AH2      AH2        in       ADDER06
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       ADDER03
         AK1      AK1        in       MA_LOAD
         AK2      AK2        out               *** unconnected ***
         AL1      AL1        out      MA05_
         AL2      AL2        out      MA05
         AM1      AM1        out      MA04_
         AM2      AM2        out      MA04
         AN1      AN1        out               *** unconnected ***
         AN2      AN2        in       PC_LOAD
         AP1      AP1        out               *** unconnected ***
         AP2      AP2        out      PC05_
         AR1      AR1        in       MB_LOAD
         AR2      AR2        out      PC04_
         AS1      AS1        out      MB05_
         AS2      AS2        out      MB05
         AT1      GND        pwr      GND
         AT2      AT2        out      MB04
         AU1      AU1        in       AC_LOAD
         AU2      AU2        out      MB04_
         AV1      AV1        out      AC05
         AV2      AV2        out      AC05_
         BA1      BA1        out      AC04
         BA2      VCC        pwr      VCC
         BB1      BB1        out      AC04_
         BB2      BB2        in       ADDER04
         BC1      BC1        in       SR_ENABLE
         BC2      GND        pwr      GND
         BD1      BD1        in       GND
         BD2      BD2        in       SR05
         BE1      BE1        in       SR04
         BE2      BE2        in       GND
         BF1      BF1        in       MQ_ENABLE
         BF2      BF2        in       SC_ENABLE
         BH1      BH1        in       MQ04
         BH2      BH2        in       AC_ENABLE
         BJ1      BJ1        in       CARRY_OUT6_
         BJ2      BJ2        in       ACBAR_ENABLE
         BK1      BK1        in       INPUT_BUS04
         BK2      BK2        out      N$133
         BL1      BL1        in       DATA_ENABLE
         BL2      BL2        in       IO_ENABLE
         BM1      BM1        in       INPUT_BUS05
         BM2      BM2        in       DATA04
         BN1      BN1        in       GND
         BN2      BN2        in       MQ05
         BP1      BP1        in       MA_ENABLE0_4
         BP2      BP2        in       DATA05
         BR1      BR1        in       MEM04
         BR2      BR2        in       MA_ENABLE5_11
         BS1      BS1        in       DATA_ADD04
         BS2      BS2        in       PC_ENABLE
         BT1      GND        pwr      GND
         BT2      BT2        in       DATA_ADD_ENABLE
         BU1      BU1        in       DATA_ADD05
         BU2      BU2        in       MEM_ENABLE0_4
         BV1      BV1        in       MEM_ENABLE5_8
         BV2      BV2        in       MEM05

EF37     AA1      AA1        in       AND_ENABLE
         AA2      VCC        pwr      VCC
         AB1      AB1        in       ADDER04
         AB2      AB2        in       TT_LINE_SHIFT_
         AC1      AC1        in       ADDER05
         AC2      GND        pwr      GND
         AD1      AD1        in       DOUBLE_RIGHT_ROTATE
         AD2      AD2        in       RIGHT_SHIFT
         AE1      AE1        in       NO_SHIFT
         AE2      AE2        out      ADDER06
         AF1      AF1        out      ADDER07
         AF2      AF2        in       LEFT_SHIFT
         AH1      AH1        in       DOUBLE_LEFT_ROTATE
         AH2      AH2        in       ADDER08
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       ADDER09
         AK1      AK1        in       MA_LOAD
         AK2      AK2        out               *** unconnected ***
         AL1      AL1        out      MA07_
         AL2      AL2        out      MA07
         AM1      AM1        out      MA06_
         AM2      AM2        out      MA06
         AN1      AN1        out               *** unconnected ***
         AN2      AN2        in       PC_LOAD
         AP1      AP1        out               *** unconnected ***
         AP2      AP2        out      PC07_
         AR1      AR1        in       MB_LOAD
         AR2      AR2        out      PC06_
         AS1      AS1        out      MB07_
         AS2      AS2        out      MB07
         AT1      GND        pwr      GND
         AT2      AT2        out      MB06
         AU1      AU1        in       AC_LOAD
         AU2      AU2        out      MB06_
         AV1      AV1        out      AC07
         AV2      AV2        out      AC07_
         BA1      BA1        out      AC06
         BA2      VCC        pwr      VCC
         BB1      BB1        out      AC06_
         BB2      BB2        in       ADDER06
         BC1      BC1        in       SR_ENABLE
         BC2      GND        pwr      GND
         BD1      BD1        in       GND
         BD2      BD2        in       SR07
         BE1      BE1        in       SR06
         BE2      BE2        in       GND
         BF1      BF1        in       MQ_ENABLE
         BF2      BF2        in       SC_ENABLE
         BH1      BH1        in       MQ06
         BH2      BH2        in       AC_ENABLE
         BJ1      BJ1        in       N$132
         BJ2      BJ2        in       ACBAR_ENABLE
         BK1      BK1        in       INPUT_BUS06
         BK2      BK2        out      CARRY_OUT6_
         BL1      BL1        in       DATA_ENABLE
         BL2      BL2        in       IO_ENABLE
         BM1      BM1        in       INPUT_BUS07
         BM2      BM2        in       DATA06
         BN1      BN1        in       SC0
         BN2      BN2        in       MQ07
         BP1      BP1        in       MA_ENABLE5_11
         BP2      BP2        in       DATA07
         BR1      BR1        in       MEM06
         BR2      BR2        in       MA_ENABLE5_11
         BS1      BS1        in       DATA_ADD06
         BS2      BS2        in       PC_ENABLE
         BT1      GND        pwr      GND
         BT2      BT2        in       DATA_ADD_ENABLE
         BU1      BU1        in       DATA_ADD07
         BU2      BU2        in       MEM_ENABLE5_8
         BV1      BV1        in       MEM_ENABLE5_8
         BV2      BV2        in       MEM07

EF38     AA1      AA1        in       AND_ENABLE
         AA2      VCC        pwr      VCC
         AB1      AB1        in       ADDER06
         AB2      AB2        in       TT_LINE_SHIFT_
         AC1      AC1        in       ADDER07
         AC2      GND        pwr      GND
         AD1      AD1        in       DOUBLE_RIGHT_ROTATE
         AD2      AD2        in       RIGHT_SHIFT
         AE1      AE1        in       NO_SHIFT
         AE2      AE2        out      ADDER08
         AF1      AF1        out      ADDER09
         AF2      AF2        in       LEFT_SHIFT
         AH1      AH1        in       DOUBLE_LEFT_ROTATE
         AH2      AH2        in       ADDER10
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       ADDER09
         AK1      AK1        in       MA_LOAD
         AK2      AK2        out               *** unconnected ***
         AL1      AL1        out      MA09_
         AL2      AL2        out      MA09
         AM1      AM1        out      MA08_
         AM2      AM2        out      MA08
         AN1      AN1        out               *** unconnected ***
         AN2      AN2        in       PC_LOAD
         AP1      AP1        out               *** unconnected ***
         AP2      AP2        out      PC09_
         AR1      AR1        in       MB_LOAD
         AR2      AR2        out      PC08_
         AS1      AS1        out      MB09_
         AS2      AS2        out      MB09
         AT1      GND        pwr      GND
         AT2      AT2        out      MB08
         AU1      AU1        in       AC_LOAD
         AU2      AU2        out      MB08_
         AV1      AV1        out      AC09
         AV2      AV2        out      AC09_
         BA1      BA1        out      AC08
         BA2      VCC        pwr      VCC
         BB1      BB1        out      AC08_
         BB2      BB2        in       ADDER08
         BC1      BC1        in       SR_ENABLE
         BC2      GND        pwr      GND
         BD1      BD1        in       SC1
         BD2      BD2        in       SR09
         BE1      BE1        in       SR08
         BE2      BE2        in       GND
         BF1      BF1        in       MQ_ENABLE
         BF2      BF2        in       SC_ENABLE
         BH1      BH1        in       MQ08
         BH2      BH2        in       AC_ENABLE
         BJ1      BJ1        in       N$136
         BJ2      BJ2        in       ACBAR_ENABLE
         BK1      BK1        in       INPUT_BUS08
         BK2      BK2        out      N$132
         BL1      BL1        in       DATA_ENABLE
         BL2      BL2        in       IO_ENABLE
         BM1      BM1        in       INPUT_BUS09
         BM2      BM2        in       DATA08
         BN1      BN1        in       SC2
         BN2      BN2        in       MQ09
         BP1      BP1        in       MA_ENABLE5_11
         BP2      BP2        in       DATA09
         BR1      BR1        in       MEM08
         BR2      BR2        in       MA_ENABLE5_11
         BS1      BS1        in       DATA_ADD08
         BS2      BS2        in       PC_ENABLE
         BT1      GND        pwr      GND
         BT2      BT2        in       DATA_ADD_ENABLE
         BU1      BU1        in       DATA_ADD09
         BU2      BU2        in       MEM_ENABLE5_8
         BV1      BV1        in       MEM_ENABLE9_11
         BV2      BV2        in       MEM09

EF39     AA1      AA1        in       AND_ENABLE
         AA2      VCC        pwr      VCC
         AB1      AB1        in       ADDER08
         AB2      AB2        in       TT_LINE_SHIFT_
         AC1      AC1        in       ADDER09
         AC2      GND        pwr      GND
         AD1      AD1        in       DOUBLE_RIGHT_ROTATE
         AD2      AD2        in       RIGHT_SHIFT
         AE1      AE1        in       NO_SHIFT
         AE2      AE2        out      ADDER10
         AF1      AF1        out      ADDER11
         AF2      AF2        in       LEFT_SHIFT
         AH1      AH1        in       DOUBLE_LEFT_ROTATE
         AH2      AH2        in       E25D1
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        in       ADDER00
         AK1      AK1        in       MA_LOAD
         AK2      AK2        out               *** unconnected ***
         AL1      AL1        out      MA11_
         AL2      AL2        out      MA11
         AM1      AM1        out      MA10_
         AM2      AM2        out      MA10
         AN1      AN1        out               *** unconnected ***
         AN2      AN2        in       PC_LOAD
         AP1      AP1        out               *** unconnected ***
         AP2      AP2        out      PC11_
         AR1      AR1        in       MB_LOAD
         AR2      AR2        out      PC10_
         AS1      AS1        out      MB11_
         AS2      AS2        out      MB11
         AT1      GND        pwr      GND
         AT2      AT2        out      MB10
         AU1      AU1        in       AC_LOAD
         AU2      AU2        out      MB10_
         AV1      AV1        out      AC11
         AV2      AV2        out      AC11_
         BA1      BA1        out      AC10
         BA2      VCC        pwr      VCC
         BB1      BB1        out      AC10_
         BB2      BB2        in       ADDER10
         BC1      BC1        in       SR_ENABLE
         BC2      GND        pwr      GND
         BD1      BD1        in       SC3
         BD2      BD2        in       SR11
         BE1      BE1        in       SR10
         BE2      BE2        in       TT_CARRY_INSERT_S
         BF1      BF1        in       MQ_ENABLE
         BF2      BF2        in       SC_ENABLE
         BH1      BH1        in       MQ10
         BH2      BH2        in       AC_ENABLE
         BJ1      BJ1        in       CARRY_INSERT_
         BJ2      BJ2        in       ACBAR_ENABLE
         BK1      BK1        in       INPUT_BUS10
         BK2      BK2        out      N$136
         BL1      BL1        in       DATA_ENABLE
         BL2      BL2        in       IO_ENABLE
         BM1      BM1        in       INPUT_BUS11
         BM2      BM2        in       DATA10
         BN1      BN1        in       SC4
         BN2      BN2        in       MQ11
         BP1      BP1        in       MA_ENABLE5_11
         BP2      BP2        in       DATA11
         BR1      BR1        in       MEM10
         BR2      BR2        in       MA_ENABLE5_11
         BS1      BS1        in       DATA_ADD10
         BS2      BS2        in       PC_ENABLE
         BT1      GND        pwr      GND
         BT2      BT2        in       DATA_ADD_ENABLE
         BU1      BU1        in       DATA_ADD11
         BU2      BU2        in       MEM_ENABLE9_11
         BV1      BV1        in       MEM_ENABLE9_11
         BV2      BV2        in       MEM11

F03      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         J2       J2         out      HZ880
         K2       K2         out      TTO_CLOCK_
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         in       HZ880
         R2       R2         out      TTI_CLOCK

F04      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

F05      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

F06      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

F07      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

F08      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       OUT        out      B_MEM_START
         H2       IN1        in       N$20
         J2       IN2        in       N$19
         K2       OUT        out      BTP2
         N2       IN1        in       N$24
         P2       IN2        in       +3V(68)
         S2       OUT        out               ***   unused    ***
         U2       IN1        in                ***   unused    ***
         V2       IN2        in                ***   unused    ***

F09      A1       IN1        in       B_FETCH
         A2       VCC        pwr      VCC
         B1       IN2        in       MB03_
         C1       IN3        in       MB04
         C2       GND        pwr      GND
         D1       IN4        in       MB05_
         D2       IN5        in       MB06_
         E2       IN6        in       MB09
         F1       IN1        in       +3V(69)
         F2       IN7        in       IOT
         H1       IN2        in       +3V(69)
         H2       IN8        in       +3V(68)
         J1       IN3        in       +3V(69)
         J2       OUT        out      N$451
         K1       IN4        in       IO_PC_ENABLE_
         K2       IN5        in       N$64
         L2       IN6        in       INT_SKIP_ENABLE_
         M1       IN1        in                ***   unused    ***
         M2       IN7        in       PC_ENABLE_
         N1       IN2        in                ***   unused    ***
         N2       IN8        in       TT_CARRY_INSERT_
         P1       IN3        in                ***   unused    ***
         P2       OUT        out      IPC_ENABLE
         R1       IN4        in                ***   unused    ***
         R2       IN5        in                ***   unused    ***
         S2       IN6        in                ***   unused    ***
         T1       GND        pwr      GND
         T2       IN7        in                ***   unused    ***
         U1       P$1        pas      +3V(68)
         U2       IN8        in                ***   unused    ***
         V1       P$1        pas      +3V(10)
         V2       OUT        out               ***   unused    ***

F11      A1       IN1        in       IR0
         A2       VCC        pwr      VCC
         B1       IN2        in       IR1
         C1       IN3        in       IR2_
         C2       GND        pwr      GND
         D1       IN4        in       UF_
         D2       IN1        in       INT_INHIBIT_
         E1       OUT        out      IOT_
         E2       IN2        in       N$497
         F1       IN1        in       +3V(69)
         F2       IN3        in       CUF_
         H1       IN2        in       IOP1_
         H2       IN4        in       CUF_
         J1       IN3        in       IOP2_
         J2       OUT        out      INT_INHIBIT
         K1       IN4        in       IOP4_
         K2       IN1        in       N$58
         L1       OUT        out      N$120
         L2       IN2        in       EAE_MEM_ENABLE_
         M1       IN1        in       INT_SKIP_ENABLE_
         M2       IN3        in       N$61
         N1       IN2        in       IO_PC_ENABLE_
         N2       IN4        in       N$73
         P1       IN3        in       PC_ENABLE_
         P2       OUT        out      MEM_ENABLE9_11
         R1       IN4        in       +3V(69)
         R2       IN1        in       INT_RQST
         S1       OUT        out      N$80
         S2       IN2        in       +3V(69)
         T1       GND        pwr      GND
         T2       IN3        in       KEY_LAEXDP_
         U1       P$1        pas      +3V(69)
         U2       IN4        in       F_SET
         V1       P$1        pas      +3V(50)
         V2       OUT        out      N$23

F12      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$47
         F1       OUT        out      IO_STROBE
         H1       IN         in                ***   unused    ***
         H2       H2         in       N$46
         J1       OUT        out               ***   unused    ***
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out      N$47
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F13      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$31
         F1       OUT        out      N$32
         H1       IN         in       N$30
         H2       H2         in       N$29
         J1       OUT        out      N$36
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out      N$30
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out      N$31
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F14      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$34
         F1       OUT        out      N$35
         H1       IN         in       N$33
         H2       H2         in       N$32
         J1       OUT        out      IOP1_CLR
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out      N$33
         T1       GND        pwr      GND
         T2       T2         out      N$34
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F15      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$38
         F1       OUT        out      F15F1
         H1       IN         in       N$37
         H2       H2         in       N$35
         J1       OUT        out      N$39
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out      N$37
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out      N$38
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F16      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$41
         F1       OUT        out      N$42
         H1       IN         in       N$40
         H2       H2         in       F15F1
         J1       OUT        out      IOP2_CLR
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out      N$40
         T1       GND        pwr      GND
         T2       T2         out      N$41
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F17      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$44
         F1       OUT        out      F17F1
         H1       IN         in       N$43
         H2       H2         in       N$42
         J1       OUT        out      N$45
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out      N$43
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out               *** unconnected ***
         T1       GND        pwr      GND
         T2       T2         out      N$44
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F18      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         E1       IN         in       N$49
         F1       OUT        out      IO_END
         H1       IN         in       N$48
         H2       H2         in       F17F1
         J1       OUT        out      IOP4_CLR
         J2       J2         out               *** unconnected ***
         K2       K2         out               *** unconnected ***
         L2       L2         out               *** unconnected ***
         M2       M2         out               *** unconnected ***
         N2       N2         out               *** unconnected ***
         P2       P2         out               *** unconnected ***
         R2       R2         out               *** unconnected ***
         S2       S2         out      N$48
         T1       GND        pwr      GND
         T2       T2         out      N$49
         U2       U2         out               *** unconnected ***
         V2       V2         out               *** unconnected ***

F19      A1       IN1        in       N$12
         A2       VCC        pwr      VCC
         B1       IN2        in       MEM_EXT_
         C1       IN3        in       TT_INST_
         C2       GND        pwr      GND
         D1       IN4        in       PROCESSOR_IOT_
         D2       IN1        in       KEY_LA_
         E1       OUT        out      SLOW_CYCLE_
         E2       IN2        in       KEY_ST_
         F1       IN1        in       INT_STROBE
         F2       IN3        in       KEY_EXDP_
         H1       IN2        in       N$124
         H2       IN4        in       KEY_CONT_
         J1       IN3        in       N$125
         J2       OUT        out      N$7
         K1       IN4        in       N$135
         K2       IN1        in       TTI_SKIP_
         L1       OUT        out      N$127
         L2       IN2        in       TTO_SKIP_
         M1       IN1        in       PWR_LOW_
         M2       IN3        in       PWR_SKIP_
         N1       IN2        in       UINT_
         N2       IN4        in       +3V(43)
         P1       IN3        in       KEYBOARD_FLAG_
         P2       OUT        out      N$266
         R1       IN4        in       TELEPRINTER_FLAG_
         R2       IN1        in       IOT
         S1       OUT        out      N$265
         S2       IN2        in       B_FETCH
         T1       GND        pwr      GND
         T2       IN3        in       MB03_
         U1       P$1        pas               ***   unused    ***
         U2       IN4        in       MB04_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$126

F20      A1       IN1        in       +3V(43)
         A2       VCC        pwr      VCC
         B1       IN2        in       N$114
         C1       OUT        out      N$116
         C2       GND        pwr      GND
         D1       IN1        in       STROBE_
         D2       IN1        in       N$36
         E1       IN2        in       MANUAL_PRESET_
         E2       IN2        in       MB11
         F1       OUT        out      N$114
         F2       OUT        out      IOP1_SET_
         H1       IN1        in       N$39
         H2       IN1        in       N$45
         J1       IN2        in       MB10
         J2       IN2        in       MB09
         K1       OUT        out      IOP2_SET_
         K2       OUT        out      IOP4_SET_
         L1       IN1        in       N$9
         L2       IN1        in       IPC_ENABLE
         M1       IN2        in       +3V(43)
         M2       IN2        in       +3V(43)
         N1       OUT        out      N$12
         N2       OUT        out      N$749
         P1       IN1        in       B_FETCH
         P2       IN1        in       N$8
         R1       IN2        in       IOT
         R2       IN2        in       B_POWER_CLEAR_
         S1       OUT        out      N$9
         S2       OUT        out      INITIALIZE
         T1       GND        pwr      GND
         T2       IN1        in       MFTP0
         U1       P$1        pas      +3V(43)
         U2       IN2        in       KEY_ST
         V1       P$1        pas      +3V(51)
         V2       OUT        out      N$8

F21      A1       IN1        in       N$118
         A2       VCC        pwr      VCC
         B1       IN2        in       CARRY_OUT0
         C1       OUT        out      N$119
         C2       GND        pwr      GND
         D1       IN1        in       KEY_LAEXDP
         D2       IN1        in       N$121
         E1       IN2        in       RUN_
         E2       IN2        in       +3V(43)
         F1       OUT        out      KEY_LAEXDP_
         F2       OUT        out      N$122
         H1       IN1        in       INT_STROBE
         H2       IN1        in       N$127
         J1       IN2        in       B_FETCH
         J2       IN2        in       +3V(43)
         K1       OUT        out      N$121
         K2       OUT        out      N$123
         L1       IN1        in       +3V(43)
         L2       IN1        in       MB10_
         M1       IN2        in       INT_OK_
         M2       IN2        in       MB11_
         N1       OUT        out      INT_OK
         N2       OUT        out      N$124
         P1       IN1        in       N$126
         P2       IN1        in       +3V(43)
         R1       IN2        in       +3V(43)
         R2       IN2        in       N$134
         S1       OUT        out      N$125
         S2       OUT        out      N$135
         T1       GND        pwr      GND
         T2       IN1        in       N$125
         U1       P$1        pas      +3V(52)
         U2       IN2        in       N$135
         V1       P$1        pas      +3V(53)
         V2       OUT        out      PROCESSOR_IOT_

F22      A1       IN1        in       +3V(44)
         A2       VCC        pwr      VCC
         B1       IN2        in       MEM00
         C1       OUT        out      N$50
         C2       GND        pwr      GND
         D1       IN1        in       F_SET_
         D2       IN1        in       MFTP2
         E1       IN2        in       +3V(44)
         E2       IN2        in       KEY_ST
         F1       OUT        out      F_SET
         F2       OUT        out      N$52
         H1       IN1        in       E_SET
         H2       IN1        in       D_SET_
         J1       IN2        in       +3V(44)
         J2       IN2        in       +3V(44)
         K1       OUT        out      E_SET_
         K2       OUT        out      D_SET
         L1       IN1        in       BREAK_OK_
         L2       IN1        in       WC_SET_
         M1       IN2        in       +3V(44)
         M2       IN2        in       +3V(44)
         N1       OUT        out      BREAK_OK
         N2       OUT        out      WC_SET
         P1       IN1        in       BREAK_OK
         P2       IN1        in       N$56
         R1       IN2        in       WC_SET_
         R2       IN2        in       CURRENT_ADDRESS_
         S1       OUT        out      N$56
         S2       OUT        out      B_SET
         T1       GND        pwr      GND
         T2       IN1        in       3_CYCLE
         U1       P$1        pas      +3V(44)
         U2       IN2        in       BREAK_OK
         V1       P$1        pas      +3V(54)
         V2       OUT        out      WC_SET_

F23      A1       IN1        in       N$103
         A2       VCC        pwr      VCC
         B1       IN2        in       MID_AC0
         C1       IN3        in       LOW_AC0
         C2       GND        pwr      GND
         D1       IN4        in       MB06
         D2       IN1        in       INT_OK_
         E1       OUT        out      N$101
         E2       IN2        in       N$54
         F1       IN1        in       IOT_OPR_
         F2       IN3        in       N$55
         H1       IN2        in       B_FETCH
         H2       IN4        in       EAE_E_SET_
         J1       IN3        in       JMP_
         J2       OUT        out      E_SET
         K1       IN4        in       MB03_
         K2       IN1        in       E_SET_
         L1       OUT        out      N$55
         L2       IN2        in       BRK_SYNC
         M1       IN1        in       SPECIAL_CYCLE_
         M2       IN3        in       SPECIAL_CYCLE_
         N1       IN2        in       BREAK_OK_
         N2       IN4        in       D_SET_
         P1       IN3        in       E_SET_
         P2       OUT        out      BREAK_OK_
         R1       IN4        in       D_SET_
         R2       IN1        in       MB05_
         S1       OUT        out      F_SET_
         S2       IN2        in       MB06_
         T1       GND        pwr      GND
         T2       IN3        in       MB07_
         U1       P$1        pas      +3V(55)
         U2       IN4        in       MB08_
         V1       P$1        pas      +3V(56)
         V2       OUT        out      N$134

F24      A1       IN1        in       OP1_
         A2       VCC        pwr      VCC
         B1       IN2        in       TT_SHIFT_ENABLE_
         C1       IN3        in       EAE_NO_SHIFT_ENABLE
         C2       GND        pwr      GND
         D1       IN4        in       +3V(44)
         D2       IN1        in       MA00_
         E1       OUT        out      N$83
         E2       IN2        in       MA01_
         F1       IN1        in       MA04_
         F2       IN3        in       MA02_
         H1       IN2        in       MA05_
         H2       IN4        in       MA03_
         J1       IN3        in       MA06_
         J2       OUT        out      N$78
         K1       IN4        in       MA07_
         K2       IN1        in       AC00_
         L1       OUT        out      N$77
         L2       IN2        in       AC01_
         M1       IN1        in       AC04_
         M2       IN3        in       AC02_
         N1       IN2        in       AC05_
         N2       IN4        in       AC03_
         P1       IN3        in       AC06_
         P2       OUT        out      N$100
         R1       IN4        in       AC07_
         R2       IN1        in       AC08_
         S1       OUT        out      N$99
         S2       IN2        in       AC09_
         T1       GND        pwr      GND
         T2       IN3        in       AC10_
         U1       P$1        pas               ***   unused    ***
         U2       IN4        in       AC11_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$98

F25      A1       IN1        in       OP1_
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(44)
         C1       OUT        out      OP1
         C2       GND        pwr      GND
         D1       IN1        in       CA_INCREMENT_
         D2       IN1        in       N$78
         E1       IN2        in       +3V(44)
         E2       IN2        in       TT_INCREMENT_
         F1       OUT        out      CA_INCREMENT
         F2       OUT        out      N$87
         H1       IN1        in       N$77
         H2       IN1        in       N$75
         J1       IN2        in       TT_INCREMENT_
         J2       IN2        in       TT_INCREMENT_
         K1       OUT        out      N$86
         K2       OUT        out      N$85
         L1       IN1        in       MA08
         L2       IN1        in       N$107
         M1       IN2        in       DEFER
         M2       IN2        in       +3V(44)
         N1       OUT        out      N$75
         N2       OUT        out      N$106
         P1       IN1        in       PC_LOAD
         P2       IN1        in       TP2
         R1       IN2        in       +3V(45)
         R2       IN2        in       B_EXECUTE
         S1       OUT        out      PC_LOAD_
         S2       OUT        out      TP2E_
         T1       GND        pwr      GND
         T2       IN1        in       IO_STROBE
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       SKIP_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$115

F26      A1       IN1        in       MB09
         A2       VCC        pwr      VCC
         B1       IN2        in       OP1
         C1       IN3        in       MB10
         C2       GND        pwr      GND
         D1       OUT        out      N$90
         D2       IN1        in       MB08
         E1       IN1        in       MB08
         E2       IN2        in       OP1
         F1       IN2        in       OP1
         F2       IN3        in       MB10
         H1       IN3        in       MB10_
         H2       OUT        out      N$94
         J1       OUT        out      N$91
         J2       IN1        in       MB09
         K1       IN1        in       MB08_
         K2       IN2        in       OP1
         L1       IN2        in       OP1
         L2       IN3        in       MB10_
         M1       IN3        in       MB09_
         M2       OUT        out      N$92
         N1       OUT        out      N$88
         N2       IN1        in       TP3
         P1       IN1        in       AND
         P2       IN2        in       B_EXECUTE
         R1       IN2        in       TS3
         R2       IN3        in       JMS
         S1       IN3        in       B_EXECUTE
         S2       OUT        out      N$97
         T1       GND        pwr      GND
         T2       IN1        in       AND_
         U1       OUT        out      AND_ENABLE_
         U2       IN2        in       TAD_
         V1       OUT        out      N$93
         V2       IN3        in       DCA_

F27      A1       IN1        in       TS3
         A2       VCC        pwr      VCC
         B1       IN2        in       JMP
         C1       IN3        in       B_FETCH
         C2       GND        pwr      GND
         D1       IN4        in       MB03_
         D2       IN1        in       TS4
         E1       OUT        out      N$61
         E2       IN2        in       N$60
         F1       IN1        in       OPR
         F2       IN3        in       INT_OK_
         H1       IN2        in       TS3
         H2       IN4        in       PC_ENABLE_
         J1       IN3        in       B_FETCH
         J2       OUT        out      N$73
         K1       IN4        in       MB03
         K2       IN1        in       AUTO_INDEX_
         L1       OUT        out      N$76
         L2       IN2        in       N$82
         M1       IN1        in       N$87
         M2       IN3        in       N$81
         N1       IN2        in       N$86
         N2       IN4        in       TT_CARRY_INSERT_
         P1       IN3        in       N$85
         P2       OUT        out      N$89
         R1       IN4        in       MEM_ENABLE0_4
         R2       IN1        in       OPR
         S1       OUT        out      AUTO_INDEX_
         S2       IN2        in       TS3
         T1       GND        pwr      GND
         T2       IN3        in       B_FETCH
         U1       P$1        pas      +3V(37)
         U2       IN4        in       MB03_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      OP1_

F28      A1       IN1        in       TAD
         A2       VCC        pwr      VCC
         B1       IN2        in       TS3
         C1       IN3        in       B_EXECUTE
         C2       GND        pwr      GND
         D1       OUT        out      ADD_
         D2       IN1        in       MEM_ENABLE5_8
         E1       IN1        in       TS2
         E2       IN2        in       MEM_ENABLE0_4_
         F1       IN2        in       B_EXECUTE
         F2       IN3        in       MB04
         H1       IN3        in       JMS
         H2       OUT        out      N$74
         J1       OUT        out      INT_SKIP_ENABLE_
         J2       IN1        in       F_SET_
         K1       IN1        in       TS2
         K2       IN2        in       EAE_E_SET_
         L1       IN2        in       BREAK
         L2       IN3        in       TT_SET_
         M1       IN3        in       DATA_IN
         M2       OUT        out      N$65
         N1       OUT        out      N$67
         N2       IN1        in       OP2
         P1       IN1        in       ADDER11_
         P2       IN2        in       MB11_
         R1       IN2        in       EAE_ON_
         R2       IN3        in       MB09
         S1       IN3        in       TT_INST_
         S2       OUT        out      OSR_
         T1       GND        pwr      GND
         T2       IN1        in       FETCH_
         U1       OUT        out      N$130
         U2       IN2        in       EAE_EXECUTE_
         V1       OUT        out      PC_INCREMENT
         V2       IN3        in       TT_CYCLE_

F29      A1       IN1        in       MEM_ENABLE0_4
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(45)
         C1       OUT        out      MEM_ENABLE0_4_
         C2       GND        pwr      GND
         D1       IN1        in       D_SET_
         D2       IN1        in       DATA_IN_
         E1       IN2        in       E_SET_
         E2       IN2        in       +3V(45)
         F1       OUT        out      N$60
         F2       OUT        out      DATA_IN
         H1       IN1        in       +3V(45)
         H2       IN1        in       +3V(45)
         J1       IN2        in       N$76
         J2       IN2        in       AC_CLEAR
         K1       OUT        out      OP2
         K2       OUT        out      AC_CLEAR_
         L1       IN1        in       TS4
         L2       IN1        in       N$66
         M1       IN2        in       BREAK_OK
         M2       IN2        in       EAE_ACBAR_ENABLE_
         N1       OUT        out      N$69
         N2       OUT        out      LBAR_ENABLE
         P1       IN1        in       KEY_DP
         P2       IN1        in       KEY_LA
         R1       IN2        in       MFTS3
         R2       IN2        in       MFTS0
         S1       OUT        out      N$71
         S2       OUT        out      KEY_LAMFTS0_
         T1       GND        pwr      GND
         T2       IN1        in       OP1
         U1       P$1        pas      +3V(38)
         U2       IN2        in       MB07
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      N$66

F30      A1       IN1        in       N$749
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(45)
         C1       IN3        in       +3V(45)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(45)
         D2       IN1        in       IOP124_
         E1       OUT        oc       PC_ENABLE
         E2       IN2        in       MEM_EXT_IO_ENABLE_
         F1       IN1        in       N$67
         F2       IN3        in       +3V(45)
         H1       IN2        in       +3V(45)
         H2       IN4        in       TT_IO_ENABLE_
         J1       IN3        in       +3V(46)
         J2       OUT        oc       IO_ENABLE
         K1       IN4        in       +3V(46)
         K2       IN1        in       N$69
         L1       OUT        oc       DATA_ENABLE
         L2       IN2        in       +3V(45)
         M1       IN1        in       N$71
         M2       IN3        in       +3V(45)
         N1       IN2        in       N$70
         N2       IN4        in       +3V(45)
         P1       IN3        in       KEY_LAMFTS0_
         P2       OUT        oc       DATA_ADD_ENABLE
         R1       IN4        in       +3V(46)
         R2       IN1        in       +3V(46)
         S1       OUT        oc       SR_ENABLE
         S2       IN2        in       +3V(46)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(46)
         U1       P$1        pas      +3V(46)
         U2       IN4        in       MFTP0
         V1       P$1        pas      +3V(45)
         V2       OUT        oc       MANUAL_PRESET_

F31      A1       IN1        in       ADD_
         A2       VCC        pwr      VCC
         B1       IN2        in       N$57
         C1       IN3        in       STORE_
         C2       GND        pwr      GND
         D1       IN4        in       EAE_MEM_ENABLE_
         D2       IN1        in       EAE_MEM_ENABLE_
         E1       OUT        oc       MEM_ENABLE0_4
         E2       IN2        in       N$61
         F1       IN1        in       N$74
         F2       IN3        in       MEM_ENABLE0_4_
         H1       IN2        in       N$62
         H2       IN4        in       N$73
         J1       IN3        in       +3V(46)
         J2       OUT        oc       MEM_ENABLE5_8
         K1       IN4        in       +3V(47)
         K2       IN1        in       N$62
         L1       OUT        oc       MA_ENABLE0_4
         L2       IN2        in       +3V(47)
         M1       IN1        in       FETCH_
         M2       IN3        in       +3V(47)
         N1       IN2        in       +3V(47)
         N2       IN4        in       +3V(47)
         P1       IN3        in       +3V(47)
         P2       OUT        oc       MA_ENABLE5_11
         R1       IN4        in       +3V(47)
         R2       IN1        in       EXECUTE_
         S1       OUT        oc       B_FETCH
         S2       IN2        in       +3V(47)
         T1       GND        pwr      GND
         T2       IN3        in       +3V(47)
         U1       P$1        pas      +3V(47)
         U2       IN4        in       +3V(47)
         V1       P$1        pas      +3V(48)
         V2       OUT        oc       B_EXECUTE

F32      A1       IN1        in       N$89
         A2       VCC        pwr      VCC
         B1       IN2        in       +3V(48)
         C1       OUT        out      CARRY_INSERT_
         C2       GND        pwr      GND
         D1       IN1        in       MFTP1
         D2       IN1        in       TP4
         E1       IN2        in       KEY_STEXDP
         E2       IN2        in       +3V(48)
         F1       OUT        out      N$110
         F2       OUT        out      N$109
         H1       IN1        in       +3V(48)
         H2       IN1        in       OP1
         J1       IN2        in       TP2
         J2       IN2        in       MB06
         K1       OUT        out      N$112
         K2       OUT        out      N$72
         L1       IN1        in       TS4
         L2       IN1        in       IO_PC_LOAD
         M1       IN2        in       N$65
         M2       IN2        in       +3V(48)
         N1       OUT        out      PC_ENABLE_
         N2       OUT        out      N$750
         P1       IN1        in       ADDER11
         P2       IN1        in       +3V(48)
         R1       IN2        in       +3V(48)
         R2       IN2        in       N$137
         S1       OUT        out      ADDER11_
         S2       OUT        out      N$129
         T1       GND        pwr      GND
         T2       IN1        in       +3V(48)
         U1       P$1        pas               ***   unused    ***
         U2       IN2        in       CARRY_OUT0_
         V1       P$1        pas               ***   unused    ***
         V2       OUT        out      CARRY_OUT0

F33      A1       IN1A       in       N$130
         A2       VCC        pwr      VCC
         B1       IN1B       in       ASR_L_SET_
         C1       IN1C       in       +3V(48)
         C2       GND        pwr      GND
         D1       IN1D       in       RIGHT_SHIFT
         D2       IN1A       in       +3V(48)
         E1       IN2A       in       ADDER10
         E2       IN1B       in       TT_SHIFT_ENABLE
         F1       IN2B       in       DOUBLE_RIGHT_ROTATE
         F2       IN1C       in       TT_INST_
         H1       IN3A       in       ADDER_L_
         H2       IN1D       in       TT_DATA
         J1       IN3B       in       NO_SHIFT
         J2       IN2A       in       LINK
         K1       IN4A       in       ADDER00
         K2       IN2B       in       L_ENABLE
         L1       IN4B       in       LEFT_SHIFT
         L2       IN3A       in       LINK_
         M1       IN5A       in       ADDER01
         M2       IN3B       in       LBAR_ENABLE
         N1       IN5B       in       DOUBLE_LEFT_ROTATE
         N2       IN4A       in       AC00
         P1       IN5C       in       +3V(48)
         P2       IN4B       in       B_EAE_ON
         R1       OUT        out      N$128
         R2       IN4C       in       ASR_ENABLE
         S1       IN1A       in       N$137
         S2       IN4D       in       EAE_IR2_
         T1       GND        pwr      GND
         T2       OUT        out      N$137
         U1       IN1B       in       CARRY_OUT0
         U2       IN2B       in       CARRY_OUT0_
         V1       IN2A       in       N$129
         V2       OUT        out      ADDER_L_

F40      A1       P$2        io       MB11_
         A2       P$2        io       VCC
         B1       P$2        io       AC11_
         B2       P$2        io                ***   unused    ***
         C1       P$2        io       PC10_
         C2       P$2        io       GND
         D1       P$2        io       PC11_
         D2       P$2        io       MB09_
         E1       P$2        io       MA11_
         E2       P$2        io       MA09_
         F1       P$2        io       MQ10_
         F2       P$2        io       MB08_
         H1       P$2        io       MQ11_
         H2       P$2        io       AC09_
         J1       P$2        io       AC08_
         J2       P$2        io       PC06_
         K1       P$2        io       MB10_
         K2       P$2        io       MA08_
         L1       P$2        io       MA10_
         L2       P$2        io       MQ09_
         M1       P$2        io       AC10_
         M2       P$2        io       MQ07_
         N1       P$2        io       PC09_
         N2       P$2        io       MQ08_
         P1       P$2        io       MB07_
         P2       P$2        io       PC08_
         R1       P$2        io       MB06_
         R2       P$2        io       MA07_
         S1       P$2        io       PC07_
         S2       P$2        io       MQ06_
         T1       P$2        io                ***   unused    ***
         T2       P$2        io       AC07_
         U1       P$2        io                ***   unused    ***
         U2       P$2        io       MA06_
         V1       P$2        io                ***   unused    ***
         V2       P$2        io       AC06_

H01      C2       GND        pwr      GND
         D2       P$2        io       EA0
         E2       P$2        io       EA1
         F2       GND        pwr      GND
         H2       P$2        io       EA2
         J2       GND        pwr      GND
         K2       P$2        io       BMA00
         L2       GND        pwr      GND
         M2       P$2        io       BMA01
         N2       GND        pwr      GND
         P2       P$2        io       BMA02
         R2       GND        pwr      GND
         S2       P$2        io       BMA03
         T2       P$2        io       BMA04
         U2       GND        pwr      GND
         V2       P$2        io       BMA05

H02      C2       GND        pwr      GND
         D2       P$2        io       BMA06
         E2       P$2        io       BMA07
         F2       GND        pwr      GND
         H2       P$2        io       BMA08
         J2       GND        pwr      GND
         K2       P$2        io       BMA09
         L2       GND        pwr      GND
         M2       P$2        io       BMA10
         N2       GND        pwr      GND
         P2       P$2        io       BMA11
         R2       GND        pwr      GND
         S2       P$2        io       MCBMB00_
         T2       P$2        io       MCBMB01_
         U2       GND        pwr      GND
         V2       P$2        io       MCBMB02_

H03      C2       GND        pwr      GND
         D2       P$2        io       MCBMB03_
         E2       P$2        io       MCBMB04_
         F2       GND        pwr      GND
         H2       P$2        io       MCBMB05_
         J2       GND        pwr      GND
         K2       P$2        io       MCBMB06_
         L2       GND        pwr      GND
         M2       P$2        io       MCBMB07_
         N2       GND        pwr      GND
         P2       P$2        io       MCBMB08_
         R2       GND        pwr      GND
         S2       P$2        io       MCBMB09_
         T2       P$2        io       MCBMB10_
         U2       GND        pwr      GND
         V2       P$2        io       MCBMB11_

H04      C2       GND        pwr      GND
         D2       P$2        io       MEM_P
         E2       P$2        io       MEM00
         F2       GND        pwr      GND
         H2       P$2        io       MEM01
         J2       GND        pwr      GND
         K2       P$2        io       MEM02
         L2       GND        pwr      GND
         M2       P$2        io       MEM03
         N2       GND        pwr      GND
         P2       P$2        io       MEM04
         R2       GND        pwr      GND
         S2       P$2        io       MEM05
         T2       P$2        io       MEM06
         U2       GND        pwr      GND
         V2       P$2        io       MEM07

H05      C2       GND        pwr      GND
         D2       P$2        io       MEM08
         E2       P$2        io       MEM09
         F2       GND        pwr      GND
         H2       P$2        io       MEM10
         J2       GND        pwr      GND
         K2       P$2        io       MEM11
         L2       GND        pwr      GND
         M2       P$2        io       B_MEM_START
         N2       GND        pwr      GND
         P2       P$2        io       STROBE_
         R2       GND        pwr      GND
         S2       P$2        io       MEM_DONE_
         T2       P$2        io       MB_PARITY_ODD
         U2       GND        pwr      GND
         V2       P$2        io       BTP2

H06      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H07      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BAC00
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(49)
         H2       IN2        in       AC00
         J2       IN3        in       +3V(49)
         K2       OUT        out      BAC01
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(49)
         N2       IN2        in       AC01
         P2       IN3        in       +3V(49)
         R2       SLOW       pas      GND
         S2       OUT        out      BAC02
         T2       IN1        in       +3V(49)
         U2       IN2        in       AC02
         V2       IN3        in       +3V(49)

H08      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BAC03
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(49)
         H2       IN2        in       AC03
         J2       IN3        in       +3V(49)
         K2       OUT        out      BAC04
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(49)
         N2       IN2        in       AC04
         P2       IN3        in       +3V(49)
         R2       SLOW       pas      GND
         S2       OUT        out      BAC05
         T2       IN1        in       +3V(49)
         U2       IN2        in       AC05
         V2       IN3        in       +3V(49)

H09      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BAC06
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(50)
         H2       IN2        in       AC06
         J2       IN3        in       +3V(50)
         K2       OUT        out      BAC07
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(50)
         N2       IN2        in       AC07
         P2       IN3        in       +3V(50)
         R2       SLOW       pas      GND
         S2       OUT        out      BAC08
         T2       IN1        in       +3V(50)
         U2       IN2        in       AC08
         V2       IN3        in       +3V(50)

H10      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BAC09
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(50)
         H2       IN2        in       AC09
         J2       IN3        in       +3V(50)
         K2       OUT        out      BAC10
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(50)
         N2       IN2        in       AC10
         P2       IN3        in       +3V(50)
         R2       SLOW       pas      GND
         S2       OUT        out      BAC11
         T2       IN1        in       +3V(50)
         U2       IN2        in       AC11
         V2       IN3        in       +3V(50)

H11      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BIOP1_
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(51)
         H2       IN2        in       IOP1_
         J2       IN3        in       +3V(51)
         K2       OUT        out      BIOP2_
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(51)
         N2       IN2        in       IOP2_
         P2       IN3        in       +3V(51)
         R2       SLOW       pas      GND
         S2       OUT        out      BIOP4_
         T2       IN1        in       +3V(51)
         U2       IN2        in       IOP4_
         V2       IN3        in       +3V(51)

H12      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BTS3
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(51)
         H2       IN2        in       TS3_
         J2       IN3        in       +3V(51)
         K2       OUT        out      BTS1
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(51)
         N2       IN2        in       TS1_
         P2       IN3        in       +3V(51)
         R2       SLOW       pas      GND
         S2       OUT        out      BINITIALIZE_
         T2       IN1        in       +3V(51)
         U2       IN2        in       INITIALIZE_
         V2       IN3        in       +3V(51)

H13      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BMB00
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(52)
         H2       IN2        in       MB00
         J2       IN3        in       +3V(52)
         K2       OUT        out      BMB01
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(52)
         N2       IN2        in       MB01
         P2       IN3        in       +3V(52)
         R2       SLOW       pas      GND
         S2       OUT        out      BMB02
         T2       IN1        in       +3V(52)
         U2       IN2        in       MB02
         V2       IN3        in       +3V(52)

H14      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BMB03_
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(52)
         H2       IN2        in       MB03_
         J2       IN3        in       +3V(52)
         K2       OUT        out      BMB03
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(52)
         N2       IN2        in       MB03
         P2       IN3        in       +3V(52)
         R2       SLOW       pas      GND
         S2       OUT        out      BMB04_
         T2       IN1        in       +3V(52)
         U2       IN2        in       MB04_
         V2       IN3        in       +3V(52)

H15      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BMB04
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(53)
         H2       IN2        in       MB04
         J2       IN3        in       +3V(53)
         K2       OUT        out      BMB05_
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(53)
         N2       IN2        in       MB05_
         P2       IN3        in       +3V(53)
         R2       SLOW       pas      GND
         S2       OUT        out      BMB05
         T2       IN1        in       +3V(53)
         U2       IN2        in       MB05
         V2       IN3        in       +3V(53)

H16      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BMB06_
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(53)
         H2       IN2        in       MB06_
         J2       IN3        in       +3V(53)
         K2       OUT        out      BMB06
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(53)
         N2       IN2        in       MB06
         P2       IN3        in       +3V(53)
         R2       SLOW       pas      GND
         S2       OUT        out      BMB07_
         T2       IN1        in       +3V(53)
         U2       IN2        in       MB07_
         V2       IN3        in       +3V(53)

H17      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BMB07
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(54)
         H2       IN2        in       MB07
         J2       IN3        in       +3V(54)
         K2       OUT        out      BMB08_
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(54)
         N2       IN2        in       MB08_
         P2       IN3        in       +3V(54)
         R2       SLOW       pas      GND
         S2       OUT        out      BMB08
         T2       IN1        in       +3V(54)
         U2       IN2        in       MB08
         V2       IN3        in       +3V(54)

H18      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BMB09
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(54)
         H2       IN2        in       MB09
         J2       IN3        in       +3V(54)
         K2       OUT        out      BMB10
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(54)
         N2       IN2        in       MB10
         P2       IN3        in       +3V(54)
         R2       SLOW       pas      GND
         S2       OUT        out      BMB11
         T2       IN1        in       +3V(54)
         U2       IN2        in       MB11
         V2       IN3        in       +3V(54)

H19      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BRUN_
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(55)
         H2       IN2        in       RUN_
         J2       IN3        in       +3V(55)
         K2       OUT        out      BTT_INST_
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(55)
         N2       IN2        in       TT_INST_
         P2       IN3        in       +3V(55)
         R2       SLOW       pas      GND
         S2       OUT        out      BWC_OVERFLOW
         T2       IN1        in       +3V(55)
         U2       IN2        in       WC_OVERFLOW_
         V2       IN3        in       +3V(55)

H20      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         D2       OUT        out      BBREAK
         E2       SLOW       pas      GND
         F2       IN1        in       +3V(55)
         H2       IN2        in       BREAK_
         J2       IN3        in       +3V(55)
         K2       OUT        out      BADD_ACCEPTED_
         L2       SLOW       pas      GND
         M2       IN1        in       +3V(55)
         N2       IN2        in       ADD_ACCEPTED_
         P2       IN3        in       TS1_
         R2       SLOW       pas               ***   unused    ***
         S2       OUT        out               ***   unused    ***
         T2       IN1        in                ***   unused    ***
         U2       IN2        in                ***   unused    ***
         V2       IN3        in                ***   unused    ***

H21      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H22      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H30      A1       A1         in       MB11
         A2       VCC        pwr      VCC
         C1       C1         oc       IO_BUS_IN_INT_
         C2       GND        pwr      GND
         D1       D1         out               *** unconnected ***
         D2       D2         in       CLOCK
         E1       E1         out               *** unconnected ***
         F2       F2         in       IOP4_
         H1       H1         oc       IO_BUS_IN_SKIP_
         J2       J2         out      CLOCK_ENABLE_
         K1       K1         out               *** unconnected ***
         K2       K2         out      CLOCK_P4
         L1       L1         in       MB10
         L2       L2         in       IOP1_
         M2       M2         in       MB08
         N1       N1         in       MB09_
         N2       N2         in       MB07
         P1       P1         in       INITIALIZE_
         P2       P2         in       MB06_
         R1       R1         in       IOP2_
         R2       R2         in       MB05
         S1       S1         out      CLOCK_IOT
         S2       S2         in       MB04_
         T1       GND        pwr      GND
         T2       T2         in       MB03_
         U2       U2         in       MB09
         V1       V1         in       OVERFLOW
         V2       V2         in       LOAD_COUNTER

H33      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H35      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H36      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H37      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H38      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H39      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

H40      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

HJ23     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AE2      AE2        out      Z_AXIS
         AH2      AH2        in       INITIALIZE
         AJ1      AJ1        out      PEN_STROBE
         AJ2      AJ2        in       IOP2
         AK1      AK1        in       PEN_STROBE
         AK2      AK2        in       MB09_
         AN1      AN1        in       MB10
         AN2      AN2        in       LIGHT_PEN
         AP1      AP1        in       MB11
         AP2      AP2        out      Y_STROBE
         AR1      AR1        in       IOP1
         AR2      AR2        out      CLEAR_Y_
         AS1      AS1        out      X_STROBE
         AS2      AS2        out      CLEAR_X_
         AT1      GND        pwr      GND
         AV2      -30V       pwr      -30V
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD2      BD2        in       IOP4
         BE2      BE2        in       MB07_
         BF2      BF2        in       MB03_
         BH2      BH2        in       MB04_
         BJ2      BJ2        in       MB08_
         BK2      BK2        in       MB05_
         BL2      BL2        in       MB07
         BM2      BM2        in       MB06
         BN2      BN2        in       MB08
         BP2      BP2        oc       IO_BUS_IN_INT_
         BR2      BR2        oc       IO_BUS_IN_SKIP_
         BT1      GND        pwr      GND

HJ24     AA2      VCC        pwr      VCC
         AB2      -15V       pwr      -15V
         AC2      GND        pwr      GND
         AD2      AD2        io       X_STROBE
         AE2      AE2        in       AC02
         AF2      AF2        in       AC03
         AL2      AL2        io       CLEAR_X_
         AM2      AM2        in       AC04
         AN2      AN2        in       AC05
         AS2      AS2        in       AC06
         AT2      AT2        in       AC07
         BA2      VCC        pwr      VCC
         BB2      -15V       pwr      -15V
         BC2      GND        pwr      GND
         BD2      BD2        in       AC08
         BE2      BE2        in       AC09
         BH2      BH2        in       AC10
         BJ2      BJ2        in       AC11
         BS2      BS2        out      X_AXIS

HJ25     AA2      VCC        pwr      VCC
         AB2      -15V       pwr      -15V
         AC2      GND        pwr      GND
         AD2      AD2        io       Y_STROBE
         AE2      AE2        in       AC02
         AF2      AF2        in       AC03
         AL2      AL2        io       CLEAR_Y_
         AM2      AM2        in       AC04
         AN2      AN2        in       AC05
         AS2      AS2        in       AC06
         AT2      AT2        in       AC07
         BA2      VCC        pwr      VCC
         BB2      -15V       pwr      -15V
         BC2      GND        pwr      GND
         BD2      BD2        in       AC08
         BE2      BE2        in       AC09
         BH2      BH2        in       AC10
         BJ2      BJ2        in       AC11
         BS2      BS2        out      Y_AXIS

HJ26     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AD1      AD1        in       RD_HOLE2
         AD2      AD2        in       RD_HOLE1
         AE1      AE1        in       RD_HOLE4
         AE2      AE2        in       RD_HOLE3
         AF1      AF1        in       RD_HOLE8
         AF2      AF2        in       RD_HOLE7
         AH1      AH1        in       RD_HOLE6
         AH2      AH2        in       RD_HOLE5
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        out               *** unconnected ***
         AK1      AK1        out      RDR_RUN_
         AK2      AK2        oc       IO_BUS_IN_SKIP_
         AL2      AL2        oc       IO_BUS_IN_INT_
         AM2      AM2        out               *** unconnected ***
         AN1      AN1        oc       IO_BUS_IN11_
         AN2      AN2        oc       IO_BUS_IN07_
         AP1      AP1        oc       IO_BUS_IN09_
         AP2      AP2        oc       IO_BUS_IN04_
         AR1      AR1        oc       IO_BUS_IN06_
         AR2      AR2        oc       IO_BUS_IN10_
         AS1      AS1        oc       IO_BUS_IN08_
         AS2      AS2        oc       IO_BUS_IN05_
         AT1      GND        pwr      GND
         AT2      AT2        out               *** unconnected ***
         AU2      AU2        in       IOP1
         AV2      AV2        in       IOP2
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD1      BD1        in       RDR_SHIFT_
         BD2      BD2        in       MB03_
         BE1      BE1        in       MB05_
         BE2      BE2        in       MB04_
         BF1      BF1        in       MB07_
         BF2      BF2        in       MB06_
         BH2      BH2        in       MB08
         BJ1      BJ1        in       RDR_SHIFT
         BK1      BK1        in       IOP4
         BK2      BK2        out      RDR_ENABLE_
         BM1      BM1        in       RDR_FEED_SWITCH
         BM2      BM2        in       S_FEED_HOLE
         BN2      BN2        in       STOP_COMPLETE
         BP1      BP1        in       INITIALIZE_
         BP2      BP2        out      BA
         BR1      BR1        out      BB_
         BR2      BR2        out      PWR
         BS1      BS1        out      BA_
         BS2      BS2        in       CLOCK1
         BT1      GND        pwr      GND
         BU2      BU2        out      BB

HJ27     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AK2      AK         in       RDR_ENABLE_
         AM2      AM         out               *** unconnected ***
         AP2      AP         out               *** unconnected ***
         AS2      AS         out      RDR_SHIFT
         AT2      AT         out      RDR_SHIFT_
         AU2      AU         out      CLOCK1
         BA2      VCC        pwr      VCC
         BB2      -15V       pwr      -15V
         BC2      GND        pwr      GND
         BP2      BP         in       RDR_FEED_SWITCH
         BR2      BR         out      STOP_COMPLETE
         BS2      BS         in       RDR_RUN_

HJ28     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AD1      AD1        in       AC10
         AD2      AD2        in       AC11
         AE1      AE1        in       AC08
         AE2      AE2        in       AC09
         AF1      AF1        in       AC06
         AF2      AF2        in       AC07
         AH1      AH1        in       AC04
         AH2      AH2        in       AC05
         AJ1      AJ1        out               *** unconnected ***
         AJ2      AJ2        out               *** unconnected ***
         AK1      AK1        out      N$734
         AK2      AK2        out      N$739
         AL1      AL1        out      N$735
         AL2      AL2        out      N$740
         AM1      AM1        out      N$737
         AM2      AM2        out      N$741
         AN1      AN1        out      N$738
         AN2      AN2        out      N$736
         AP2      AP2        in       IOP4
         AR1      AR1        in       IOP2
         AR2      AR2        in       IOP1
         AS1      AS1        out               *** unconnected ***
         AS2      AS2        in       INITIALIZE_
         AT1      GND        pwr      GND
         AT2      AT2        in       PUN_FEED_SWITCH_
         AU1      AU1        in       N$721
         AU2      AU2        out               *** unconnected ***
         AV2      AV2        in       SYNC_PUN
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD1      BD1        in       MB04_
         BD2      BD2        in       MB05_
         BE1      BE1        in       MB06_
         BE2      BE2        in       MB07
         BF1      BF1        in       MB08_
         BF2      BF2        in       MB03_
         BH2      BH2        out      N$722
         BN2      BN2        oc       IO_BUS_IN_SKIP_
         BS2      BS2        oc       IO_BUS_IN_INT_
         BT1      GND        pwr      GND
         BU2      P$1        pas      +3VC01
         BV1      BV1        out      N$721

HJ29     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AD2      AD2        in       MB06_
         AE2      AE2        in       MB05
         AF2      AF2        in       MB03
         AH2      AH2        in       MB04_
         AJ2      AJ2        out      PEN_RIGHT
         AK2      AK2        in       MB08
         AL2      AL2        out      PEN_LEFT
         AM2      AM2        out               *** unconnected ***
         AN2      AN2        out      DRUM_UP
         AP2      AP2        out               *** unconnected ***
         AR2      AR2        out      DRUM_DOWN
         AS2      AS2        in       MB07
         AT1      GND        pwr      GND
         AT2      AT2        out      PEN_UP
         AU2      AU2        out               *** unconnected ***
         AV2      AV2        out      PEN_DOWN
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BD2      BD2        out               *** unconnected ***
         BE2      BE2        oc       IO_BUS_IN_SKIP_
         BF2      BF2        oc       IO_BUS_IN_INT_
         BH2      BH2        in       IOP1
         BJ2      BJ2        out               *** unconnected ***
         BK2      BK2        out               *** unconnected ***
         BL2      BL2        in       IOP1_
         BM2      BM2        in       IOP2_
         BN2      BN2        in       INITIALIZE
         BP2      BP2        in       IOP2
         BS2      BS2        out               *** unconnected ***
         BT1      GND        pwr      GND
         BT2      BT2        in       IOP4
         BU1      BU1        in       MB07_
         BV1      BV1        in       MB08_

HJ31     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AE1      AE1        in       AC00
         AE2      AE2        out               *** unconnected ***
         AF1      AF1        oc       IO_BUS_IN02_
         AF2      AF2        oc       IO_BUS_IN00_
         AH1      AH1        in       AC03
         AJ1      AJ1        oc       IO_BUS_IN06_
         AJ2      AJ2        oc       IO_BUS_IN04_
         AK1      AK1        in       AC05
         AL1      AL1        in       AC07
         AM1      AM1        oc       IO_BUS_IN08_
         AM2      AM2        oc       IO_BUS_IN10_
         AN2      AN2        in       AC09
         AP1      AP1        in       AC11
         AP2      AP2        oc       IO_BUS_IN09_
         AR1      AR1        in       AC08
         AR2      AR2        in       AC10
         AS1      AS1        oc       IO_BUS_IN11_
         AT1      GND        pwr      GND
         AT2      AT2        in       AC06
         AU1      AU1        oc       IO_BUS_IN05_
         AU2      AU2        in       AC04
         AV1      AV1        in       AC02
         AV2      AV2        oc       IO_BUS_IN07_
         BA1      BA1        in       AC01
         BA2      VCC        pwr      VCC
         BB1      BB1        oc       IO_BUS_IN03_
         BC2      GND        pwr      GND
         BD1      BD1        oc       IO_BUS_IN01_
         BF1      BF1        out               *** unconnected ***
         BH1      BH1        out               *** unconnected ***
         BH2      BH2        out               *** unconnected ***
         BJ1      BJ1        in       MB10
         BJ2      BJ2        in       CLOCK
         BK1      BK1        in       CLOCK_P4
         BL1      BL1        in       CLOCK_IOT
         BM1      BM1        out               *** unconnected ***
         BM2      BM2        oc       CLOCK_AC_CLR_
         BN1      BN1        out      LOAD_COUNTER
         BP1      BP1        in       MB10_
         BR1      BR1        out               *** unconnected ***
         BS1      BS1        out      OVERFLOW
         BT1      GND        pwr      GND

HJ32     AA2      VCC        pwr      VCC
         AC2      GND        pwr      GND
         AD2      AD2        in       INDEX_MARKERS
         AE1      AE1        in       ZONE11_INDEX
         AE2      AE2        in       ZONE12_INDEX
         AF1      AF1        oc       IO_BUS_IN00_
         AF2      AF2        oc       IO_BUS_IN01_
         AH1      AH1        in       IOT634
         AH2      AH2        oc       IO_BUS_IN02_
         AJ2      AJ2        oc       IO_BUS_IN03_
         AK2      AK2        in       ZONE01_INDEX
         AL2      AL2        in       ZONE10_INDEX
         AM2      AM2        oc       IO_BUS_IN05_
         AN2      AN2        oc       IO_BUS_IN04_
         AP2      AP2        in       ZONE03_INDEX
         AR2      AR2        in       ZONE02_INDEX
         AS2      AS2        in       ZONE05_INDEX
         AT1      GND        pwr      GND
         AU2      AU2        oc       IO_BUS_IN06_
         AV2      AV2        oc       IO_BUS_IN07_
         BA2      VCC        pwr      VCC
         BC2      GND        pwr      GND
         BE2      BE2        in       ZONE04_INDEX
         BH2      BH2        oc       IO_BUS_IN11_
         BJ2      BJ2        oc       IO_BUS_IN10_
         BK2      BK2        in       ZONE08_INDEX
         BL2      BL2        in       ZONE09_INDEX
         BM2      BM2        in       IOT632
         BN2      BN2        oc       IO_BUS_IN09_
         BP2      BP2        oc       IO_BUS_IN08_
         BR1      BR1        in       ZONE07_INDEX
         BS1      BS1        in       ZONE06_INDEX
         BS2      BS2        in       INITIALIZE_
         BT1      GND        pwr      GND
         BU1      BU1        out      I_M_D

HJ34     AA2      P$2        io                ***   unused    ***
         AB2      P$2        io                ***   unused    ***
         AC2      P$2        io       GND
         AD2      P$2        io                ***   unused    ***
         AE2      P$2        io                ***   unused    ***
         AF2      P$2        io                ***   unused    ***
         AH2      P$2        io                ***   unused    ***
         AJ2      P$2        io                ***   unused    ***
         AK2      P$2        io       CR_READY
         AL2      P$2        io                ***   unused    ***
         AM2      P$2        io                ***   unused    ***
         AN2      P$2        io                ***   unused    ***
         AP2      P$2        io                ***   unused    ***
         AR2      P$2        io                ***   unused    ***
         AS2      P$2        io                ***   unused    ***
         AT2      P$2        io                ***   unused    ***
         AU2      P$2        io                ***   unused    ***
         AV2      P$2        io                ***   unused    ***
         BA2      P$2        io                ***   unused    ***
         BB2      P$2        io                ***   unused    ***
         BC2      P$2        io       GND
         BD2      P$2        io       ZONE01_INDEX
         BE2      P$2        io       ZONE02_INDEX
         BF2      P$2        io       ZONE03_INDEX
         BH2      P$2        io       INDEX_MARKERS
         BJ2      P$2        io       ZONE04_INDEX
         BK2      P$2        io       ZONE05_INDEX
         BL2      P$2        io       ZONE06_INDEX
         BM2      P$2        io       ZONE07_INDEX
         BN2      P$2        io       ZONE08_INDEX
         BP2      P$2        io       CR_READ
         BR2      P$2        io       C_I_R
         BS2      P$2        io       ZONE09_INDEX
         BT2      P$2        io       ZONE10_INDEX
         BU2      P$2        io       ZONE11_INDEX
         BV2      P$2        io       ZONE12_INDEX

J01      C2       GND        pwr      GND
         D2       P$2        io       BAC00
         E2       P$2        io       BAC01
         F2       GND        pwr      GND
         H2       P$2        io       BAC02
         J2       GND        pwr      GND
         K2       P$2        io       BAC03
         L2       GND        pwr      GND
         M2       P$2        io       BAC04
         N2       GND        pwr      GND
         P2       P$2        io       BAC05
         R2       GND        pwr      GND
         S2       P$2        io       BAC06
         T2       P$2        io       BAC07
         U2       GND        pwr      GND
         V2       P$2        io       BAC08

J02      C2       GND        pwr      GND
         D2       P$2        io       BAC09
         E2       P$2        io       BAC10
         F2       GND        pwr      GND
         H2       P$2        io       BAC11
         J2       GND        pwr      GND
         K2       P$2        io       BIOP1_
         L2       GND        pwr      GND
         M2       P$2        io       BIOP2_
         N2       GND        pwr      GND
         P2       P$2        io       BIOP4_
         R2       GND        pwr      GND
         S2       P$2        io       BTS3
         T2       P$2        io       BTS1
         U2       GND        pwr      GND
         V2       P$2        io       BINITIALIZE_

J03      C2       GND        pwr      GND
         D2       P$2        io       BMB00
         E2       P$2        io       BMB01
         F2       GND        pwr      GND
         H2       P$2        io       BMB02
         J2       GND        pwr      GND
         K2       P$2        io       BMB03_
         L2       GND        pwr      GND
         M2       P$2        io       BMB03
         N2       GND        pwr      GND
         P2       P$2        io       BMB04_
         R2       GND        pwr      GND
         S2       P$2        io       BMB04
         T2       P$2        io       BMB05_
         U2       GND        pwr      GND
         V2       P$2        io       BMB05

J04      C2       GND        pwr      GND
         D2       P$2        io       BMB06_
         E2       P$2        io       BMB06
         F2       GND        pwr      GND
         H2       P$2        io       BMB07_
         J2       GND        pwr      GND
         K2       P$2        io       BMB07
         L2       GND        pwr      GND
         M2       P$2        io       BMB08_
         N2       GND        pwr      GND
         P2       P$2        io       BMB08
         R2       GND        pwr      GND
         S2       P$2        io       BMB09
         T2       P$2        io       BMB10
         U2       GND        pwr      GND
         V2       P$2        io       BMB11

J05      C2       GND        pwr      GND
         D2       P$2        io       IN00
         E2       P$2        io       IN01
         F2       GND        pwr      GND
         H2       P$2        io       IN02
         J2       GND        pwr      GND
         K2       P$2        io       IN03
         L2       GND        pwr      GND
         M2       P$2        io       IN04
         N2       GND        pwr      GND
         P2       P$2        io       IN05
         R2       GND        pwr      GND
         S2       P$2        io       IN06
         T2       P$2        io       IN07
         U2       GND        pwr      GND
         V2       P$2        io       IN08

J06      C2       GND        pwr      GND
         D2       P$2        io       IN09
         E2       P$2        io       IN10
         F2       GND        pwr      GND
         H2       P$2        io       IN11
         J2       GND        pwr      GND
         K2       P$2        io       SKIPB
         L2       GND        pwr      GND
         M2       P$2        io       IRQ
         N2       GND        pwr      GND
         P2       P$2        io       ACCLR
         R2       GND        pwr      GND
         S2       P$2        io       BRUN_
         T2       P$2        io       BTT_INST_
         U2       GND        pwr      GND
         V2       P$2        io       LINE_IN

J07      C2       GND        pwr      GND
         D2       P$2        io       DA00
         E2       P$2        io       DA01
         F2       GND        pwr      GND
         H2       P$2        io       DA02
         J2       GND        pwr      GND
         K2       P$2        io       DA03
         L2       GND        pwr      GND
         M2       P$2        io       DA04
         N2       GND        pwr      GND
         P2       P$2        io       DA05
         R2       GND        pwr      GND
         S2       P$2        io       DA06
         T2       P$2        io       DA07
         U2       GND        pwr      GND
         V2       P$2        io       DA08

J08      C2       GND        pwr      GND
         D2       P$2        io       DA09
         E2       P$2        io       DA10
         F2       GND        pwr      GND
         H2       P$2        io       DA11
         J2       GND        pwr      GND
         K2       P$2        io       BRQ
         L2       GND        pwr      GND
         M2       P$2        io       D_IN_
         N2       GND        pwr      GND
         P2       P$2        io       BBREAK
         R2       GND        pwr      GND
         S2       P$2        io       BADD_ACCEPTED_
         T2       P$2        io       MEM_INCR
         U2       GND        pwr      GND
         V2       P$2        io                ***   unused    ***

J09      C2       GND        pwr      GND
         D2       P$2        io       D00
         E2       P$2        io       D01
         F2       GND        pwr      GND
         H2       P$2        io       D02
         J2       GND        pwr      GND
         K2       P$2        io       D03
         L2       GND        pwr      GND
         M2       P$2        io       D04
         N2       GND        pwr      GND
         P2       P$2        io       D05
         R2       GND        pwr      GND
         S2       P$2        io       D06
         T2       P$2        io       D07
         U2       GND        pwr      GND
         V2       P$2        io       D08

J10      C2       GND        pwr      GND
         D2       P$2        io       D09
         E2       P$2        io       D10
         F2       GND        pwr      GND
         H2       P$2        io       D11
         J2       GND        pwr      GND
         K2       P$2        io       3CYCLE
         L2       GND        pwr      GND
         M2       P$2        io       CA_INCR_
         N2       GND        pwr      GND
         P2       P$2        io       BWC_OVERFLOW
         R2       GND        pwr      GND
         S2       P$2        io       EDA2
         T2       P$2        io       EDA1
         U2       GND        pwr      GND
         V2       P$2        io       EDA0

J11      C2       GND        pwr      GND
         D2       P$2        io       EDA2
         E2       P$2        io       EDA1
         F2       GND        pwr      GND
         H2       P$2        io       EDA0
         J2       GND        pwr      GND
         K2       P$2        io                ***   unused    ***
         L2       GND        pwr      GND
         M2       P$2        io                ***   unused    ***
         N2       GND        pwr      GND
         P2       P$2        io                ***   unused    ***
         R2       GND        pwr      GND
         S2       P$2        io                ***   unused    ***
         T2       P$2        io                ***   unused    ***
         U2       GND        pwr      GND
         V2       P$2        io       IO_PC_LOAD

J12      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND
         E2       P$2        io       RX_DATA
         H2       P$2        io       TX_DATA
         K2       P$2        io                ***   unused    ***
         M2       P$2        io       READER_RUN_
         U2       P$2        io                ***   unused    ***
         V2       -30V       pwr      -30V

J13      A1       IN         in       IN00
         A2       VCC        pwr      VCC
         B1       IN2        pas      IO_BUS_IN00_
         B2       -15V       pwr      -15V
         C1       IN3        in       +3V(56)
         C2       GND        pwr      GND
         D1       IN4        in       +3V(56)
         D2       IN         in       IN01
         E1       OUT        out      INPUT_BUS00
         E2       IN2        pas      IO_BUS_IN01_
         F1       IN         in       IN02
         F2       IN3        in       +3V(56)
         H1       IN2        pas      IO_BUS_IN02_
         H2       IN4        in       +3V(56)
         J1       IN3        in       +3V(56)
         J2       OUT        out      INPUT_BUS01
         K1       IN4        in       +3V(56)
         K2       IN         in       IN03
         L1       OUT        out      INPUT_BUS02
         L2       IN2        pas      IO_BUS_IN03_
         M1       IN         in       IN04
         M2       IN3        in       +3V(56)
         N1       IN2        pas      IO_BUS_IN04_
         N2       IN4        in       +3V(56)
         P1       IN3        in       TT0_
         P2       OUT        out      INPUT_BUS03
         R1       IN4        in       +3V(52)
         R2       IN         in       IN05
         S1       OUT        out      INPUT_BUS04
         S2       IN2        pas      IO_BUS_IN05_
         T1       GND        pwr      GND
         T2       IN3        in       TT1_
         U2       IN4        in       ME05_
         V2       OUT        out      INPUT_BUS05

J14      A1       IN         in       IN06
         A2       VCC        pwr      VCC
         B1       IN2        pas      IO_BUS_IN06_
         B2       -15V       pwr      -15V
         C1       IN3        in       TT2_
         C2       GND        pwr      GND
         D1       IN4        in       ME06_
         D2       IN         in       IN07
         E1       OUT        out      INPUT_BUS06
         E2       IN2        pas      IO_BUS_IN07_
         F1       IN         in       IN08
         F2       IN3        in       TT3_
         H1       IN2        pas      IO_BUS_IN08_
         H2       IN4        in       ME07_
         J1       IN3        in       TT4_
         J2       OUT        out      INPUT_BUS07
         K1       IN4        in       ME08_
         K2       IN         in       IN09
         L1       OUT        out      INPUT_BUS08
         L2       IN2        pas      IO_BUS_IN09_
         M1       IN         in       IN10
         M2       IN3        in       TT5_
         N1       IN2        pas      IO_BUS_IN10_
         N2       IN4        in       ME09_
         P1       IN3        in       TT6_
         P2       OUT        out      INPUT_BUS09
         R1       IN4        in       ME10_
         R2       IN         in       IN11
         S1       OUT        out      INPUT_BUS10
         S2       IN2        pas      IO_BUS_IN11_
         T1       GND        pwr      GND
         T2       IN3        in       TT7_
         U2       IN4        in       ME11_
         V2       OUT        out      INPUT_BUS11

J15      A1       IN         in       SKIPB
         A2       VCC        pwr      VCC
         B1       IN2        pas      IO_BUS_IN_SKIP_
         B2       -15V       pwr      -15V
         C1       IN3        in       TT_SKIP_
         C2       GND        pwr      GND
         D1       IN4        in       MP_SKIP_
         D2       IN         in       IRQ
         E1       OUT        out      IO_SKIP
         E2       IN2        pas      IO_BUS_IN_INT_
         F1       IN         in       ACCLR
         F2       IN3        in       TT_INT_
         H1       IN2        pas      IO_BUS_IN_AC_CLR_
         H2       IN4        in       MP_INT_
         J1       IN3        in       TT_AC_CLR_
         J2       OUT        out      INT_RQST
         K1       IN4        in       CLOCK_AC_CLR_
         K2       IN         in       LINE_IN
         L1       OUT        out      AC_CLEAR
         L2       IN2        pas      N$243
         M1       IN         in       BRQ
         M2       IN3        in       N$243
         N1       IN2        pas      N$246
         N2       IN4        in       N$243
         P1       IN3        in       N$246
         P2       OUT        out      LINE_
         R1       IN4        in       N$246
         R2       IN         in       D_IN_
         S1       OUT        out      BRK_RQST
         S2       IN2        pas      N$245
         T1       GND        pwr      GND
         T2       IN3        in       N$245
         U2       IN4        in       N$245
         V2       OUT        out      DATA_IN_

J16      A1       IN         in       DA00
         A2       VCC        pwr      VCC
         B1       IN2        pas      N$202
         B2       -15V       pwr      -15V
         C1       IN3        in       N$202
         C2       GND        pwr      GND
         D1       IN4        in       N$202
         D2       IN         in       DA01
         E1       OUT        out      DATA_ADD00
         E2       IN2        pas      N$200
         F1       IN         in       DA02
         F2       IN3        in       N$200
         H1       IN2        pas      N$203
         H2       IN4        in       N$200
         J1       IN3        in       N$203
         J2       OUT        out      DATA_ADD01
         K1       IN4        in       N$203
         K2       IN         in       DA03
         L1       OUT        out      DATA_ADD02
         L2       IN2        pas      N$204
         M1       IN         in       DA04
         M2       IN3        in       N$204
         N1       IN2        pas      N$201
         N2       IN4        in       N$204
         P1       IN3        in       N$201
         P2       OUT        out      DATA_ADD03
         R1       IN4        in       N$201
         R2       IN         in       DA05
         S1       OUT        out      DATA_ADD04
         S2       IN2        pas      N$205
         T1       GND        pwr      GND
         T2       IN3        in       N$205
         U2       IN4        in       N$205
         V2       OUT        out      DATA_ADD05

J17      A1       IN         in       DA06
         A2       VCC        pwr      VCC
         B1       IN2        pas      N$207
         B2       -15V       pwr      -15V
         C1       IN3        in       N$207
         C2       GND        pwr      GND
         D1       IN4        in       N$207
         D2       IN         in       DA07
         E1       OUT        out      DATA_ADD06
         E2       IN2        pas      N$208
         F1       IN         in       DA08
         F2       IN3        in       N$208
         H1       IN2        pas      N$209
         H2       IN4        in       N$208
         J1       IN3        in       N$209
         J2       OUT        out      DATA_ADD07
         K1       IN4        in       N$209
         K2       IN         in       DA09
         L1       OUT        out      DATA_ADD08
         L2       IN2        pas      N$210
         M1       IN         in       DA10
         M2       IN3        in       N$210
         N1       IN2        pas      N$206
         N2       IN4        in       N$210
         P1       IN3        in       N$206
         P2       OUT        out      DATA_ADD09
         R1       IN4        in       N$206
         R2       IN         in       DA11
         S1       OUT        out      DATA_ADD10
         S2       IN2        pas      N$211
         T1       GND        pwr      GND
         T2       IN3        in       N$211
         U2       IN4        in       N$211
         V2       OUT        out      DATA_ADD11

J18      A1       IN         in       D00
         A2       VCC        pwr      VCC
         B1       IN2        pas      N$223
         B2       -15V       pwr      -15V
         C1       IN3        in       N$223
         C2       GND        pwr      GND
         D1       IN4        in       N$223
         D2       IN         in       D01
         E1       OUT        out      DATA00
         E2       IN2        pas      N$222
         F1       IN         in       D02
         F2       IN3        in       N$222
         H1       IN2        pas      N$221
         H2       IN4        in       N$222
         J1       IN3        in       N$221
         J2       OUT        out      DATA01
         K1       IN4        in       N$221
         K2       IN         in       D03
         L1       OUT        out      DATA02
         L2       IN2        pas      N$220
         M1       IN         in       D04
         M2       IN3        in       N$220
         N1       IN2        pas      N$219
         N2       IN4        in       N$220
         P1       IN3        in       N$219
         P2       OUT        out      DATA03
         R1       IN4        in       N$219
         R2       IN         in       D05
         S1       OUT        out      DATA04
         S2       IN2        pas      N$218
         T1       GND        pwr      GND
         T2       IN3        in       N$218
         U2       IN4        in       N$218
         V2       OUT        out      DATA05

J19      A1       IN         in       D06
         A2       VCC        pwr      VCC
         B1       IN2        pas      N$217
         B2       -15V       pwr      -15V
         C1       IN3        in       N$217
         C2       GND        pwr      GND
         D1       IN4        in       N$217
         D2       IN         in       D07
         E1       OUT        out      DATA06
         E2       IN2        pas      N$216
         F1       IN         in       D08
         F2       IN3        in       N$216
         H1       IN2        pas      N$215
         H2       IN4        in       N$216
         J1       IN3        in       N$215
         J2       OUT        out      DATA07
         K1       IN4        in       N$215
         K2       IN         in       D09
         L1       OUT        out      DATA08
         L2       IN2        pas      N$214
         M1       IN         in       D10
         M2       IN3        in       N$214
         N1       IN2        pas      N$213
         N2       IN4        in       N$214
         P1       IN3        in       N$213
         P2       OUT        out      DATA09
         R1       IN4        in       N$213
         R2       IN         in       D11
         S1       OUT        out      DATA10
         S2       IN2        pas      N$212
         T1       GND        pwr      GND
         T2       IN3        in       N$212
         U2       IN4        in       N$212
         V2       OUT        out      DATA11

J20      A1       IN         in       MEM_INCR
         A2       VCC        pwr      VCC
         B1       IN2        pas      N$250
         B2       -15V       pwr      -15V
         C1       IN3        in       N$250
         C2       GND        pwr      GND
         D1       IN4        in       N$250
         D2       IN         in       3CYCLE
         E1       OUT        out      MEMORY_INCREMENT
         E2       IN2        pas      N$253
         F1       IN         in       CA_INCR_
         F2       IN3        in       N$253
         H1       IN2        pas      N$254
         H2       IN4        in       N$253
         J1       IN3        in       N$254
         J2       OUT        out      3_CYCLE
         K1       IN4        in       N$254
         K2       IN         in       EDA0
         L1       OUT        out      CA_INCREMENT_
         L2       IN2        pas      N$260
         M1       IN         in       EDA1
         M2       IN3        in       N$260
         N1       IN2        pas      N$259
         N2       IN4        in       N$260
         P1       IN3        in       N$259
         P2       OUT        out      EXT_DATA_ADD0
         R1       IN4        in       N$259
         R2       IN         in       EDA2
         S1       OUT        out      EXT_DATA_ADD1
         S2       IN2        pas      N$261
         T1       GND        pwr      GND
         T2       IN3        in       N$261
         U2       IN4        in       N$261
         V2       OUT        out      EXT_DATA_ADD2

J21      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J22      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J30      A2       VCC        pwr      VCC
         C2       GND        pwr      GND
         D2       D2         out      CLOCK
         F2       F2         io       CLOCK
         J2       J2         in       CLOCK_ENABLE_
         K2       K2         in       +3V(46)
         R2       R2         in       60HZ_IN

J33      A1       A1         in       MB07
         A2       VCC        pwr      VCC
         B1       B1         in       MB05_
         C1       C1         in       MB03
         C2       GND        pwr      GND
         D1       D1         in       MB06
         D2       D2         in       MB04
         E1       E1         in       MB08
         E2       E2         in       MB06_
         F1       F1         in       BIOP4
         F2       F2         in       BIOP1
         H1       H1         out               *** unconnected ***
         H2       H2         in       BIOP2
         J1       J1         in       INDEX_MARKERS
         J2       J2         out               *** unconnected ***
         K1       K1         in       I_M_D
         L1       L1         out               *** unconnected ***
         M1       M1         out               *** unconnected ***
         N1       N1         in       INITIALIZE_
         N2       N2         oc       IO_BUS_IN_INT_
         P1       P1         out      IOT632
         P2       P2         oc       IO_BUS_IN_SKIP_
         R1       R1         out      IOT634
         R2       R2         in       CR_READY
         S1       S1         out               *** unconnected ***
         S2       S2         out      CR_READ
         T1       GND        pwr      GND
         T2       T2         out               *** unconnected ***
         U1       U1         out               *** unconnected ***
         U2       U2         in       C_I_R

J35      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J36      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J37      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J38      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J39      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

J40      A2       VCC        pwr      VCC
         B2       -15V       pwr      -15V
         C2       GND        pwr      GND

