|mmu8l
AC_LOW => ~NO_FANOUT~
ACLR_L <= ACLR_L.DB_MAX_OUTPUT_PORT_TYPE
EMA <= Equal2.DB_MAX_OUTPUT_PORT_TYPE
BF_ENABLE_L => comb.IN1
BF_ENABLE_L => bf_ena.IN0
DEL1 => ~NO_FANOUT~
DEL2 => ~NO_FANOUT~
DEL3 => always0.IN0
DEL4 => ~NO_FANOUT~
DEL5 => WRITE.IN0
DEL6 => ~NO_FANOUT~
DF_ENABLE_L => ibif_ena.IN1
DF_ENABLE_L => df_ena.IN0
E_OR_F_SET => comb.IN0
E_OR_F_SET => comb.IN0
EA[2] <= EA[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
EA[1] <= EA[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
EA[0] <= EA[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
EA_L <= EA_L.DB_MAX_OUTPUT_PORT_TYPE
EMA_L <= EMA_L.DB_MAX_OUTPUT_PORT_TYPE
EXDA_L[2] => WideNor2.IN2
EXDA_L[1] => WideNor2.IN1
EXDA_L[0] => WideNor2.IN0
FIELD1 <= Equal0.DB_MAX_OUTPUT_PORT_TYPE
IB_L[11] <= IB_L[11].DB_MAX_OUTPUT_PORT_TYPE
IB_L[10] <= IB_L[10].DB_MAX_OUTPUT_PORT_TYPE
IB_L[9] <= IB_L[9].DB_MAX_OUTPUT_PORT_TYPE
IB_L[8] <= IB_L[8].DB_MAX_OUTPUT_PORT_TYPE
IB_L[7] <= IB_L[7].DB_MAX_OUTPUT_PORT_TYPE
IB_L[6] <= IB_L[6].DB_MAX_OUTPUT_PORT_TYPE
IB_L[5] <= IB_L[5].DB_MAX_OUTPUT_PORT_TYPE
IB_L[4] <= IB_L[4].DB_MAX_OUTPUT_PORT_TYPE
IB_L[3] <= IB_L[3].DB_MAX_OUTPUT_PORT_TYPE
IB_L[2] <= IB_L[2].DB_MAX_OUTPUT_PORT_TYPE
IB_L[1] <= IB_L[1].DB_MAX_OUTPUT_PORT_TYPE
IB_L[0] <= IB_L[0].DB_MAX_OUTPUT_PORT_TYPE
INIT => WRITE.IN1
INIT => WRITE.OUTPUTSELECT
INIT => inth.IN1
INIT => inth.OUTPUTSELECT
INIT => EA[0]$latch.ACLR
INIT => EA[1]$latch.ACLR
INIT => EA[2]$latch.ACLR
INIT => IF[0].ACLR
INIT => IF[1].ACLR
INIT => IF[2].ACLR
INIT => ib[0].ACLR
INIT => ib[1].ACLR
INIT => ib[2].ACLR
INIT => DF[0].ACLR
INIT => DF[1].ACLR
INIT => sf[6].ACLR
INIT => sf[1].ACLR
INIT => sf[2].ACLR
INIT => sf[3].ACLR
INIT => sf[4].ACLR
INIT => sf[5].ACLR
INIT => DF[2].ACLR
INT_INH_L <= INT_INH_L.DB_MAX_OUTPUT_PORT_TYPE
IOP1 => cdf.IN0
IOP2 => cif.IN0
IOP4 => mmuctl.IN0
IRQ_L <= IRQ_L.DB_MAX_OUTPUT_PORT_TYPE
JMP_OR_JMS => comb.IN1
JMP_OR_JMS => comb.IN1
JMP_OR_JMS => IF[2].OUTPUTSELECT
JMP_OR_JMS => IF[1].OUTPUTSELECT
JMP_OR_JMS => IF[0].OUTPUTSELECT
JMP_OR_JMS => IF[0].IN1
KEY_CLR_L => always4.IN0
KEY_DF_L[2] => WideNor1.IN2
KEY_DF_L[1] => WideNor1.IN1
KEY_DF_L[0] => WideNor1.IN0
KEY_IF_L[2] => WideNor0.IN2
KEY_IF_L[1] => WideNor0.IN1
KEY_IF_L[0] => WideNor0.IN0
KEY_LOAD_L => always0.IN0
LOAD_SF_L => always6.IN0
MB[11] => ~NO_FANOUT~
MB[10] => ~NO_FANOUT~
MB[9] => ~NO_FANOUT~
MB[8] => rdf.IN1
MB[8] => rif.IN0
MB[8] => rib.IN1
MB[8] => DF[2].DATAB
MB[8] => ib[2].DATAB
MB[7] => rdf.IN0
MB[7] => rif.IN1
MB[7] => DF[1].DATAB
MB[7] => ib[1].DATAB
MB[6] => rif.IN0
MB[6] => rmf.IN0
MB[6] => DF[0].DATAB
MB[6] => ib[0].DATAB
MB[5] => ext_mem.IN0
MB[4] => ext_mem.IN1
MB[3] => ext_mem.IN0
MB[2] => ~NO_FANOUT~
MB[1] => ~NO_FANOUT~
MB[0] => ~NO_FANOUT~
MEMSTART => ~NO_FANOUT~
POWER_OK => ~NO_FANOUT~
SKIP_L <= SKIP_L.DB_MAX_OUTPUT_PORT_TYPE
SP_CYC_NEXT_L => comb.IN0
STOP_OK => ~NO_FANOUT~
TP2 => WRITE.IN1
TP2 => WRITE.DATAA
TP3 => load_inh.IN1


