// This file is generated by topld.pl 
// Please don't edit it. 
// Input Pins 
// Output Pins 
module rx8i (bac00, bac01, bac02, bac03, bac04, bac05, bac06, bac07, bac08, bac09, bac10, bac11, biop1, biop2, biop4, bmb00, bmb01, bmb02, bmb09, bmb10, bmb11, bts3, n_t_1x, n_t_5x, n_t_6x, rx_done_low, rx_error_low, rx_out_low, rx_shift_low, rx_tr_req_low, ac00l, ac01l, ac02l, ac03l, ac04l, ac05l, ac06l, ac07l, ac08l, ac09l, ac10l, ac11l, baclr, birq, bskip, initialize, md03_low, md04_low, md05_low, md06_low, md07_low, md08_low, n_t_7x, n_t_8x, n_t_9x, rx_12_bit_low, rx_data_low, rx_init_low, rx_run_low, tp4);
input bac00;
input bac01;
input bac02;
input bac03;
input bac04;
input bac05;
input bac06;
input bac07;
input bac08;
input bac09;
input bac10;
input bac11;
input biop1;
input biop2;
input biop4;
input bmb00;
input bmb01;
input bmb02;
input bmb09;
input bmb10;
input bmb11;
input bts3;
input n_t_1x;
input n_t_5x;
input n_t_6x;
input rx_done_low;
input rx_error_low;
input rx_out_low;
input rx_shift_low;
input rx_tr_req_low;
inout ac00l;
inout ac01l;
inout ac02l;
inout ac03l;
inout ac04l;
inout ac05l;
inout ac06l;
inout ac07l;
inout ac08l;
inout ac09l;
inout ac10l;
inout ac11l;
output baclr;
output birq;
output bskip;
input initialize;
input md03_low;
input md04_low;
input md05_low;
input md06_low;
input md07_low;
input md08_low;
output n_t_7x;
output n_t_8x;
output n_t_9x;
output rx_12_bit_low;
inout rx_data_low;
output rx_init_low;
output rx_run_low;
input tp4;

reg eight_m;
reg gdollar_0_m;
reg gdollar_1_m;
reg gdollar_2_m;
reg gdollar_3_m;
reg io_pause_low_m;
reg maint_m;
reg msb12_m;
reg msb8_m;
reg n_t_2x_m;
reg n_t_31x_m;
reg n_t_33x_m;
reg n_t_45x_m;
reg n_t_59x_m;
reg n_t_60x_m;
reg n_t_61x_m;
reg n_t_62x_m;
reg n_t_63x_m;
reg n_t_64x_m;
reg n_t_65x_m;
reg n_t_66x_m;
reg n_t_67x_m;
reg n_t_68x_m;
reg n_t_69x_m;
reg n_t_70x_m;
reg n_t_72x_m;
reg n_t_76x_m;
reg parity_low_m;
reg run_m;

reg eight;
reg maint;
reg gdollar_0;
reg gdollar_1;
reg gdollar_2;
reg gdollar_3;
reg n_t_45x;
reg n_t_60x;
reg n_t_2x;
reg n_t_33x;
reg msb12;
reg n_t_76x;
reg run;
reg n_t_64x;
reg n_t_63x;
reg n_t_62x;
reg msb8;
reg n_t_68x;
reg n_t_69x;
reg n_t_61x;
reg n_t_70x;
reg parity_low;
reg n_t_59x;
reg n_t_72x;
reg n_t_65x;
reg n_t_67x;
reg n_t_66x;
reg n_t_31x;
reg io_pause_low;
// Internal nodes 
wire b;
wire c0_low;
wire c1_low;
wire clk_parity_low;
wire data0;
wire data0_low;
wire data1;
wire data10;
wire data10_low;
wire data11;
wire data11_low;
wire data1_low;
wire data2;
wire data2_low;
wire data3;
wire data3_low;
wire data4;
wire data4_low;
wire data5;
wire data5_low;
wire data6;
wire data6_low;
wire data7;
wire data7_low;
wire data8;
wire data8_low;
wire data9;
wire data9_low;
wire done;
wire done_skip_low;
wire enb_buf_ld_low;
wire err_skip_low;
wire error;
wire init;
wire init_iot_low;
wire int_rqst_low;
wire internal_io_low;
wire intr_iot_low;
wire iot;
wire lcd_iot_low;
wire n_t_12x;
wire n_t_21x;
wire n_t_32x;
wire n_t_34x;
wire n_t_35x;
wire n_t_36x;
wire n_t_38x;
wire n_t_39x;
wire n_t_3x;
wire n_t_40x;
wire n_t_41x;
wire n_t_42x;
wire n_t_46x;
wire n_t_48x;
wire n_t_49x;
wire n_t_4x;
wire n_t_51x;
wire n_t_52x;
wire n_t_53x;
wire n_t_54x;
wire n_t_55x;
wire n_t_56x;
wire n_t_57x;
wire n_t_58x;
wire n_t_71x;
wire n_t_78x;
wire n_t_79x;
wire n_t_80x;
wire n_t_81x;
wire n_t_82x;
wire n_t_83x;
wire n_t_84x;
wire n_t_85x;
wire parity;
wire powerok;
wire rd;
wire rx_data;
wire sdn_iot_low;
wire ser_iot_low;
wire shift;
wire skip_low;
wire str_iot_low;
wire strobe;
wire tr_skip_low;
wire xfer_iot_low;
wire xfer_req;
// Code nodes 
// Equations 
// a27: m916 
// b27: m916 
// c1: c_us 
// c2: c_us 
// c3: c_us 
// c4: c_us 
// c5: c_us 
// c6: c_us 
// c7: c_us 
// c8: c_us 
// c9: c_us 
// c10: c_us 
// c11: c_us 
// c12: c_us 
// c13: c_us 
// c14: c_us 
// c15: c_us 
// c16: c_us 
// c17: c_us 
// c18: c_us 
// c19: c_us 
// c20: c_us 
// c21: c_us 
// c22: c_us 
// c23: c_us 
// c24: c_us 
// c25: c_us 
// c26: c_us 
// c27: m916 
// c27a: c_us 
// c28: c_us 
// c29: c_us 
// c30: c_us 
// c31: c_us 
// c32: c_us 
// c33: c_us 
// c34: c_us 
// c35: c_us 
// c36: c_us 
// c37: c_us 
// c38: c_us 
// c39: c_us 
// c40: c_us 
// c41: c_us 
// c42: cpol_use 
// c43: cpol_use 
// c44: cpol_use 
// c45: cpol_use 
// d27: m916 
// e1: ds8837n 
assign data5 = ~data5_low & ~internal_io_low;
assign data4 = ~data4_low & ~internal_io_low;
assign data3 = ~data3_low & ~internal_io_low;
assign data2 = ~data2_low & ~internal_io_low;
assign data1 = ~data1_low & ~internal_io_low;
assign data0 = ~data0_low & ~internal_io_low;
// e2: sn7474 
always @(n_t_48x, init, data5)
  if (init) begin
    eight_m <= 1'b0;
  end else
  if (~(n_t_48x)) begin
    eight_m <= data5;
  end
always @(n_t_48x, init, eight_m)
  if (init) begin
    eight <= 1'b0;
  end else
  if (n_t_48x) begin
    eight <= eight_m;
  end
always @(n_t_48x, init, data4)
  if (init) begin
    maint_m <= 1'b0;
  end else
  if (~(n_t_48x)) begin
    maint_m <= data4;
  end
always @(n_t_48x, init, maint_m)
  if (init) begin
    maint <= 1'b0;
  end else
  if (n_t_48x) begin
    maint <= maint_m;
  end
// e3: sn7410 
assign n_t_38x = ~(~eight & msb12 & ~parity);
assign n_t_39x = ~(~parity & eight & msb8);
assign n_t_42x = ~n_t_39x & n_t_40x & n_t_38x;
// e4: sn74161 
always @(clk_parity_low, init, enb_buf_ld_low, gdollar_0)
  if (init) begin
    gdollar_0_m <= 1'b0;
  end else
  if (~(clk_parity_low)) begin
    gdollar_0_m <= (~(~enb_buf_ld_low)? ~gdollar_0: 1'b1);
  end
always @(clk_parity_low, init, gdollar_0_m)
  if (init) begin
    gdollar_0 <= 1'b0;
  end else
  if (clk_parity_low) begin
    gdollar_0 <= gdollar_0_m;
  end
always @(clk_parity_low, init, gdollar_0, enb_buf_ld_low, enb_buf_ld_low, gdollar_0, enb_buf_ld_low, gdollar_1)
  if (init) begin
    gdollar_1_m <= 1'b0;
  end else
  if (~(clk_parity_low)) begin
    gdollar_1_m <= (gdollar_0
                              | ~enb_buf_ld_low)? (~(~enb_buf_ld_low) & (gdollar_0
                                            | ~enb_buf_ld_low)? ~gdollar_1: 1'b1) : (~(~enb_buf_ld_low) & (gdollar_0
                                            | ~enb_buf_ld_low)? 1'b0: gdollar_1);
  end
always @(clk_parity_low, init, gdollar_1_m)
  if (init) begin
    gdollar_1 <= 1'b0;
  end else
  if (clk_parity_low) begin
    gdollar_1 <= gdollar_1_m;
  end
always @(clk_parity_low, init, n_t_21x, enb_buf_ld_low, gdollar_0, gdollar_1, enb_buf_ld_low, n_t_21x, enb_buf_ld_low, gdollar_0, gdollar_1, enb_buf_ld_low, gdollar_2)
  if (init) begin
    gdollar_2_m <= 1'b0;
  end else
  if (~(clk_parity_low)) begin
    gdollar_2_m <= ~(~n_t_21x & ~enb_buf_ld_low) & (gdollar_0 & gdollar_1
                                                       | ~enb_buf_ld_low)? (~(n_t_21x & ~enb_buf_ld_low) & (gdollar_0 & gdollar_1
                                                      | ~enb_buf_ld_low)? ~gdollar_2: 1'b1) : (~(n_t_21x & ~enb_buf_ld_low) & (gdollar_0 & gdollar_1
                                                      | ~enb_buf_ld_low)? 1'b0: gdollar_2);
  end
always @(clk_parity_low, init, gdollar_2_m)
  if (init) begin
    gdollar_2 <= 1'b0;
  end else
  if (clk_parity_low) begin
    gdollar_2 <= gdollar_2_m;
  end
always @(clk_parity_low, init, enb_buf_ld_low, gdollar_0, gdollar_1, gdollar_2, enb_buf_ld_low, gdollar_0, gdollar_1, gdollar_2, enb_buf_ld_low, gdollar_3)
  if (init) begin
    gdollar_3_m <= 1'b0;
  end else
  if (~(clk_parity_low)) begin
    gdollar_3_m <= ~(~enb_buf_ld_low) & (gdollar_0 & gdollar_1 & gdollar_2
                                            | ~enb_buf_ld_low)? ((gdollar_0 & gdollar_1 & gdollar_2
                       | ~enb_buf_ld_low)? ~gdollar_3: 1'b1) : ((gdollar_0 & gdollar_1 & gdollar_2
                       | ~enb_buf_ld_low)? 1'b0: gdollar_3);
  end
always @(clk_parity_low, init, gdollar_3_m)
  if (init) begin
    gdollar_3 <= 1'b0;
  end else
  if (clk_parity_low) begin
    gdollar_3 <= gdollar_3_m;
  end
assign parity = gdollar_3 & gdollar_2 & gdollar_1 & gdollar_0;
// e5: ds8881n 
// data0_low = !(n_t_12x & msb12); 
// data1_low = !(n_t_12x & n_t_33x); 
// data2_low = !(n_t_12x & n_t_2x); 
// data3_low = !(n_t_12x & n_t_60x); 
// e6: sn7402 
assign n_t_48x = ~strobe
                    | lcd_iot_low;
assign n_t_71x = ~strobe
                    | intr_iot_low;
assign n_t_46x = ~run
                    | init;
// e7: sn7474 
always @(strobe, tp4, init_iot_low)
  if (tp4) begin
    n_t_45x_m <= 1'b1;
  end else
  if (~(~strobe)) begin
    n_t_45x_m <= init_iot_low;
  end
always @(strobe, tp4, n_t_45x_m)
  if (tp4) begin
    n_t_45x <= 1'b1;
  end else
  if (~strobe) begin
    n_t_45x <= n_t_45x_m;
  end
// e8: sn7404 
// e9: sn74179 
always @(clk_parity_low, init, msb8, enb_buf_ld_low, data3, enb_buf_ld_low, b, n_t_60x, enb_buf_ld_low, b)
  if (init) begin
    n_t_60x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_60x_m <= msb8 & enb_buf_ld_low
                    | data3 & ~enb_buf_ld_low & b
                    | n_t_60x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_60x_m)
  if (init) begin
    n_t_60x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_60x <= n_t_60x_m;
  end
always @(clk_parity_low, init, n_t_60x, enb_buf_ld_low, data2, enb_buf_ld_low, b, n_t_2x, enb_buf_ld_low, b)
  if (init) begin
    n_t_2x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_2x_m <= n_t_60x & enb_buf_ld_low
                   | data2 & ~enb_buf_ld_low & b
                   | n_t_2x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_2x_m)
  if (init) begin
    n_t_2x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_2x <= n_t_2x_m;
  end
always @(clk_parity_low, init, n_t_2x, enb_buf_ld_low, data1, enb_buf_ld_low, b, n_t_33x, enb_buf_ld_low, b)
  if (init) begin
    n_t_33x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_33x_m <= n_t_2x & enb_buf_ld_low
                    | data1 & ~enb_buf_ld_low & b
                    | n_t_33x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_33x_m)
  if (init) begin
    n_t_33x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_33x <= n_t_33x_m;
  end
always @(clk_parity_low, init, n_t_33x, enb_buf_ld_low, data0, enb_buf_ld_low, b, msb12, enb_buf_ld_low, b)
  if (init) begin
    msb12_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    msb12_m <= n_t_33x & enb_buf_ld_low
                  | data0 & ~enb_buf_ld_low & b
                  | msb12 & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, msb12_m)
  if (init) begin
    msb12 <= 1'b0;
  end else
  if (~clk_parity_low) begin
    msb12 <= msb12_m;
  end
// e10: sn7410 
assign n_t_32x = ~(~xfer_iot_low & n_t_34x & ~eight);
assign n_t_34x = ~(~maint & ~done & ~rd);
assign skip_low = ~(~tr_skip_low & err_skip_low & done_skip_low);
// e11: ds8640n 
// e12: sn7400 
assign n_t_21x = ~n_t_35x & n_t_36x;
assign c0_low = ~(~lcd_iot_low & n_t_32x);
assign n_t_36x = ~(data5 & ~lcd_iot_low);
assign n_t_35x = ~(~xfer_iot_low & eight);
// e14: ds8881n 
// c0_low = c0_low; 
// rx_data_low = !(!rd & n_t_42x); 
// rx_12_bit_low = eight; 
// c1_low = !(!eight & n_t_34x); 
// e15: sn7474 
always @(n_t_71x, init, data11)
  if (init) begin
    n_t_76x_m <= 1'b0;
  end else
  if (~(n_t_71x)) begin
    n_t_76x_m <= data11;
  end
always @(n_t_71x, init, n_t_76x_m)
  if (init) begin
    n_t_76x <= 1'b0;
  end else
  if (n_t_71x) begin
    n_t_76x <= n_t_76x_m;
  end
always @(n_t_85x, n_t_83x, 1'b1)
  if (~n_t_83x) begin
    run_m <= 1'b0;
  end else
  if (~(n_t_85x)) begin
    run_m <= 1'b1;
  end
always @(n_t_85x, n_t_83x, run_m)
  if (~n_t_83x) begin
    run <= 1'b0;
  end else
  if (n_t_85x) begin
    run <= run_m;
  end
// e16: sn7408 
assign n_t_12x = (~eight & n_t_3x);
assign n_t_79x = xfer_iot_low & lcd_iot_low;
assign n_t_83x = (n_t_81x & ~init);
assign enb_buf_ld_low = (~maint & n_t_82x);
// e17: ds8881n 
// data4_low = !(n_t_3x & msb8); 
// data5_low = !(n_t_3x & n_t_62x); 
// data6_low = !(n_t_3x & n_t_63x); 
// data7_low = !(n_t_3x & n_t_64x); 
// e18: ds8881n 
// internal_io_low = internal_io_low; 
// int_rqst_low = !(n_t_76x & n_t_69x); 
// skip_low = skip_low; 
// rx_run_low = !run; 
// e19: sn7402 
assign clk_parity_low = ~n_t_84x
                           | shift;
assign n_t_54x = ~n_t_49x
                    | init;
assign n_t_49x = ~strobe
                    | done_skip_low;
assign n_t_3x = ~n_t_4x
                   | xfer_iot_low;
// e20: sn7427 
assign n_t_84x = ~strobe
                    | n_t_79x
                    | enb_buf_ld_low;
assign n_t_4x = ~maint
                   | rd
                   | done;
// e21: sn74179 
always @(clk_parity_low, init, n_t_31x, enb_buf_ld_low, data7, enb_buf_ld_low, b, n_t_64x, enb_buf_ld_low, b)
  if (init) begin
    n_t_64x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_64x_m <= n_t_31x & enb_buf_ld_low
                    | data7 & ~enb_buf_ld_low & b
                    | n_t_64x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_64x_m)
  if (init) begin
    n_t_64x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_64x <= n_t_64x_m;
  end
always @(clk_parity_low, init, n_t_64x, enb_buf_ld_low, data6, enb_buf_ld_low, b, n_t_63x, enb_buf_ld_low, b)
  if (init) begin
    n_t_63x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_63x_m <= n_t_64x & enb_buf_ld_low
                    | data6 & ~enb_buf_ld_low & b
                    | n_t_63x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_63x_m)
  if (init) begin
    n_t_63x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_63x <= n_t_63x_m;
  end
always @(clk_parity_low, init, n_t_63x, enb_buf_ld_low, data5, enb_buf_ld_low, b, n_t_62x, enb_buf_ld_low, b)
  if (init) begin
    n_t_62x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_62x_m <= n_t_63x & enb_buf_ld_low
                    | data5 & ~enb_buf_ld_low & b
                    | n_t_62x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_62x_m)
  if (init) begin
    n_t_62x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_62x <= n_t_62x_m;
  end
always @(clk_parity_low, init, n_t_62x, enb_buf_ld_low, data4, enb_buf_ld_low, b, msb8, enb_buf_ld_low, b)
  if (init) begin
    msb8_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    msb8_m <= n_t_62x & enb_buf_ld_low
                 | data4 & ~enb_buf_ld_low & b
                 | msb8 & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, msb8_m)
  if (init) begin
    msb8 <= 1'b0;
  end else
  if (~clk_parity_low) begin
    msb8 <= msb8_m;
  end
// e22: sn7474 
always @(done, n_t_54x, maint, b)
  if (~n_t_54x) begin
    n_t_68x_m <= 1'b0;
  end else
  if (maint) begin
    n_t_68x_m <= 1'b1;
  end else
  if (~(done)) begin
    n_t_68x_m <= b;
  end
always @(done, n_t_54x, maint, n_t_68x_m)
  if (~n_t_54x) begin
    n_t_68x <= 1'b0;
  end else
  if (maint) begin
    n_t_68x <= 1'b1;
  end else
  if (done) begin
    n_t_68x <= n_t_68x_m;
  end
always @(tp4, init, b, n_t_68x)
  if (init) begin
    n_t_69x_m <= 1'b0;
  end else
  if (~b) begin
    n_t_69x_m <= 1'b1;
  end else
  if (~(tp4)) begin
    n_t_69x_m <= n_t_68x;
  end
always @(tp4, init, b, n_t_69x_m)
  if (init) begin
    n_t_69x <= 1'b0;
  end else
  if (~b) begin
    n_t_69x <= 1'b1;
  end else
  if (tp4) begin
    n_t_69x <= n_t_69x_m;
  end
// e23: sn7402 
assign n_t_58x = ~n_t_57x
                    | init;
assign n_t_55x = ~n_t_56x
                    | init;
assign n_t_56x = ~strobe
                    | err_skip_low;
assign n_t_57x = ~strobe
                    | tr_skip_low;
// e24: sn7400 
assign init = ~(~initialize & n_t_45x);
assign n_t_85x = ~n_t_80x & n_t_78x;
assign n_t_82x = ~(n_t_81x & ~rd);
assign n_t_40x = ~parity_low & parity;
// e25: ds8837n 
assign data11 = ~data11_low & ~internal_io_low;
assign data10 = ~data10_low & ~internal_io_low;
assign data9 = ~data9_low & ~internal_io_low;
assign data8 = ~data8_low & ~internal_io_low;
assign data7 = ~data7_low & ~internal_io_low;
assign data6 = ~data6_low & ~internal_io_low;
// e26: sn7474 
always @(error, n_t_55x, maint, b)
  if (~n_t_55x) begin
    n_t_61x_m <= 1'b0;
  end else
  if (maint) begin
    n_t_61x_m <= 1'b1;
  end else
  if (~(error)) begin
    n_t_61x_m <= b;
  end
always @(error, n_t_55x, maint, n_t_61x_m)
  if (~n_t_55x) begin
    n_t_61x <= 1'b0;
  end else
  if (maint) begin
    n_t_61x <= 1'b1;
  end else
  if (error) begin
    n_t_61x <= n_t_61x_m;
  end
always @(tp4, init, b, n_t_61x)
  if (init) begin
    n_t_70x_m <= 1'b0;
  end else
  if (~b) begin
    n_t_70x_m <= 1'b1;
  end else
  if (~(tp4)) begin
    n_t_70x_m <= n_t_61x;
  end
always @(tp4, init, b, n_t_70x_m)
  if (init) begin
    n_t_70x <= 1'b0;
  end else
  if (~b) begin
    n_t_70x <= 1'b1;
  end else
  if (tp4) begin
    n_t_70x <= n_t_70x_m;
  end
// e27: sn7476 
always @(clk_parity_low, b, n_t_46x, n_t_42x, n_t_42x, parity_low)
  if (~b) begin
    parity_low_m <= 1'b0;
  end else
  if (~n_t_46x) begin
    parity_low_m <= 1'b1;
  end else
  if (~(clk_parity_low)) begin
    parity_low_m <= n_t_42x? (n_t_42x? ~parity_low: 1'b1) : (n_t_42x? 1'b0: parity_low);
  end
always @(clk_parity_low, b, n_t_46x, parity_low_m)
  if (~b) begin
    parity_low <= 1'b0;
  end else
  if (~n_t_46x) begin
    parity_low <= 1'b1;
  end else
  if (clk_parity_low) begin
    parity_low <= parity_low_m;
  end
// e28: sn7420 
assign n_t_78x = ~(~maint & ~strobe & ~lcd_iot_low & done);
assign n_t_80x = ~(~xfer_iot_low & ~done & ~maint & ~strobe);
// e29: ds8881n 
// data8_low = !(n_t_3x & n_t_31x); 
// data9_low = !(n_t_3x & n_t_66x); 
// data10_low = !(n_t_3x & n_t_67x); 
// data11_low = !(n_t_3x & n_t_65x); 
// e30: sn7474 
always @(xfer_req, n_t_58x, maint, b)
  if (~n_t_58x) begin
    n_t_59x_m <= 1'b0;
  end else
  if (maint) begin
    n_t_59x_m <= 1'b1;
  end else
  if (~(xfer_req)) begin
    n_t_59x_m <= b;
  end
always @(xfer_req, n_t_58x, maint, n_t_59x_m)
  if (~n_t_58x) begin
    n_t_59x <= 1'b0;
  end else
  if (maint) begin
    n_t_59x <= 1'b1;
  end else
  if (xfer_req) begin
    n_t_59x <= n_t_59x_m;
  end
always @(tp4, init, b, n_t_59x)
  if (init) begin
    n_t_72x_m <= 1'b0;
  end else
  if (~b) begin
    n_t_72x_m <= 1'b1;
  end else
  if (~(tp4)) begin
    n_t_72x_m <= n_t_59x;
  end
always @(tp4, init, b, n_t_72x_m)
  if (init) begin
    n_t_72x <= 1'b0;
  end else
  if (~b) begin
    n_t_72x <= 1'b1;
  end else
  if (tp4) begin
    n_t_72x <= n_t_72x_m;
  end
// e32: sn7404 
// e33: sn74179 
always @(clk_parity_low, init, rx_data, enb_buf_ld_low, data11, enb_buf_ld_low, b, n_t_65x, enb_buf_ld_low, b)
  if (init) begin
    n_t_65x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_65x_m <= rx_data & enb_buf_ld_low
                    | data11 & ~enb_buf_ld_low & b
                    | n_t_65x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_65x_m)
  if (init) begin
    n_t_65x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_65x <= n_t_65x_m;
  end
always @(clk_parity_low, init, n_t_65x, enb_buf_ld_low, data10, enb_buf_ld_low, b, n_t_67x, enb_buf_ld_low, b)
  if (init) begin
    n_t_67x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_67x_m <= n_t_65x & enb_buf_ld_low
                    | data10 & ~enb_buf_ld_low & b
                    | n_t_67x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_67x_m)
  if (init) begin
    n_t_67x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_67x <= n_t_67x_m;
  end
always @(clk_parity_low, init, n_t_67x, enb_buf_ld_low, data9, enb_buf_ld_low, b, n_t_66x, enb_buf_ld_low, b)
  if (init) begin
    n_t_66x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_66x_m <= n_t_67x & enb_buf_ld_low
                    | data9 & ~enb_buf_ld_low & b
                    | n_t_66x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_66x_m)
  if (init) begin
    n_t_66x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_66x <= n_t_66x_m;
  end
always @(clk_parity_low, init, n_t_66x, enb_buf_ld_low, data8, enb_buf_ld_low, b, n_t_31x, enb_buf_ld_low, b)
  if (init) begin
    n_t_31x_m <= 1'b0;
  end else
  if (~(~clk_parity_low)) begin
    n_t_31x_m <= n_t_66x & enb_buf_ld_low
                    | data8 & ~enb_buf_ld_low & b
                    | n_t_31x & ~enb_buf_ld_low & ~b;
  end
always @(clk_parity_low, init, n_t_31x_m)
  if (init) begin
    n_t_31x <= 1'b0;
  end else
  if (~clk_parity_low) begin
    n_t_31x <= n_t_31x_m;
  end
// e34: sn7400 
assign err_skip_low = ~(n_t_70x & ~ser_iot_low);
assign tr_skip_low = ~(~str_iot_low & n_t_72x);
assign done_skip_low = ~(~sdn_iot_low & n_t_69x);
// e35: sp314n 
assign internal_io_low = md03_low
                          | md05_low
                          | md04_low
                          | io_pause_low
                          | n_t_1x
                          | n_t_5x
                          | n_t_6x;
// e36: ds8837n 
assign error = ~rx_error_low & ~maint;
assign xfer_req = ~rx_tr_req_low & ~maint;
assign done = ~rx_done_low & ~maint;
assign rx_data = ~rx_data_low & ~maint;
assign shift = ~rx_shift_low & ~maint;
assign rd = ~rx_out_low & ~maint;
// e37: ds8881n 
// rx_init_low = !init; 
// e38: sn7404 
// e39: sp384n 
assign n_t_81x = done
                  | xfer_req;
// e40: ds8837n 
assign n_t_9x = ~md06_low & ~io_pause_low;
assign n_t_8x = ~md07_low & ~io_pause_low;
assign n_t_7x = ~md08_low & ~io_pause_low;
assign n_t_53x = bmb11 & ~internal_io_low;
assign n_t_52x = bmb10 & ~internal_io_low;
assign n_t_51x = bmb09 & ~internal_io_low;
// e41: sn7442 
assign lcd_iot_low = ~(~internal_io_low & ~n_t_51x & ~n_t_52x & n_t_53x);
assign xfer_iot_low = ~(~internal_io_low & ~n_t_51x & n_t_52x & ~n_t_53x);
assign str_iot_low = ~(~internal_io_low & ~n_t_51x & n_t_52x & n_t_53x);
assign ser_iot_low = ~(~internal_io_low & n_t_51x & ~n_t_52x & ~n_t_53x);
assign sdn_iot_low = ~(~internal_io_low & n_t_51x & ~n_t_52x & n_t_53x);
assign intr_iot_low = ~(~internal_io_low & n_t_51x & n_t_52x & ~n_t_53x);
assign init_iot_low = ~(~internal_io_low & n_t_51x & n_t_52x & n_t_53x);
// e42: sn7438 
// data0_low = !(bac00 & c1_low); 
// data1_low = !(bac01 & c1_low); 
// data2_low = !(bac02 & c1_low); 
// data3_low = !(bac03 & c1_low); 
// e43: sn7438 
// data4_low = !(bac04 & c1_low); 
// data5_low = !(bac05 & c1_low); 
// data6_low = !(bac06 & c1_low); 
// data7_low = !(bac07 & c1_low); 
// e44: sn7438 
// data8_low = !(bac08 & c1_low); 
// data9_low = !(bac09 & c1_low); 
// data10_low = !(bac10 & c1_low); 
// data11_low = !(bac11 & c1_low); 
// ic1: sn7404 
// ic2: sn7407 
// bskip = !(!skip_low); 
// birq = !(!int_rqst_low); 
// ic3: sn7474 
always @(bts3, strobe, iot)
  if (~strobe) begin
    io_pause_low_m <= 1'b1;
  end else
  if (~(~bts3)) begin
    io_pause_low_m <= ~iot;
  end
always @(bts3, strobe, io_pause_low_m)
  if (~strobe) begin
    io_pause_low <= 1'b1;
  end else
  if (~bts3) begin
    io_pause_low <= io_pause_low_m;
  end
// ic4: sn7400 
assign iot = ~n_t_41x & bmb02;
assign baclr = ~(~io_pause_low & ~c0_low);
assign n_t_41x = ~bmb00 & bmb01;
// ic5: sn7402 
// ic6: sn7402 
// ic7: sn7406 
// ac06l = ac06l; 
// ac07l = ac07l; 
// ac08l = ac08l; 
// ac09l = ac09l; 
// ac10l = ac10l; 
// ac11l = ac11l; 
// ic8: sn7402 
// ic9: sn7427 
assign strobe = ~biop1
                   | biop2
                   | biop4;
// ic10: sn7406 
// ac00l = ac00l; 
// ac01l = ac01l; 
// ac02l = ac02l; 
// ac03l = ac03l; 
// ac04l = ac04l; 
// ac05l = ac05l; 
// ic19: sn7404 
// r1: r_us_ 
// r2: r_us_ 
// r3: r_us_ 
// r4: r_us_ 
// r5: r_us_ 
// r6: r_us_ 
// r7: r_us_ 
// r8: r_us_ 
// r9: r_us_ 
// r10: r_us_ 
// r11: r_us_ 
// r12: r_us_ 
// r13: r_us_ 
// r14: r_us_ 
// r15: r_us_ 
// r16: r_us_ 
// r17: r_us_ 
// r18: r_us_ 
// r19: r_us_ 
// r20: r_us_ 
assign b = 1'b1;
// r25: r_us_ 
// r26: r_us_ 
// r27: r_us_ 
// r28: r_us_ 
// r29: r_us_ 
// r30: r_us_ 
// r31: r_us_ 
// r32: r_us_ 
// r33: r_us_ 
// r34: r_us_ 
// r35: r_us_ 
// r36: r_us_ 
// r37: r_us_ 
// r38: r_us_ 
// r39: r_us_ 
// r40: r_us_ 
// u$2: quad 
// Open collector 'wire-or's 
assign ac00l = ~(~(~data0_low
                    | c1_low))? ~(~data0_low
                    | c1_low): 1'bz;
assign ac01l = ~(~(~data1_low
                    | c1_low))? ~(~data1_low
                    | c1_low): 1'bz;
assign ac02l = ~(~(~data2_low
                    | c1_low))? ~(~data2_low
                    | c1_low): 1'bz;
assign ac03l = ~(~(~data3_low
                    | c1_low))? ~(~data3_low
                    | c1_low): 1'bz;
assign ac04l = ~(~(~data4_low
                    | c1_low))? ~(~data4_low
                    | c1_low): 1'bz;
assign ac05l = ~(~(~data5_low
                    | c1_low))? ~(~data5_low
                    | c1_low): 1'bz;
assign ac06l = ~(~(~c1_low
                    | data6_low))? ~(~c1_low
                    | data6_low): 1'bz;
assign ac07l = ~(~(~data7_low
                    | c1_low))? ~(~data7_low
                    | c1_low): 1'bz;
assign ac08l = ~(~(~c1_low
                    | data8_low))? ~(~c1_low
                    | data8_low): 1'bz;
assign ac09l = ~(~(~data9_low
                    | c1_low))? ~(~data9_low
                    | c1_low): 1'bz;
assign ac10l = ~(~(~c1_low
                    | data10_low))? ~(~c1_low
                    | data10_low): 1'bz;
assign ac11l = ~(~(~data11_low
                    | c1_low))? ~(~data11_low
                    | c1_low): 1'bz;
assign birq = (~int_rqst_low)? 1'b0: 1'bz;
assign bskip = (~skip_low)? 1'b0: 1'bz;
assign c1_low = ~((~eight & n_t_34x));
assign data0_low = ~n_t_12x & msb12
                      | bac00 & c1_low;
assign data10_low = ~n_t_3x & n_t_67x
                       | bac10 & c1_low;
assign data11_low = ~n_t_3x & n_t_65x
                       | bac11 & c1_low;
assign data1_low = ~n_t_12x & n_t_33x
                      | bac01 & c1_low;
assign data2_low = ~n_t_12x & n_t_2x
                      | bac02 & c1_low;
assign data3_low = ~n_t_12x & n_t_60x
                      | bac03 & c1_low;
assign data4_low = ~n_t_3x & msb8
                      | bac04 & c1_low;
assign data5_low = ~n_t_3x & n_t_62x
                      | bac05 & c1_low;
assign data6_low = ~n_t_3x & n_t_63x
                      | bac06 & c1_low;
assign data7_low = ~n_t_3x & n_t_64x
                      | bac07 & c1_low;
assign data8_low = ~n_t_3x & n_t_31x
                      | bac08 & c1_low;
assign data9_low = ~n_t_3x & n_t_66x
                      | bac09 & c1_low;
assign int_rqst_low = ~n_t_76x & n_t_69x;
assign rx_12_bit_low = ~eight? 1'b0: 1'bz;
assign rx_data_low = (~rd & n_t_42x)? 1'b0: 1'bz;
assign rx_init_low = init? ~init: 1'bz;
assign rx_run_low = run? ~run: 1'bz;
endmodule