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element14 CAD Library consolidation.ulp
at 30/07/2012 14:34:29</description>
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<deviceset name="74HC595DG" prefix="U">
<description>8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs</description>
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<gate name="A" symbol="74HC595DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="14"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="LATCH_CLOCK" pad="12"/>
<connect gate="A" pin="OUT_EN" pad="13"/>
<connect gate="A" pin="QA" pad="15"/>
<connect gate="A" pin="QB" pad="1"/>
<connect gate="A" pin="QC" pad="2"/>
<connect gate="A" pin="QD" pad="3"/>
<connect gate="A" pin="QE" pad="4"/>
<connect gate="A" pin="QF" pad="5"/>
<connect gate="A" pin="QG" pad="6"/>
<connect gate="A" pin="QH" pad="7"/>
<connect gate="A" pin="RESET" pad="10"/>
<connect gate="A" pin="SHIFT_CLOCK" pad="11"/>
<connect gate="A" pin="SQH" pad="9"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="74HC595DG" constant="no"/>
<attribute name="OC_FARNELL" value="1640047" constant="no"/>
<attribute name="OC_NEWARK" value="75M5727" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="A5191HRTLG-XTD" prefix="U">
<description>HART Modem</description>
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<gate name="A" symbol="A5191HRTLG-XTD" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="AREF" pad="8"/>
<connect gate="A" pin="CBIAS" pad="10"/>
<connect gate="A" pin="CD" pad="26"/>
<connect gate="A" pin="CDREF" pad="9"/>
<connect gate="A" pin="RST" pad="22"/>
<connect gate="A" pin="RXA" pad="14"/>
<connect gate="A" pin="RXAF" pad="15"/>
<connect gate="A" pin="RXAFI" pad="16"/>
<connect gate="A" pin="RXD" pad="25"/>
<connect gate="A" pin="TEST1" pad="28"/>
<connect gate="A" pin="TEST10" pad="11"/>
<connect gate="A" pin="TEST11" pad="24"/>
<connect gate="A" pin="TEST12" pad="27"/>
<connect gate="A" pin="TEST2" pad="29"/>
<connect gate="A" pin="TEST3" pad="30"/>
<connect gate="A" pin="TEST4" pad="32"/>
<connect gate="A" pin="TEST5" pad="1"/>
<connect gate="A" pin="TEST7" pad="3"/>
<connect gate="A" pin="TEST8" pad="4"/>
<connect gate="A" pin="TEST9" pad="5"/>
<connect gate="A" pin="TXA" pad="7"/>
<connect gate="A" pin="TXD" pad="23"/>
<connect gate="A" pin="VDD" pad="31"/>
<connect gate="A" pin="VDDA" pad="13"/>
<connect gate="A" pin="VDD_2" pad="21"/>
<connect gate="A" pin="VSS" pad="20"/>
<connect gate="A" pin="VSSA" pad="12"/>
<connect gate="A" pin="VSSA_2" pad="19"/>
<connect gate="A" pin="VSS_2" pad="6"/>
<connect gate="A" pin="XIN" pad="18"/>
<connect gate="A" pin="XOUT" pad="17"/>
<connect gate="A" pin="~RESET" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="A5191HRTLG-XTD" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="03P1166" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADM1024ARUZ" prefix="U">
<description>IC MONITOR SYS TEMP/VOLT</description>
<gates>
<gate name="A" symbol="ADM1024ARUZ" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-24N">
<connects>
<connect gate="A" pin="+12VIN" pad="15"/>
<connect gate="A" pin="+2.5VIN/D2+" pad="18"/>
<connect gate="A" pin="+5.0VIN" pad="16"/>
<connect gate="A" pin="+VCCP1" pad="19"/>
<connect gate="A" pin="CI" pad="7"/>
<connect gate="A" pin="D1+" pad="14"/>
<connect gate="A" pin="D1-" pad="13"/>
<connect gate="A" pin="FAN1/AIN1" pad="5"/>
<connect gate="A" pin="FAN2/AIN2" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="NTEST_IN/AOUT" pad="11"/>
<connect gate="A" pin="NTEST_OUT/ADD" pad="1"/>
<connect gate="A" pin="SCL" pad="4"/>
<connect gate="A" pin="SDA" pad="3"/>
<connect gate="A" pin="VCC" pad="9"/>
<connect gate="A" pin="VCCP2/D2-" pad="17"/>
<connect gate="A" pin="VID0/IRQ0" pad="24"/>
<connect gate="A" pin="VID1/IRQ1" pad="23"/>
<connect gate="A" pin="VID2/IRQ2" pad="22"/>
<connect gate="A" pin="VID3/IRQ3" pad="21"/>
<connect gate="A" pin="VID4/IRQ4" pad="20"/>
<connect gate="A" pin="~INT" pad="10"/>
<connect gate="A" pin="~RESET" pad="12"/>
<connect gate="A" pin="~THERM" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADM1024ARUZ" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="19M8680" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-24" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADM1032ARMZ" prefix="U">
<description>+- 1C Remote and Local System Temperature Monitor</description>
<gates>
<gate name="A" symbol="ADM1032ARMZ" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D+" pad="2"/>
<connect gate="A" pin="D-" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="SCLK" pad="8"/>
<connect gate="A" pin="SDATA" pad="7"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="~ALERT" pad="6"/>
<connect gate="A" pin="~THERM" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADM1032ARMZ" constant="no"/>
<attribute name="OC_FARNELL" value="1424368" constant="no"/>
<attribute name="OC_NEWARK" value="82H2751" constant="no"/>
<attribute name="PACKAGE" value="MSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADM1032ARZ" prefix="U">
<description>+- 1C Remote and Local System Temperature Monitor</description>
<gates>
<gate name="A" symbol="ADM1032ARZ" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D+" pad="2"/>
<connect gate="A" pin="D-" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="SCLK" pad="8"/>
<connect gate="A" pin="SDATA" pad="7"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="~ALERT" pad="6"/>
<connect gate="A" pin="~THERM" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADM1032ARMZ" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="59K1789" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADT7461ARMZ" prefix="U">
<description>Temperature Monitor</description>
<gates>
<gate name="A" symbol="ADT7461ARMZ" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D+" pad="2"/>
<connect gate="A" pin="D-" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="SCLK" pad="8"/>
<connect gate="A" pin="SDATA" pad="7"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="~ALERT/~THERM2" pad="6"/>
<connect gate="A" pin="~THERM" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADT7461ARMZ" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="19M8743" constant="no"/>
<attribute name="PACKAGE" value="MSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADT7462ACPZ-5RL7" prefix="U">
<description>Flexible Temperature Voltage Monitor, and  System Fan Controller</description>
<gates>
<gate name="A" symbol="ADT7462ACPZ-5RL7" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFN50P500X500X100-32N">
<connects>
<connect gate="A" pin="ADD" pad="11"/>
<connect gate="A" pin="D1+/+2.5V/+1.8V_15" pad="15"/>
<connect gate="A" pin="D1-/SCSI_TERM1" pad="16"/>
<connect gate="A" pin="D2+" pad="17"/>
<connect gate="A" pin="D2-" pad="18"/>
<connect gate="A" pin="D3+/+1.25V/+0.9V" pad="19"/>
<connect gate="A" pin="D3-/SCSI_TERM2" pad="20"/>
<connect gate="A" pin="EPAD" pad="33"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="PWM3" pad="30"/>
<connect gate="A" pin="PWM4/+3.3V" pad="13"/>
<connect gate="A" pin="SCL" pad="9"/>
<connect gate="A" pin="SDA" pad="10"/>
<connect gate="A" pin="TACH5/+12V1" pad="7"/>
<connect gate="A" pin="TACH6/+12V2" pad="8"/>
<connect gate="A" pin="TACH7/+5V" pad="21"/>
<connect gate="A" pin="TACH8/+12V3" pad="22"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="VCCP1/+1.5V/+1.8V/+2.5V" pad="23"/>
<connect gate="A" pin="VCCP2/+1.5V/+1.8V/+2.5V" pad="24"/>
<connect gate="A" pin="VID0/GPIO1/TACH1" pad="1"/>
<connect gate="A" pin="VID1/GPIO2/TACH2" pad="2"/>
<connect gate="A" pin="VID2/GPIO3/TACH3" pad="3"/>
<connect gate="A" pin="VID3/GPIO4/TACH4" pad="4"/>
<connect gate="A" pin="VID4/GPIO5/PWM1" pad="31"/>
<connect gate="A" pin="VID5/GPIO6/PWM2" pad="32"/>
<connect gate="A" pin="VR_HOT1/+1.2V1/+3.3V" pad="25"/>
<connect gate="A" pin="VR_HOT2/+1.2V2/V_BATT" pad="26"/>
<connect gate="A" pin="~ALERT" pad="12"/>
<connect gate="A" pin="~FAN2MAX/CI" pad="27"/>
<connect gate="A" pin="~RESET" pad="14"/>
<connect gate="A" pin="~THERM1/+1.5V1/GPIO7/VID6" pad="28"/>
<connect gate="A" pin="~THERM2/+1.5V2/GPIO8" pad="29"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADT7462ACPZ-5RL7" constant="no"/>
<attribute name="OC_FARNELL" value="1736459" constant="no"/>
<attribute name="OC_NEWARK" value="05R5110" constant="no"/>
<attribute name="PACKAGE" value="QFN-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADT7463ARQZ" prefix="U">
<description>Remote Thermal Controller</description>
<gates>
<gate name="A" symbol="ADT7463ARQZ" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP63P600X175-24N">
<connects>
<connect gate="A" pin="+12VIN/VID5" pad="21"/>
<connect gate="A" pin="+2.5VIN/~SMBALERT" pad="22"/>
<connect gate="A" pin="+5VIN/~THERM" pad="20"/>
<connect gate="A" pin="D1+" pad="18"/>
<connect gate="A" pin="D1-" pad="17"/>
<connect gate="A" pin="D2+" pad="16"/>
<connect gate="A" pin="D2-" pad="15"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="PWM1/XTO" pad="24"/>
<connect gate="A" pin="PWM2/~SMBALERT" pad="10"/>
<connect gate="A" pin="PWM3/~ADDRESS_ENABLE" pad="13"/>
<connect gate="A" pin="SCL" pad="2"/>
<connect gate="A" pin="SDA" pad="1"/>
<connect gate="A" pin="TACH1" pad="11"/>
<connect gate="A" pin="TACH2" pad="12"/>
<connect gate="A" pin="TACH3" pad="9"/>
<connect gate="A" pin="TACH4/ADDRESS_SELECT/~THERM" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VCCP" pad="23"/>
<connect gate="A" pin="VID0" pad="5"/>
<connect gate="A" pin="VID1" pad="6"/>
<connect gate="A" pin="VID2" pad="7"/>
<connect gate="A" pin="VID3" pad="8"/>
<connect gate="A" pin="VID4" pad="19"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADT7463ARQZ" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="87H9685" constant="no"/>
<attribute name="PACKAGE" value="QSOP-24" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ADT7467ARQZ" prefix="U">
<description>dBCool Remote Thermal Monitor and Fan Controller</description>
<gates>
<gate name="A" symbol="ADT7467ARQZ" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP63P600X175-16N">
<connects>
<connect gate="A" pin="D1+" pad="13"/>
<connect gate="A" pin="D1-" pad="12"/>
<connect gate="A" pin="D2+" pad="11"/>
<connect gate="A" pin="D2-" pad="10"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="PWM1/XTO" pad="15"/>
<connect gate="A" pin="PWM2/~SMBALERT" pad="5"/>
<connect gate="A" pin="PWM3" pad="8"/>
<connect gate="A" pin="SCL" pad="1"/>
<connect gate="A" pin="SDA" pad="16"/>
<connect gate="A" pin="TACH1" pad="6"/>
<connect gate="A" pin="TACH2" pad="7"/>
<connect gate="A" pin="TACH3" pad="4"/>
<connect gate="A" pin="TACH4/GPIO/~THERM/~SMBALERT" pad="9"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="VCCP" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="ADT7467ARQZ" constant="no"/>
<attribute name="OC_FARNELL" value="1536247" constant="no"/>
<attribute name="OC_NEWARK" value="19M8744" constant="no"/>
<attribute name="PACKAGE" value="QSOP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="AMIS30624C6244RG" prefix="U">
<description>I2C Micro-stepping Motor Driver</description>
<gates>
<gate name="A" symbol="AMIS30624C6244RG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1021X265-20N">
<connects>
<connect gate="A" pin="CPN" pad="9"/>
<connect gate="A" pin="CPP" pad="10"/>
<connect gate="A" pin="GND" pad="17"/>
<connect gate="A" pin="GND_2" pad="14"/>
<connect gate="A" pin="GND_3" pad="4"/>
<connect gate="A" pin="GND_4" pad="7"/>
<connect gate="A" pin="HW" pad="8"/>
<connect gate="A" pin="MOTXN" pad="16"/>
<connect gate="A" pin="MOTXP" pad="18"/>
<connect gate="A" pin="MOTYN" pad="13"/>
<connect gate="A" pin="MOTYP" pad="15"/>
<connect gate="A" pin="SCK" pad="2"/>
<connect gate="A" pin="SDA" pad="1"/>
<connect gate="A" pin="SWI" pad="20"/>
<connect gate="A" pin="TST1" pad="5"/>
<connect gate="A" pin="TST2" pad="6"/>
<connect gate="A" pin="VBB" pad="19"/>
<connect gate="A" pin="VBB_2" pad="12"/>
<connect gate="A" pin="VCP" pad="11"/>
<connect gate="A" pin="VDD" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="AMIS30624C6244RG" constant="no"/>
<attribute name="OC_FARNELL" value="1641410" constant="no"/>
<attribute name="OC_NEWARK" value="03P0834" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="AMIS30660CANH2G" prefix="U">
<description>High Speed CAN Transceiver</description>
<gates>
<gate name="A" symbol="AMIS30660CANH2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CANH" pad="7"/>
<connect gate="A" pin="CANL" pad="6"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="RXD" pad="4"/>
<connect gate="A" pin="S" pad="8"/>
<connect gate="A" pin="TXD" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="VREF" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="AMIS30660CANH2G" constant="no"/>
<attribute name="OC_FARNELL" value="1641429" constant="no"/>
<attribute name="OC_NEWARK" value="03P1154" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="AMIS30663CANG2G" prefix="U">
<description>High Speed CAN Transceiver</description>
<gates>
<gate name="A" symbol="AMIS30663CANG2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CANH" pad="7"/>
<connect gate="A" pin="CANL" pad="6"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="RXD" pad="4"/>
<connect gate="A" pin="TXD" pad="1"/>
<connect gate="A" pin="V33" pad="8"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="VREF" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="AMIS30663CANG2G" constant="no"/>
<attribute name="OC_FARNELL" value="1641431" constant="no"/>
<attribute name="OC_NEWARK" value="03P1156" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="AMIS42770ICAW1RG" prefix="U">
<description>Dual High Speed CAN Transceiver</description>
<gates>
<gate name="A" symbol="AMIS42770ICAW1RG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CANH1" pad="13"/>
<connect gate="A" pin="CANH2" pad="19"/>
<connect gate="A" pin="CANL1" pad="14"/>
<connect gate="A" pin="CANL2" pad="18"/>
<connect gate="A" pin="GND" pad="17"/>
<connect gate="A" pin="GND_2" pad="5"/>
<connect gate="A" pin="GND_3" pad="6"/>
<connect gate="A" pin="GND_4" pad="15"/>
<connect gate="A" pin="GND_5" pad="16"/>
<connect gate="A" pin="NC" pad="20"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="11"/>
<connect gate="A" pin="RINT" pad="9"/>
<connect gate="A" pin="RX0" pad="7"/>
<connect gate="A" pin="TEXT" pad="3"/>
<connect gate="A" pin="TX0" pad="4"/>
<connect gate="A" pin="VCC" pad="12"/>
<connect gate="A" pin="VREF1" pad="8"/>
<connect gate="A" pin="~EN1" pad="10"/>
<connect gate="A" pin="~EN2" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="AMIS42770ICAW1RG" constant="no"/>
<attribute name="OC_FARNELL" value="1641442" constant="no"/>
<attribute name="OC_NEWARK" value="03P1165" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT24C04LI-G" prefix="U">
<description>CMOS Serial EEPROM</description>
<gates>
<gate name="A" symbol="CAT24C04LI-G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="SCL" pad="6"/>
<connect gate="A" pin="SDA" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VSS" pad="4"/>
<connect gate="A" pin="WP" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT24C04LI-G" constant="no"/>
<attribute name="OC_FARNELL" value="1718374" constant="no"/>
<attribute name="OC_NEWARK" value="73P4460" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT24C16LI-G" prefix="U">
<description>CMOS Serial EEPROM</description>
<gates>
<gate name="A" symbol="CAT24C16LI-G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="2"/>
<connect gate="A" pin="SCL" pad="6"/>
<connect gate="A" pin="SDA" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VSS" pad="4"/>
<connect gate="A" pin="WP" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT24C16LI-G" constant="no"/>
<attribute name="OC_FARNELL" value="1718037" constant="no"/>
<attribute name="OC_NEWARK" value="06R0533" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT24C44LI" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="CAT24C44LI" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="DI" pad="3"/>
<connect gate="A" pin="DO" pad="4"/>
<connect gate="A" pin="SK" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VSS" pad="5"/>
<connect gate="A" pin="~RECALL" pad="6"/>
<connect gate="A" pin="~STORE" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT24C44LI" constant="no"/>
<attribute name="OC_FARNELL" value="1718282" constant="no"/>
<attribute name="OC_NEWARK" value="06R0564" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT25020LI-G" prefix="U">
<description>Serial CMOS EEPROM</description>
<gates>
<gate name="A" symbol="CAT25020LI-G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="SCK" pad="6"/>
<connect gate="A" pin="SI" pad="5"/>
<connect gate="A" pin="SO" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VSS" pad="4"/>
<connect gate="A" pin="~CS" pad="1"/>
<connect gate="A" pin="~HOLD" pad="7"/>
<connect gate="A" pin="~WP" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT25020LI-G" constant="no"/>
<attribute name="OC_FARNELL" value="1718043" constant="no"/>
<attribute name="OC_NEWARK" value="06R0582" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT25256LI-G" prefix="U">
<description>SPI Serial CMOS EEPROM</description>
<gates>
<gate name="A" symbol="CAT25256LI-G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="CS" pad="2"/>
<connect gate="A" pin="SCK" pad="6"/>
<connect gate="A" pin="SI" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VSS" pad="4"/>
<connect gate="A" pin="~HOLD" pad="7"/>
<connect gate="A" pin="~SO" pad="1"/>
<connect gate="A" pin="~WP" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT25256LI-G" constant="no"/>
<attribute name="OC_FARNELL" value="1718050" constant="no"/>
<attribute name="OC_NEWARK" value="06R0614" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT93C56LI-G" prefix="U">
<description>CMOS EEPROM</description>
<gates>
<gate name="A" symbol="CAT93C56LI-G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="CS" pad="1"/>
<connect gate="A" pin="DI" pad="3"/>
<connect gate="A" pin="DO" pad="4"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="ORG" pad="7"/>
<connect gate="A" pin="SK" pad="2"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT93C56LI-G" constant="no"/>
<attribute name="OC_FARNELL" value="1718065" constant="no"/>
<attribute name="OC_NEWARK" value="06R1453" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CAT9532WI" prefix="U">
<description>16-bit Programmable LED Dimmer with I2C Interface</description>
<gates>
<gate name="A" symbol="CAT9532WI" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1031X265-24N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="LED0" pad="4"/>
<connect gate="A" pin="LED1" pad="5"/>
<connect gate="A" pin="LED10" pad="15"/>
<connect gate="A" pin="LED11" pad="16"/>
<connect gate="A" pin="LED12" pad="17"/>
<connect gate="A" pin="LED13" pad="18"/>
<connect gate="A" pin="LED14" pad="19"/>
<connect gate="A" pin="LED15" pad="20"/>
<connect gate="A" pin="LED2" pad="6"/>
<connect gate="A" pin="LED3" pad="7"/>
<connect gate="A" pin="LED4" pad="8"/>
<connect gate="A" pin="LED5" pad="9"/>
<connect gate="A" pin="LED6" pad="10"/>
<connect gate="A" pin="LED7" pad="11"/>
<connect gate="A" pin="LED8" pad="13"/>
<connect gate="A" pin="LED9" pad="14"/>
<connect gate="A" pin="SCL" pad="22"/>
<connect gate="A" pin="SDA" pad="23"/>
<connect gate="A" pin="VCC" pad="24"/>
<connect gate="A" pin="VSS" pad="12"/>
<connect gate="A" pin="~RESET" pad="21"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CAT9532WI." constant="no"/>
<attribute name="OC_FARNELL" value="1656134" constant="no"/>
<attribute name="OC_NEWARK" value="11P0275" constant="no"/>
<attribute name="PACKAGE" value="SOIC-24" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CS5171ED8G" prefix="U">
<description>1.5 A 280 kHz/560 kHz Boost Regulators</description>
<gates>
<gate name="A" symbol="CS5171ED8G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="AGND" pad="6"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="PGND" pad="7"/>
<connect gate="A" pin="SS" pad="4"/>
<connect gate="A" pin="TEST" pad="3"/>
<connect gate="A" pin="VC" pad="1"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="VSW" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CS5171ED8G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K3578" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CS8182YDFR8G" prefix="U">
<description>Micropower 200 mA Low Dropout Tracking Regulator/Line Driver</description>
<gates>
<gate name="A" symbol="CS8182YDFR8G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJ" pad="4"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="GND_2" pad="7"/>
<connect gate="A" pin="GND_3" pad="3"/>
<connect gate="A" pin="GND_4" pad="6"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
<connect gate="A" pin="VREF/ENABLE" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CS8182YDFR8G" constant="no"/>
<attribute name="OC_FARNELL" value="1155540" constant="no"/>
<attribute name="OC_NEWARK" value="71J3571" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CS8190EDWFR20G" prefix="U">
<description>Precision Air-Core Tach/Speedo Driver with Return to Zero</description>
<gates>
<gate name="A" symbol="CS8190EDWFR20G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="BIAS" pad="11"/>
<connect gate="A" pin="COS+" pad="8"/>
<connect gate="A" pin="COS-" pad="9"/>
<connect gate="A" pin="CP+" pad="1"/>
<connect gate="A" pin="CP-" pad="20"/>
<connect gate="A" pin="F/VOUT" pad="19"/>
<connect gate="A" pin="FREQIN" pad="3"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="14"/>
<connect gate="A" pin="GND_3" pad="15"/>
<connect gate="A" pin="GND_4" pad="16"/>
<connect gate="A" pin="GND_5" pad="17"/>
<connect gate="A" pin="GND_6" pad="4"/>
<connect gate="A" pin="GND_7" pad="5"/>
<connect gate="A" pin="GND_8" pad="6"/>
<connect gate="A" pin="SIN+" pad="13"/>
<connect gate="A" pin="SIN-" pad="12"/>
<connect gate="A" pin="SQOUT" pad="2"/>
<connect gate="A" pin="VCC" pad="10"/>
<connect gate="A" pin="VREG" pad="18"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CS8190EDWFR20G" constant="no"/>
<attribute name="OC_FARNELL" value="1568820" constant="no"/>
<attribute name="OC_NEWARK" value="26K3580" constant="no"/>
<attribute name="PACKAGE" value="20SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="CS8190ENF16G" prefix="U">
<description>Precision Air-Core Tach/Speedo Driver</description>
<gates>
<gate name="A" symbol="CS8190ENF16G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="BIAS" pad="9"/>
<connect gate="A" pin="COS+" pad="6"/>
<connect gate="A" pin="COS-" pad="7"/>
<connect gate="A" pin="CP+" pad="1"/>
<connect gate="A" pin="CP-" pad="16"/>
<connect gate="A" pin="F/VOUT" pad="15"/>
<connect gate="A" pin="FREQIN" pad="3"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="GND_2" pad="5"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="GND_4" pad="4"/>
<connect gate="A" pin="SINE+" pad="11"/>
<connect gate="A" pin="SINE-" pad="10"/>
<connect gate="A" pin="SQOUT" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VREG" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="CS8190ENF16G" constant="no"/>
<attribute name="OC_FARNELL" value="1568827" constant="no"/>
<attribute name="OC_NEWARK" value="27M2306" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="FS6370-01G-XTD" prefix="U">
<description>EEPROM Programmable 3-PLL Clock Generator IC</description>
<gates>
<gate name="A" symbol="FS6370-01G-XTD" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X173-16N">
<connects>
<connect gate="A" pin="CLK_A" pad="15"/>
<connect gate="A" pin="CLK_B" pad="13"/>
<connect gate="A" pin="CLK_C" pad="12"/>
<connect gate="A" pin="CLK_D" pad="10"/>
<connect gate="A" pin="MODE" pad="9"/>
<connect gate="A" pin="OE/SDA" pad="7"/>
<connect gate="A" pin="PD/SCL" pad="3"/>
<connect gate="A" pin="SEL_CD" pad="2"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VDD_2" pad="8"/>
<connect gate="A" pin="VDD_3" pad="14"/>
<connect gate="A" pin="VSS" pad="11"/>
<connect gate="A" pin="VSS_2" pad="1"/>
<connect gate="A" pin="VSS_3" pad="4"/>
<connect gate="A" pin="XIN" pad="5"/>
<connect gate="A" pin="XOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="FS6370-01G-XTD" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="03P0841" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="FS6377-01G-XTD" prefix="U">
<description>Programmable 3-PLL Clock Generator IC</description>
<gates>
<gate name="A" symbol="FS6377-01G-XTD" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X173-16N">
<connects>
<connect gate="A" pin="ADDR" pad="9"/>
<connect gate="A" pin="CLK_A" pad="15"/>
<connect gate="A" pin="CLK_B" pad="13"/>
<connect gate="A" pin="CLK_C" pad="12"/>
<connect gate="A" pin="CLK_D" pad="10"/>
<connect gate="A" pin="OE" pad="7"/>
<connect gate="A" pin="PD" pad="3"/>
<connect gate="A" pin="SCL" pad="16"/>
<connect gate="A" pin="SDA" pad="1"/>
<connect gate="A" pin="SEL_CD" pad="2"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VDD_2" pad="8"/>
<connect gate="A" pin="VSS" pad="11"/>
<connect gate="A" pin="VSS_2" pad="4"/>
<connect gate="A" pin="XIN" pad="5"/>
<connect gate="A" pin="XOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="FS6377-01G-XTD" constant="no"/>
<attribute name="OC_FARNELL" value="1641418" constant="no"/>
<attribute name="OC_NEWARK" value="03P0842" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="FS7140-01G-XTD" prefix="U">
<description>Programmable Phase-Locked Loop Clock Generator</description>
<gates>
<gate name="A" symbol="FS7140-01G-XTD" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X173-16N">
<connects>
<connect gate="A" pin="ADDR0" pad="3"/>
<connect gate="A" pin="ADDR1" pad="7"/>
<connect gate="A" pin="CLKN" pad="16"/>
<connect gate="A" pin="CLKP" pad="15"/>
<connect gate="A" pin="IPRG" pad="9"/>
<connect gate="A" pin="N/C" pad="10"/>
<connect gate="A" pin="N/C_2" pad="13"/>
<connect gate="A" pin="REF" pad="12"/>
<connect gate="A" pin="SCL" pad="1"/>
<connect gate="A" pin="SDA" pad="2"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VDD_2" pad="8"/>
<connect gate="A" pin="VSS" pad="11"/>
<connect gate="A" pin="VSS_2" pad="4"/>
<connect gate="A" pin="XIN" pad="5"/>
<connect gate="A" pin="XOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="FS7140-01G-XTD" constant="no"/>
<attribute name="OC_FARNELL" value="1641420" constant="no"/>
<attribute name="OC_NEWARK" value="03P0844" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM201ANG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM201ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMP" pad="8"/>
<connect gate="A" pin="IN" pad="3"/>
<connect gate="A" pin="IN_2" pad="2"/>
<connect gate="A" pin="OFS" pad="1"/>
<connect gate="A" pin="OFS_2" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM201ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1468701" constant="no"/>
<attribute name="OC_NEWARK" value="26K3595" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM211DG" prefix="U">
<description>Single Comparators</description>
<gates>
<gate name="A" symbol="LM211DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="BALANCE" pad="5"/>
<connect gate="A" pin="BALANCE/STROBE" pad="6"/>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="NEG_IN_1" pad="3"/>
<connect gate="A" pin="OUT" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM211DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468702" constant="no"/>
<attribute name="OC_NEWARK" value="41K9834" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM224DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM224DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE,_GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM224DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211091" constant="no"/>
<attribute name="OC_NEWARK" value="71J4990" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM224DR2G" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM224DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE,_GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM224DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1426352" constant="no"/>
<attribute name="OC_NEWARK" value="98H0552" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM224NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM224NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="10"/>
<connect gate="A" pin="IN_3_2" pad="9"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM224NG" constant="no"/>
<attribute name="OC_FARNELL" value="1211137" constant="no"/>
<attribute name="OC_NEWARK" value="45J0710" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM239DG" prefix="U">
<description>Single Supply Quad Comparators</description>
<gates>
<gate name="A" symbol="LM239DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="+IN1" pad="5"/>
<connect gate="A" pin="+IN2" pad="7"/>
<connect gate="A" pin="+IN3" pad="9"/>
<connect gate="A" pin="+IN4" pad="11"/>
<connect gate="A" pin="-IN1" pad="4"/>
<connect gate="A" pin="-IN2" pad="6"/>
<connect gate="A" pin="-IN3" pad="8"/>
<connect gate="A" pin="-IN4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="1"/>
<connect gate="A" pin="OUT3" pad="14"/>
<connect gate="A" pin="OUT4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM239DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211093" constant="no"/>
<attribute name="OC_NEWARK" value="45J0711" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM239NG" prefix="U">
<description>Comparators</description>
<gates>
<gate name="A" symbol="LM239NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="+IN_1" pad="5"/>
<connect gate="A" pin="+IN_2" pad="7"/>
<connect gate="A" pin="+IN_3" pad="9"/>
<connect gate="A" pin="+IN_4" pad="11"/>
<connect gate="A" pin="-IN_1" pad="4"/>
<connect gate="A" pin="-IN_2" pad="6"/>
<connect gate="A" pin="-IN_3" pad="8"/>
<connect gate="A" pin="-IN_4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="OUT_3" pad="14"/>
<connect gate="A" pin="OUT_4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM239NG" constant="no"/>
<attribute name="OC_FARNELL" value="9665420" constant="no"/>
<attribute name="OC_NEWARK" value="45J0712" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2574N-5G" prefix="U">
<description>Switching Regulator</description>
<gates>
<gate name="A" symbol="LM2574N-5G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="FB" pad="1"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="OUTPUT" pad="7"/>
<connect gate="A" pin="PWR_GND" pad="4"/>
<connect gate="A" pin="SIG_GND" pad="2"/>
<connect gate="A" pin="VIN" pad="5"/>
<connect gate="A" pin="~ON/OFF" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2574N-5G" constant="no"/>
<attribute name="OC_FARNELL" value="1460659" constant="no"/>
<attribute name="OC_NEWARK" value="70K2987" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM258DG" prefix="U">
<description>Single Supply Dual Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM258DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_A" pad="2"/>
<connect gate="A" pin="NEG_IN_B" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="POS_IN_A" pad="3"/>
<connect gate="A" pin="POS_IN_B" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM258DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211094" constant="no"/>
<attribute name="OC_NEWARK" value="71J4994" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2901DTBR2G" prefix="U">
<description>Quad Comparators</description>
<gates>
<gate name="A" symbol="LM2901DTBR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="+IN1" pad="5"/>
<connect gate="A" pin="+IN2" pad="7"/>
<connect gate="A" pin="+IN3" pad="9"/>
<connect gate="A" pin="+IN4" pad="11"/>
<connect gate="A" pin="-IN1" pad="4"/>
<connect gate="A" pin="-IN2" pad="6"/>
<connect gate="A" pin="-IN3" pad="8"/>
<connect gate="A" pin="-IN4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="1"/>
<connect gate="A" pin="OUT3" pad="14"/>
<connect gate="A" pin="OUT4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2901DTBR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7812" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2901NG" prefix="U">
<description>Comparators</description>
<gates>
<gate name="A" symbol="LM2901NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="+IN_1" pad="5"/>
<connect gate="A" pin="+IN_2" pad="7"/>
<connect gate="A" pin="+IN_3" pad="9"/>
<connect gate="A" pin="+IN_4" pad="11"/>
<connect gate="A" pin="-IN_1" pad="4"/>
<connect gate="A" pin="-IN_2" pad="6"/>
<connect gate="A" pin="-IN_3" pad="8"/>
<connect gate="A" pin="-IN_4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="OUT_3" pad="14"/>
<connect gate="A" pin="OUT_4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2901NG" constant="no"/>
<attribute name="OC_FARNELL" value="1126406" constant="no"/>
<attribute name="OC_NEWARK" value="45J0721" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2901VDTBR2G" prefix="U">
<description>Quad Comparators</description>
<gates>
<gate name="A" symbol="LM2901VDTBR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="+IN1" pad="5"/>
<connect gate="A" pin="+IN2" pad="7"/>
<connect gate="A" pin="+IN3" pad="9"/>
<connect gate="A" pin="+IN4" pad="11"/>
<connect gate="A" pin="-IN1" pad="4"/>
<connect gate="A" pin="-IN2" pad="6"/>
<connect gate="A" pin="-IN3" pad="8"/>
<connect gate="A" pin="-IN4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="1"/>
<connect gate="A" pin="OUT3" pad="14"/>
<connect gate="A" pin="OUT4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2901VDTBR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7813" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2902DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM2902DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE,_GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2902DG" constant="no"/>
<attribute name="OC_FARNELL" value="1191816" constant="no"/>
<attribute name="OC_NEWARK" value="45J0722" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2902NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM2902NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2902NG" constant="no"/>
<attribute name="OC_FARNELL" value="1126407" constant="no"/>
<attribute name="OC_NEWARK" value="45J0723" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2903VDG" prefix="U">
<description>Low Offset Voltage Dual Comparators</description>
<gates>
<gate name="A" symbol="LM2903VDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="NEG_IN_A" pad="2"/>
<connect gate="A" pin="NEG_IN_B" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="POS_IN_A" pad="3"/>
<connect gate="A" pin="POS_IN_B" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2903VDG" constant="no"/>
<attribute name="OC_FARNELL" value="1703247" constant="no"/>
<attribute name="OC_NEWARK" value="98H0564" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2903VDR2G" prefix="U">
<description>Low Offset Voltage Dual Comparators</description>
<gates>
<gate name="A" symbol="LM2903VDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="NEG_IN_A" pad="2"/>
<connect gate="A" pin="NEG_IN_B" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="POS_IN_A" pad="3"/>
<connect gate="A" pin="POS_IN_B" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2903VDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7815" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2904NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM2904NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_A_2" pad="3"/>
<connect gate="A" pin="IN_B" pad="6"/>
<connect gate="A" pin="IN_B_2" pad="5"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2904NG" constant="no"/>
<attribute name="OC_FARNELL" value="1211131" constant="no"/>
<attribute name="OC_NEWARK" value="45J0729" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2931ACDG" prefix="U">
<description>Low Dropout Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM2931ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="2"/>
<connect gate="A" pin="GND_3" pad="3"/>
<connect gate="A" pin="GND_4" pad="6"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="OUT_INHIBIT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2931ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1703350" constant="no"/>
<attribute name="OC_NEWARK" value="41K9871" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2931AD-5.0G" prefix="U">
<description>Low Dropout Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM2931AD-5.0G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="2"/>
<connect gate="A" pin="GND_3" pad="3"/>
<connect gate="A" pin="GND_4" pad="6"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="OUT_INHIBIT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2931AD-5.0G" constant="no"/>
<attribute name="OC_FARNELL" value="1211098" constant="no"/>
<attribute name="OC_NEWARK" value="71J5000" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2931CDG" prefix="U">
<description>Low Dropout Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM2931CDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="2"/>
<connect gate="A" pin="GND_3" pad="3"/>
<connect gate="A" pin="GND_4" pad="6"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="OUT_INHIBIT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2931CDG" constant="no"/>
<attribute name="OC_FARNELL" value="1211100" constant="no"/>
<attribute name="OC_NEWARK" value="71J5006" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2931CDR2G" prefix="U">
<description>Low Dropout Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM2931CDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="2"/>
<connect gate="A" pin="GND_3" pad="3"/>
<connect gate="A" pin="GND_4" pad="6"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="OUT_INHIBIT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2931CDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1260088" constant="no"/>
<attribute name="OC_NEWARK" value="88H4655" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM2931D-5.0G" prefix="U">
<description>Low Dropout Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM2931D-5.0G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="2"/>
<connect gate="A" pin="GND_3" pad="3"/>
<connect gate="A" pin="GND_4" pad="6"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="N.C." pad="4"/>
<connect gate="A" pin="N.C._2" pad="5"/>
<connect gate="A" pin="OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM2931D-5.0G" constant="no"/>
<attribute name="OC_FARNELL" value="1214458" constant="no"/>
<attribute name="OC_NEWARK" value="71J5007" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM301ADG" prefix="U">
<description>Non Compensated Single Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM301ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="BALANCE" pad="5"/>
<connect gate="A" pin="BALANCE_2" pad="1"/>
<connect gate="A" pin="COMP" pad="8"/>
<connect gate="A" pin="NEG_IN" pad="2"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS_IN" pad="3"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM301ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1426351" constant="no"/>
<attribute name="OC_NEWARK" value="45J0731" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM301ANG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM301ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMP" pad="8"/>
<connect gate="A" pin="IN" pad="3"/>
<connect gate="A" pin="IN_2" pad="2"/>
<connect gate="A" pin="OFS" pad="1"/>
<connect gate="A" pin="OFS_2" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM301ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1125957" constant="no"/>
<attribute name="OC_NEWARK" value="26K3624" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM311DG" prefix="U">
<description>Single Comparators</description>
<gates>
<gate name="A" symbol="LM311DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="BALANCE" pad="5"/>
<connect gate="A" pin="BALANCE/STROBE" pad="6"/>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="NEG_IN" pad="3"/>
<connect gate="A" pin="OUT" pad="7"/>
<connect gate="A" pin="POS_IN" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM311DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468705" constant="no"/>
<attribute name="OC_NEWARK" value="98H0570" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM311NG" prefix="U">
<description>Single Comparators</description>
<gates>
<gate name="A" symbol="LM311NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="IN" pad="3"/>
<connect gate="A" pin="IN_2" pad="2"/>
<connect gate="A" pin="OFS" pad="5"/>
<connect gate="A" pin="OFS/STRB" pad="6"/>
<connect gate="A" pin="OUT" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM311NG" constant="no"/>
<attribute name="OC_FARNELL" value="1214465" constant="no"/>
<attribute name="OC_NEWARK" value="45J0734" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM317LBDG" prefix="U">
<description>Adjustable Output, Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM317LBDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="5"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="7"/>
<connect gate="A" pin="VOUT_2" pad="2"/>
<connect gate="A" pin="VOUT_3" pad="3"/>
<connect gate="A" pin="VOUT_4" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM317LBDG" constant="no"/>
<attribute name="OC_FARNELL" value="1652326" constant="no"/>
<attribute name="OC_NEWARK" value="88H4658" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM317LDG" prefix="U">
<description>Adjustable Output, Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM317LDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="5"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="7"/>
<connect gate="A" pin="VOUT_2" pad="2"/>
<connect gate="A" pin="VOUT_3" pad="3"/>
<connect gate="A" pin="VOUT_4" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM317LDG" constant="no"/>
<attribute name="OC_FARNELL" value="1211101" constant="no"/>
<attribute name="OC_NEWARK" value="45J0739" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM317LDR2G" prefix="U">
<description>Adjustable Output, Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="LM317LDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJUST" pad="4"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="5"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="7"/>
<connect gate="A" pin="VOUT_2" pad="2"/>
<connect gate="A" pin="VOUT_3" pad="3"/>
<connect gate="A" pin="VOUT_4" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM317LDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1278481" constant="no"/>
<attribute name="OC_NEWARK" value="84K8732" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM324ANG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM324ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE,GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM324ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1214466" constant="no"/>
<attribute name="OC_NEWARK" value="98H0574" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM324DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM324DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE,_GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM324DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211103" constant="no"/>
<attribute name="OC_NEWARK" value="45J0744" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM324DR2G" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM324DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE,_GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM324DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1266199" constant="no"/>
<attribute name="OC_NEWARK" value="84K8734" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM339DR2G" prefix="U">
<description>Single Supply Quad Comparators</description>
<gates>
<gate name="A" symbol="LM339DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="+IN1" pad="5"/>
<connect gate="A" pin="+IN2" pad="7"/>
<connect gate="A" pin="+IN3" pad="9"/>
<connect gate="A" pin="+IN4" pad="11"/>
<connect gate="A" pin="-IN1" pad="4"/>
<connect gate="A" pin="-IN2" pad="6"/>
<connect gate="A" pin="-IN3" pad="8"/>
<connect gate="A" pin="-IN4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="1"/>
<connect gate="A" pin="OUT3" pad="14"/>
<connect gate="A" pin="OUT4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM339DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1651910" constant="no"/>
<attribute name="OC_NEWARK" value="17H1559" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM339NG" prefix="U">
<description>Single Supply Quad Comparators</description>
<gates>
<gate name="A" symbol="LM339NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="+IN_1" pad="5"/>
<connect gate="A" pin="+IN_2" pad="7"/>
<connect gate="A" pin="+IN_3" pad="9"/>
<connect gate="A" pin="+IN_4" pad="11"/>
<connect gate="A" pin="-IN_1" pad="4"/>
<connect gate="A" pin="-IN_2" pad="6"/>
<connect gate="A" pin="-IN_3" pad="8"/>
<connect gate="A" pin="-IN_4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="OUT_3" pad="14"/>
<connect gate="A" pin="OUT_4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM339NG" constant="no"/>
<attribute name="OC_FARNELL" value="9664491" constant="no"/>
<attribute name="OC_NEWARK" value="98H0576" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM358DG" prefix="U">
<description>Single Supply Dual Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM358DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_A" pad="2"/>
<connect gate="A" pin="NEG_IN_B" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="POS_IN_A" pad="3"/>
<connect gate="A" pin="POS_IN_B" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM358DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211106" constant="no"/>
<attribute name="OC_NEWARK" value="45J0748" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM358DR2G" prefix="U">
<description>Single Supply Dual Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM358DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_A" pad="2"/>
<connect gate="A" pin="NEG_IN_B" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="POS_IN_A" pad="3"/>
<connect gate="A" pin="POS_IN_B" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM358DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1262834" constant="no"/>
<attribute name="OC_NEWARK" value="83H7264" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR " constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM358NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM358NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_A_2" pad="3"/>
<connect gate="A" pin="IN_B" pad="6"/>
<connect gate="A" pin="IN_B_2" pad="5"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM358NG" constant="no"/>
<attribute name="OC_FARNELL" value="1211132" constant="no"/>
<attribute name="OC_NEWARK" value="67H6684" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM385BD-1.2G" prefix="U">
<description>Micropower Voltage Reference Diodes</description>
<gates>
<gate name="A" symbol="LM385BD-1.2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="4"/>
<connect gate="A" pin="CATHODE" pad="8"/>
<connect gate="A" pin="N.C." pad="5"/>
<connect gate="A" pin="N.C._2" pad="3"/>
<connect gate="A" pin="N.C._3" pad="2"/>
<connect gate="A" pin="N.C._4" pad="6"/>
<connect gate="A" pin="N.C._5" pad="1"/>
<connect gate="A" pin="N.C._6" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM385BD-1.2G" constant="no"/>
<attribute name="OC_FARNELL" value="1705938" constant="no"/>
<attribute name="OC_NEWARK" value="45J0749" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM393DG." prefix="U">
<description>Dual Comparators</description>
<gates>
<gate name="A" symbol="LM393DG." x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_A_2" pad="3"/>
<connect gate="A" pin="IN_B" pad="5"/>
<connect gate="A" pin="IN_B_2" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM393DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211108" constant="no"/>
<attribute name="OC_NEWARK" value="88H4661" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM393DG" prefix="U">
<description>Low Offset Voltage Dual Comparators</description>
<gates>
<gate name="A" symbol="LM393DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="+IN_A" pad="3"/>
<connect gate="A" pin="+IN_B" pad="5"/>
<connect gate="A" pin="-IN_A" pad="2"/>
<connect gate="A" pin="-IN_B" pad="6"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM393DG" constant="no"/>
<attribute name="OC_FARNELL" value="1343575" constant="no"/>
<attribute name="OC_NEWARK" value="88H4661" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM393DR2G" prefix="U">
<description>Low Offset Voltage Dual Comparators</description>
<gates>
<gate name="A" symbol="LM393DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_A" pad="3"/>
<connect gate="A" pin="IN_A_2" pad="2"/>
<connect gate="A" pin="IN_B" pad="5"/>
<connect gate="A" pin="IN_B_2" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM393DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1258876" constant="no"/>
<attribute name="OC_NEWARK" value="88H4662" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM393NG" prefix="U">
<description>Dual Comparators</description>
<gates>
<gate name="A" symbol="LM393NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_A_2" pad="3"/>
<connect gate="A" pin="IN_B" pad="5"/>
<connect gate="A" pin="IN_B_2" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM393NG" constant="no"/>
<attribute name="OC_FARNELL" value="1211133" constant="no"/>
<attribute name="OC_NEWARK" value="67H6685" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LM833NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="LM833NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LM833NG" constant="no"/>
<attribute name="OC_FARNELL" value="1214467" constant="no"/>
<attribute name="OC_NEWARK" value="26K3636" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LP2951ACDG" prefix="U">
<description>Low Power Low Dropout Voltage Regulator</description>
<gates>
<gate name="A" symbol="LP2951ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FB" pad="7"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="SENSE" pad="2"/>
<connect gate="A" pin="SHDN" pad="3"/>
<connect gate="A" pin="VO_TAP" pad="6"/>
<connect gate="A" pin="~ERROR_OUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LP2951ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1652328" constant="no"/>
<attribute name="OC_NEWARK" value="26K3642" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LP2951ACDR2G" prefix="U">
<description>Low Power Low Dropout Voltage Regulator</description>
<gates>
<gate name="A" symbol="LP2951ACDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FB" pad="7"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="SENSE" pad="2"/>
<connect gate="A" pin="SHDN" pad="3"/>
<connect gate="A" pin="VO_TAP" pad="6"/>
<connect gate="A" pin="~ERROR_OUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LP2951ACDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1260732" constant="no"/>
<attribute name="OC_NEWARK" value="41J1709" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LP2951ACNG" prefix="U">
<description>Dropout Voltage Regulator</description>
<gates>
<gate name="A" symbol="LP2951ACNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="FEEDBACK" pad="7"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT" pad="8"/>
<connect gate="A" pin="OUTPUT" pad="1"/>
<connect gate="A" pin="SENSE" pad="2"/>
<connect gate="A" pin="SHUTDOWN" pad="3"/>
<connect gate="A" pin="VO_TAP" pad="6"/>
<connect gate="A" pin="~ERROR_OUTPUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LP2951ACNG" constant="no"/>
<attribute name="OC_FARNELL" value="1213692" constant="no"/>
<attribute name="OC_NEWARK" value="70K3006" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LP2951CD-3.3R2G" prefix="U">
<description>Low Power Low Dropout Voltage Regulator</description>
<gates>
<gate name="A" symbol="LP2951CD-3.3R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FB" pad="7"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="SENSE" pad="2"/>
<connect gate="A" pin="SHDN" pad="3"/>
<connect gate="A" pin="VO_TAP" pad="6"/>
<connect gate="A" pin="~ERROR_OUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LP2951CD-3.3R2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7822" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="LP2951CDG" prefix="U">
<description>Low Power Low Dropout Voltage Regulator</description>
<gates>
<gate name="A" symbol="LP2951CDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FB" pad="7"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="8"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="SENSE" pad="2"/>
<connect gate="A" pin="SHDN" pad="3"/>
<connect gate="A" pin="VO_TAP" pad="6"/>
<connect gate="A" pin="~ERROR_OUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="LP2951CDG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J0757" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1G125DFT1G" prefix="U">
<description>Noninverting 3-State Buffer</description>
<gates>
<gate name="A" symbol="M74VHC1G125DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1G125DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="61K1055" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1G132DFT1G" prefix="U">
<description>2-Input NAND Schmitt-Trigger</description>
<gates>
<gate name="A" symbol="M74VHC1G132DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1G132DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="61K1061" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT00DFT1G" prefix="U">
<description>Single 2-Input NAND Gate/ CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT00DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT00DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="61K1023" constant="no"/>
<attribute name="PACKAGE" value="SC-70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT04DFT1G" prefix="U">
<description>Inverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT04DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT04DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1567264" constant="no"/>
<attribute name="OC_NEWARK" value="61K1029" constant="no"/>
<attribute name="PACKAGE" value="SC-70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT08DFT1G" prefix="U">
<description>2-Input AND Gate/CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT08DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT08DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1654343" constant="no"/>
<attribute name="OC_NEWARK" value="61K1032" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT125DF1G" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT125DF1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT125DF1G" constant="no"/>
<attribute name="OC_FARNELL" value="1567363" constant="no"/>
<attribute name="OC_NEWARK" value="83H7591" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT126DF1G" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT126DF1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OE" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT126DF1G" constant="no"/>
<attribute name="OC_FARNELL" value="1567365" constant="no"/>
<attribute name="OC_NEWARK" value="83H7593" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT126DT1G" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT126DT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OE" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT126DT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1468708" constant="no"/>
<attribute name="OC_NEWARK" value="61K1036" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT14DFT1G" prefix="U">
<description>Schmitt-Trigger Inverter / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT14DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT14DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1654345" constant="no"/>
<attribute name="OC_NEWARK" value="61K1037" constant="no"/>
<attribute name="PACKAGE" value="SC-70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT32DFT1G" prefix="U">
<description>2-Input OR Gate/CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT32DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT32DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1567270" constant="no"/>
<attribute name="OC_NEWARK" value="61K1040" constant="no"/>
<attribute name="PACKAGE" value="SC-70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT50DFT1G" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT50DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT50DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1703292" constant="no"/>
<attribute name="OC_NEWARK" value="61K1043" constant="no"/>
<attribute name="PACKAGE" value="SOT-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT50DTT1G" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT50DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT50DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1654338" constant="no"/>
<attribute name="OC_NEWARK" value="61K1045" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="M74VHC1GT86DFT1G" prefix="U">
<description>2-Input Exclusive OR Gate / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="M74VHC1GT86DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="M74VHC1GT86DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1654346" constant="no"/>
<attribute name="OC_NEWARK" value="61K1049" constant="no"/>
<attribute name="PACKAGE" value="SC-70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MAX809JTRG" prefix="U">
<description>Very Low Supply Current 3-Pin Microprocessor  Reset Monitors</description>
<gates>
<gate name="A" symbol="MAX809JTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X110-3N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="~RESET" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MAX809JTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1705445" constant="no"/>
<attribute name="OC_NEWARK" value="04R7823" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MAX809STRG" prefix="U">
<description>3-Pin Microprocessor</description>
<gates>
<gate name="A" symbol="MAX809STRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="~RESET" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MAX809STRG" constant="no"/>
<attribute name="OC_FARNELL" value="1652404" constant="no"/>
<attribute name="OC_NEWARK" value="98H0579" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MAX809TTRG" prefix="U">
<description>3-Pin Microprocessor</description>
<gates>
<gate name="A" symbol="MAX809TTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="~RESET" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MAX809TTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1652405" constant="no"/>
<attribute name="OC_NEWARK" value="45J0769" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MAX810MTRG" prefix="U">
<description>3-Pin Microprocessor</description>
<gates>
<gate name="A" symbol="MAX810MTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MAX810MTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1360058" constant="no"/>
<attribute name="OC_NEWARK" value="71J5243" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MAX810RTRG" prefix="U">
<description>3-Pin Microprocessor</description>
<gates>
<gate name="A" symbol="MAX810RTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MAX810RTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1703427" constant="no"/>
<attribute name="OC_NEWARK" value="41K9966" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100E016FNG" prefix="U">
<description>Synchronous Binary Up Counter</description>
<gates>
<gate name="A" symbol="MC100E016FNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="PLCC127P1257X1257X457-28N">
<connects>
<connect gate="A" pin="CLK" pad="27"/>
<connect gate="A" pin="MR" pad="26"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="P0" pad="3"/>
<connect gate="A" pin="P1" pad="4"/>
<connect gate="A" pin="P2" pad="5"/>
<connect gate="A" pin="P3" pad="6"/>
<connect gate="A" pin="P4" pad="7"/>
<connect gate="A" pin="P5" pad="21"/>
<connect gate="A" pin="P6" pad="22"/>
<connect gate="A" pin="P7" pad="23"/>
<connect gate="A" pin="Q0" pad="9"/>
<connect gate="A" pin="Q1" pad="10"/>
<connect gate="A" pin="Q2" pad="11"/>
<connect gate="A" pin="Q3" pad="12"/>
<connect gate="A" pin="Q4" pad="13"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="17"/>
<connect gate="A" pin="Q7" pad="18"/>
<connect gate="A" pin="TCLD" pad="28"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VCCO" pad="20"/>
<connect gate="A" pin="VCCO_2" pad="8"/>
<connect gate="A" pin="VCCO_3" pad="14"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~CE" pad="24"/>
<connect gate="A" pin="~PE" pad="25"/>
<connect gate="A" pin="~TC" pad="19"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100E016FNG" constant="no"/>
<attribute name="OC_FARNELL" value="1147616" constant="no"/>
<attribute name="OC_NEWARK" value="26K3871" constant="no"/>
<attribute name="PACKAGE" value="PLCC-28" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100E111FNG" prefix="U">
<description>ECL 1:9 Differential Clock Driver</description>
<gates>
<gate name="A" symbol="MC100E111FNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="PLCC127P1244X1244X457-28N">
<connects>
<connect gate="A" pin="IN" pad="28"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="Q0" pad="25"/>
<connect gate="A" pin="Q1" pad="23"/>
<connect gate="A" pin="Q2" pad="20"/>
<connect gate="A" pin="Q3" pad="18"/>
<connect gate="A" pin="Q4" pad="16"/>
<connect gate="A" pin="Q5" pad="13"/>
<connect gate="A" pin="Q6" pad="11"/>
<connect gate="A" pin="Q7" pad="9"/>
<connect gate="A" pin="Q8" pad="6"/>
<connect gate="A" pin="VBB" pad="3"/>
<connect gate="A" pin="VCC" pad="1"/>
<connect gate="A" pin="VCCO" pad="22"/>
<connect gate="A" pin="VCCO_2" pad="8"/>
<connect gate="A" pin="VCCO_3" pad="15"/>
<connect gate="A" pin="VEE" pad="26"/>
<connect gate="A" pin="~EN" pad="27"/>
<connect gate="A" pin="~IN" pad="2"/>
<connect gate="A" pin="~Q0" pad="24"/>
<connect gate="A" pin="~Q1" pad="21"/>
<connect gate="A" pin="~Q2" pad="19"/>
<connect gate="A" pin="~Q3" pad="17"/>
<connect gate="A" pin="~Q4" pad="14"/>
<connect gate="A" pin="~Q5" pad="12"/>
<connect gate="A" pin="~Q6" pad="10"/>
<connect gate="A" pin="~Q7" pad="7"/>
<connect gate="A" pin="~Q8" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100E111FNG" constant="no"/>
<attribute name="OC_FARNELL" value="1192060" constant="no"/>
<attribute name="OC_NEWARK" value="45J0952" constant="no"/>
<attribute name="PACKAGE" value="PLCC-28" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL11DG" prefix="U">
<description>5.0 V ECL 1:2 Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100EL11DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL11DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607915" constant="no"/>
<attribute name="OC_NEWARK" value="88H4701" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL14DWG" prefix="U">
<description>ECL 1:5 Clock Distribution Chip</description>
<gates>
<gate name="A" symbol="MC100EL14DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CLK" pad="15"/>
<connect gate="A" pin="NC" pad="17"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="9"/>
<connect gate="A" pin="SCLK" pad="16"/>
<connect gate="A" pin="SEL" pad="12"/>
<connect gate="A" pin="VBB" pad="13"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="18"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK" pad="14"/>
<connect gate="A" pin="~EN" pad="19"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
<connect gate="A" pin="~Q2" pad="6"/>
<connect gate="A" pin="~Q3" pad="8"/>
<connect gate="A" pin="~Q4" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL14DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607916" constant="no"/>
<attribute name="OC_NEWARK" value="88H4704" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL15DG" prefix="U">
<description>5V ECL 1:4 Clock Distribution Chip</description>
<gates>
<gate name="A" symbol="MC100EL15DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="13"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="SCLK" pad="14"/>
<connect gate="A" pin="SEL" pad="10"/>
<connect gate="A" pin="VBB" pad="11"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="9"/>
<connect gate="A" pin="~CLK" pad="12"/>
<connect gate="A" pin="~EN" pad="15"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
<connect gate="A" pin="~Q2" pad="6"/>
<connect gate="A" pin="~Q3" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL15DG" constant="no"/>
<attribute name="OC_FARNELL" value="1258372" constant="no"/>
<attribute name="OC_NEWARK" value="42K0357" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL1648DG" prefix="U">
<description>Voltage Controlled Oscillator Amplifier</description>
<gates>
<gate name="A" symbol="MC100EL1648DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="AGC" pad="5"/>
<connect gate="A" pin="BIAS" pad="8"/>
<connect gate="A" pin="OUT" pad="4"/>
<connect gate="A" pin="TANK" pad="1"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="VCC_2" pad="3"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VEE_2" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL1648DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192063" constant="no"/>
<attribute name="OC_NEWARK" value="26K3816" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL16DG" prefix="U">
<description>5.0V ECL Differential Receiver</description>
<gates>
<gate name="A" symbol="MC100EL16DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL16DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192064" constant="no"/>
<attribute name="OC_NEWARK" value="88H4705" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL31DG" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC100EL31DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="R" pad="4"/>
<connect gate="A" pin="S" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33071ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1607707" constant="no"/>
<attribute name="OC_NEWARK" value="98H0669" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL32DG" prefix="U">
<description>5V ECL ÷2 Divider</description>
<gates>
<gate name="A" symbol="MC100EL32DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL32DG" constant="no"/>
<attribute name="OC_FARNELL" value="1311157" constant="no"/>
<attribute name="OC_NEWARK" value="26K3825" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL57DG" prefix="U">
<description>5V ECL 1:4 Differential Multiplexer</description>
<gates>
<gate name="A" symbol="MC100EL57DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="5"/>
<connect gate="A" pin="D3" pad="7"/>
<connect gate="A" pin="Q" pad="13"/>
<connect gate="A" pin="SEL0" pad="15"/>
<connect gate="A" pin="SEL1" pad="14"/>
<connect gate="A" pin="VBB1" pad="11"/>
<connect gate="A" pin="VBB2" pad="10"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="9"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="4"/>
<connect gate="A" pin="~D2" pad="6"/>
<connect gate="A" pin="~D3" pad="8"/>
<connect gate="A" pin="~Q" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL57DG" constant="no"/>
<attribute name="OC_FARNELL" value="1150407" constant="no"/>
<attribute name="OC_NEWARK" value="45J0919" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EL91DWG" prefix="U">
<description>5 V Triple PECL Input to -5 V ECL Output Translator</description>
<gates>
<gate name="A" symbol="MC100EL91DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="5"/>
<connect gate="A" pin="D2" pad="8"/>
<connect gate="A" pin="GND" pad="17"/>
<connect gate="A" pin="GND_2" pad="14"/>
<connect gate="A" pin="PECLVBB" pad="7"/>
<connect gate="A" pin="PECLVBB_2" pad="4"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="16"/>
<connect gate="A" pin="Q2" pad="13"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="11"/>
<connect gate="A" pin="VCC_3" pad="1"/>
<connect gate="A" pin="VEE" pad="10"/>
<connect gate="A" pin="~D0" pad="3"/>
<connect gate="A" pin="~D1" pad="6"/>
<connect gate="A" pin="~D2" pad="9"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="15"/>
<connect gate="A" pin="~Q2" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EL91DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1147093" constant="no"/>
<attribute name="OC_NEWARK" value="26K3834" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT20DG" prefix="U">
<description>5V TTL to Differential PECL Translator</description>
<gates>
<gate name="A" symbol="MC100ELT20DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="6"/>
<connect gate="A" pin="Q" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT20DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607862" constant="no"/>
<attribute name="OC_NEWARK" value="26K3803" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT20DTG" prefix="U">
<description>5V TTL to Differential PECL  Translator</description>
<gates>
<gate name="A" symbol="MC100ELT20DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="4"/>
<connect gate="A" pin="Q" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT20DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1192068" constant="no"/>
<attribute name="OC_NEWARK" value="26K3804" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT21DG" prefix="U">
<description>5 V Differential PECL to TTL Translator</description>
<gates>
<gate name="A" symbol="MC100ELT21DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D0" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT21DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192069" constant="no"/>
<attribute name="OC_NEWARK" value="71J5392" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT21DTG" prefix="U">
<description>5V TTL to Differential PECL TTL Translator</description>
<gates>
<gate name="A" symbol="MC100ELT21DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~DO" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT21DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1199231" constant="no"/>
<attribute name="OC_NEWARK" value="26K3805" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT24DG" prefix="U">
<description>5V TTL to Differential ECL Translator</description>
<gates>
<gate name="A" symbol="MC100ELT24DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT24DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192072" constant="no"/>
<attribute name="OC_NEWARK" value="26K3810" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT24DTG" prefix="U">
<description>5V TTL to Differential ECL Translator</description>
<gates>
<gate name="A" symbol="MC100ELT24DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT24DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1224744" constant="no"/>
<attribute name="OC_NEWARK" value="26K3811" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100ELT25DTG" prefix="U">
<description>-5 V Differential ECL to TTL Translator</description>
<gates>
<gate name="A" symbol="MC100ELT25DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100ELT25DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607863" constant="no"/>
<attribute name="OC_NEWARK" value="26K3813" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP01DG" prefix="U">
<description>3.3V / 5V ECL 4-Input OR/NOR</description>
<gates>
<gate name="A" symbol="MC100EP01DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="D2" pad="3"/>
<connect gate="A" pin="D3" pad="4"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP01DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0380" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP01DTG" prefix="U">
<description>3.3V / 5V ECL 4-Input  OR/NOR</description>
<gates>
<gate name="A" symbol="MC100EP01DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="D2" pad="3"/>
<connect gate="A" pin="D3" pad="4"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP01DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607760" constant="no"/>
<attribute name="OC_NEWARK" value="26K3839" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP05DG" prefix="U">
<description>3.3V / 5V ECL 2-Input Differential AND/NAND</description>
<gates>
<gate name="A" symbol="MC100EP05DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP05DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607761" constant="no"/>
<attribute name="OC_NEWARK" value="71J5404" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP05DTG" prefix="U">
<description>3.3V / 5V ECL 2-Input Differential AND/NAND</description>
<gates>
<gate name="A" symbol="MC100EP05DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP05DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1155549" constant="no"/>
<attribute name="OC_NEWARK" value="71J5405" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP08DTG" prefix="U">
<description>3.3V / 5V ECL 2-Input  Differential XOR/XNOR</description>
<gates>
<gate name="A" symbol="MC100EP08DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP08DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1167617" constant="no"/>
<attribute name="OC_NEWARK" value="61K0831" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP11DG" prefix="U">
<description>3.3V / 5V ECL 1:2 Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100EP11DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP11DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468709" constant="no"/>
<attribute name="OC_NEWARK" value="45J0937" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP11DTG" prefix="U">
<description>3.3V / 5V ECL 1:2 Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100EP11DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP11DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607917" constant="no"/>
<attribute name="OC_NEWARK" value="45J0938" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP131FAG" prefix="U">
<description>3.3V / 5V ECL Quad D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC100EP131FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="C0" pad="12"/>
<connect gate="A" pin="C1" pad="7"/>
<connect gate="A" pin="C2" pad="3"/>
<connect gate="A" pin="C3" pad="27"/>
<connect gate="A" pin="CC" pad="4"/>
<connect gate="A" pin="D0" pad="14"/>
<connect gate="A" pin="D1" pad="8"/>
<connect gate="A" pin="D2" pad="32"/>
<connect gate="A" pin="D3" pad="29"/>
<connect gate="A" pin="Q0" pad="17"/>
<connect gate="A" pin="Q1" pad="19"/>
<connect gate="A" pin="Q2" pad="21"/>
<connect gate="A" pin="Q3" pad="23"/>
<connect gate="A" pin="R0" pad="15"/>
<connect gate="A" pin="R1" pad="10"/>
<connect gate="A" pin="R2" pad="1"/>
<connect gate="A" pin="R3" pad="30"/>
<connect gate="A" pin="SET" pad="31"/>
<connect gate="A" pin="VCC" pad="25"/>
<connect gate="A" pin="VCC_2" pad="13"/>
<connect gate="A" pin="VCC_3" pad="16"/>
<connect gate="A" pin="VEE" pad="28"/>
<connect gate="A" pin="VEE_2" pad="9"/>
<connect gate="A" pin="~C0" pad="11"/>
<connect gate="A" pin="~C1" pad="6"/>
<connect gate="A" pin="~C2" pad="2"/>
<connect gate="A" pin="~C3" pad="26"/>
<connect gate="A" pin="~CC" pad="5"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="20"/>
<connect gate="A" pin="~Q2" pad="22"/>
<connect gate="A" pin="~Q3" pad="24"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP131FAG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K3843" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP139DTG" prefix="U">
<description>Clock Generation Chip</description>
<gates>
<gate name="A" symbol="MC100EP139DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="CLK" pad="4"/>
<connect gate="A" pin="DIVSELA" pad="10"/>
<connect gate="A" pin="DIVSELB0" pad="3"/>
<connect gate="A" pin="DIVSELB1" pad="9"/>
<connect gate="A" pin="MR" pad="7"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="17"/>
<connect gate="A" pin="Q2" pad="15"/>
<connect gate="A" pin="Q3" pad="13"/>
<connect gate="A" pin="VBB" pad="6"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="1"/>
<connect gate="A" pin="VCC_3" pad="8"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK" pad="5"/>
<connect gate="A" pin="~EN" pad="2"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="16"/>
<connect gate="A" pin="~Q2" pad="14"/>
<connect gate="A" pin="~Q3" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP139DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1126230" constant="no"/>
<attribute name="OC_NEWARK" value="42K0393" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP140DG" prefix="U">
<description>ECL Phase-Frequency Detector</description>
<gates>
<gate name="A" symbol="MC100EP140DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="4"/>
<connect gate="A" pin="FB" pad="6"/>
<connect gate="A" pin="R" pad="7"/>
<connect gate="A" pin="U" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~U" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP140DG" constant="no"/>
<attribute name="OC_FARNELL" value="1181714" constant="no"/>
<attribute name="OC_NEWARK" value="71J5409" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP142FAG" prefix="U">
<description>3.3 V / 5 V ECL 9-Bit Shift Register</description>
<gates>
<gate name="A" symbol="MC100EP142FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CLK0" pad="4"/>
<connect gate="A" pin="CLK1" pad="6"/>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="31"/>
<connect gate="A" pin="D2" pad="30"/>
<connect gate="A" pin="D3" pad="29"/>
<connect gate="A" pin="D4" pad="27"/>
<connect gate="A" pin="D5" pad="26"/>
<connect gate="A" pin="D6" pad="25"/>
<connect gate="A" pin="D7" pad="24"/>
<connect gate="A" pin="D8" pad="23"/>
<connect gate="A" pin="MR" pad="9"/>
<connect gate="A" pin="Q0" pad="10"/>
<connect gate="A" pin="Q1" pad="11"/>
<connect gate="A" pin="Q2" pad="12"/>
<connect gate="A" pin="Q3" pad="14"/>
<connect gate="A" pin="Q4" pad="15"/>
<connect gate="A" pin="Q5" pad="18"/>
<connect gate="A" pin="Q6" pad="19"/>
<connect gate="A" pin="Q7" pad="20"/>
<connect gate="A" pin="Q8" pad="22"/>
<connect gate="A" pin="S-IN" pad="2"/>
<connect gate="A" pin="SEL" pad="8"/>
<connect gate="A" pin="VCC" pad="32"/>
<connect gate="A" pin="VCC_2" pad="13"/>
<connect gate="A" pin="VCC_3" pad="17"/>
<connect gate="A" pin="VEE" pad="28"/>
<connect gate="A" pin="VEE_2" pad="16"/>
<connect gate="A" pin="~CLK0" pad="5"/>
<connect gate="A" pin="~CLK1" pad="7"/>
<connect gate="A" pin="~Q7" pad="21"/>
<connect gate="A" pin="~S-IN" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP142FAG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K3846" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP14DTG" prefix="U">
<description>Differential ECL/PECL/HSTL Clock Driver</description>
<gates>
<gate name="A" symbol="MC100EP14DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="CLK0" pad="13"/>
<connect gate="A" pin="CLK1" pad="16"/>
<connect gate="A" pin="CLK_SEL" pad="12"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="9"/>
<connect gate="A" pin="VBB" pad="15"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="18"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK0" pad="14"/>
<connect gate="A" pin="~CLK1" pad="17"/>
<connect gate="A" pin="~EN" pad="19"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
<connect gate="A" pin="~Q2" pad="6"/>
<connect gate="A" pin="~Q3" pad="8"/>
<connect gate="A" pin="~Q4" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP14DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607918" constant="no"/>
<attribute name="OC_NEWARK" value="71J5407" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP16DG" prefix="U">
<description>ECL Differential Receiver/Driver</description>
<gates>
<gate name="A" symbol="MC100EP16DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP16DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192075" constant="no"/>
<attribute name="OC_NEWARK" value="26K3847" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP16DTG" prefix="U">
<description>ECL Differential Receiver/Driver</description>
<gates>
<gate name="A" symbol="MC100EP16DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP16DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607763" constant="no"/>
<attribute name="OC_NEWARK" value="71J5410" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP16DTR2G" prefix="U">
<description>Differential Receiver/Driver</description>
<gates>
<gate name="A" symbol="MC100EP16DTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP16DTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1364610" constant="no"/>
<attribute name="OC_NEWARK" value="45J0940" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP195BFAG" prefix="U">
<description>3.3V ECL Programmable Delay Chip</description>
<gates>
<gate name="A" symbol="MC100EP195BFAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CASCADE" pad="15"/>
<connect gate="A" pin="D0" pad="23"/>
<connect gate="A" pin="D1" pad="25"/>
<connect gate="A" pin="D10" pad="3"/>
<connect gate="A" pin="D2" pad="26"/>
<connect gate="A" pin="D3" pad="27"/>
<connect gate="A" pin="D4" pad="29"/>
<connect gate="A" pin="D5" pad="30"/>
<connect gate="A" pin="D6" pad="31"/>
<connect gate="A" pin="D7" pad="32"/>
<connect gate="A" pin="D8" pad="1"/>
<connect gate="A" pin="D9" pad="2"/>
<connect gate="A" pin="IN" pad="4"/>
<connect gate="A" pin="LEN" pad="10"/>
<connect gate="A" pin="NC" pad="17"/>
<connect gate="A" pin="Q" pad="21"/>
<connect gate="A" pin="SETMAX" pad="12"/>
<connect gate="A" pin="SETMIN" pad="11"/>
<connect gate="A" pin="VBB" pad="6"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="13"/>
<connect gate="A" pin="VCC_3" pad="19"/>
<connect gate="A" pin="VCC_4" pad="22"/>
<connect gate="A" pin="VCF" pad="8"/>
<connect gate="A" pin="VEE" pad="28"/>
<connect gate="A" pin="VEE_2" pad="24"/>
<connect gate="A" pin="VEE_3" pad="9"/>
<connect gate="A" pin="VEF" pad="7"/>
<connect gate="A" pin="~CASCADE" pad="14"/>
<connect gate="A" pin="~EN" pad="16"/>
<connect gate="A" pin="~IN" pad="5"/>
<connect gate="A" pin="~Q" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP195BFAG" constant="no"/>
<attribute name="OC_FARNELL" value="1517633" constant="no"/>
<attribute name="OC_NEWARK" value="57M9762" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP195FAG" prefix="U">
<description>3.3V ECL Programmable Delay Chip</description>
<gates>
<gate name="A" symbol="MC100EP195FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CASCADE" pad="15"/>
<connect gate="A" pin="D0" pad="23"/>
<connect gate="A" pin="D1" pad="25"/>
<connect gate="A" pin="D10" pad="3"/>
<connect gate="A" pin="D2" pad="26"/>
<connect gate="A" pin="D3" pad="27"/>
<connect gate="A" pin="D4" pad="29"/>
<connect gate="A" pin="D5" pad="30"/>
<connect gate="A" pin="D6" pad="31"/>
<connect gate="A" pin="D7" pad="32"/>
<connect gate="A" pin="D8" pad="1"/>
<connect gate="A" pin="D9" pad="2"/>
<connect gate="A" pin="IN" pad="4"/>
<connect gate="A" pin="LEN" pad="10"/>
<connect gate="A" pin="NC" pad="17"/>
<connect gate="A" pin="Q" pad="21"/>
<connect gate="A" pin="SETMAX" pad="12"/>
<connect gate="A" pin="SETMIN" pad="11"/>
<connect gate="A" pin="VBB" pad="6"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="22"/>
<connect gate="A" pin="VCC_3" pad="19"/>
<connect gate="A" pin="VCC_4" pad="13"/>
<connect gate="A" pin="VCF" pad="8"/>
<connect gate="A" pin="VEE" pad="24"/>
<connect gate="A" pin="VEE_2" pad="9"/>
<connect gate="A" pin="VEE_3" pad="28"/>
<connect gate="A" pin="VEF" pad="7"/>
<connect gate="A" pin="~CASCADE" pad="14"/>
<connect gate="A" pin="~EN" pad="16"/>
<connect gate="A" pin="~IN" pad="5"/>
<connect gate="A" pin="~Q" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP195FAG" constant="no"/>
<attribute name="OC_FARNELL" value="1607607" constant="no"/>
<attribute name="OC_NEWARK" value="26K3858" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP196FAG" prefix="U">
<description>3.3V ECL Programmable Delay Chip</description>
<gates>
<gate name="A" symbol="MC100EP196FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CASCADE" pad="15"/>
<connect gate="A" pin="D0" pad="23"/>
<connect gate="A" pin="D1" pad="25"/>
<connect gate="A" pin="D10" pad="3"/>
<connect gate="A" pin="D2" pad="26"/>
<connect gate="A" pin="D3" pad="27"/>
<connect gate="A" pin="D4" pad="29"/>
<connect gate="A" pin="D5" pad="30"/>
<connect gate="A" pin="D6" pad="31"/>
<connect gate="A" pin="D7" pad="32"/>
<connect gate="A" pin="D8" pad="1"/>
<connect gate="A" pin="D9" pad="2"/>
<connect gate="A" pin="FTUNE" pad="17"/>
<connect gate="A" pin="IN" pad="4"/>
<connect gate="A" pin="LEN" pad="10"/>
<connect gate="A" pin="Q" pad="21"/>
<connect gate="A" pin="SETMAX" pad="12"/>
<connect gate="A" pin="SETMIN" pad="11"/>
<connect gate="A" pin="VBB" pad="6"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="13"/>
<connect gate="A" pin="VCC_3" pad="19"/>
<connect gate="A" pin="VCC_4" pad="22"/>
<connect gate="A" pin="VCF" pad="8"/>
<connect gate="A" pin="VEE" pad="28"/>
<connect gate="A" pin="VEE_2" pad="24"/>
<connect gate="A" pin="VEE_3" pad="9"/>
<connect gate="A" pin="VEF" pad="7"/>
<connect gate="A" pin="~CASCADE" pad="14"/>
<connect gate="A" pin="~EN" pad="16"/>
<connect gate="A" pin="~IN" pad="5"/>
<connect gate="A" pin="~Q" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP196FAG" constant="no"/>
<attribute name="OC_FARNELL" value="1703312" constant="no"/>
<attribute name="OC_NEWARK" value="88H4711" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP210SFAG" prefix="U">
<description>2.5V 1:5 Dual Differential LVDS Compatible Clock Driver</description>
<gates>
<gate name="A" symbol="MC100EP210SFAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CLKA" pad="3"/>
<connect gate="A" pin="CLKB" pad="6"/>
<connect gate="A" pin="QA0" pad="31"/>
<connect gate="A" pin="QA1" pad="29"/>
<connect gate="A" pin="QA2" pad="27"/>
<connect gate="A" pin="QA3" pad="24"/>
<connect gate="A" pin="QA4" pad="22"/>
<connect gate="A" pin="QB0" pad="20"/>
<connect gate="A" pin="QB1" pad="18"/>
<connect gate="A" pin="QB2" pad="15"/>
<connect gate="A" pin="QB3" pad="13"/>
<connect gate="A" pin="QB4" pad="11"/>
<connect gate="A" pin="VCC" pad="25"/>
<connect gate="A" pin="VCC_2" pad="9"/>
<connect gate="A" pin="VCC_3" pad="16"/>
<connect gate="A" pin="VCC_4" pad="32"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="VEE_2" pad="1"/>
<connect gate="A" pin="VTA" pad="2"/>
<connect gate="A" pin="VTB" pad="5"/>
<connect gate="A" pin="~CLKA" pad="4"/>
<connect gate="A" pin="~CLKB" pad="7"/>
<connect gate="A" pin="~QA0" pad="30"/>
<connect gate="A" pin="~QA1" pad="28"/>
<connect gate="A" pin="~QA2" pad="26"/>
<connect gate="A" pin="~QA3" pad="23"/>
<connect gate="A" pin="~QA4" pad="21"/>
<connect gate="A" pin="~QB0" pad="19"/>
<connect gate="A" pin="~QB1" pad="17"/>
<connect gate="A" pin="~QB2" pad="14"/>
<connect gate="A" pin="~QB3" pad="12"/>
<connect gate="A" pin="~QB4" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP210SFAG" constant="no"/>
<attribute name="OC_FARNELL" value="1260024" constant="no"/>
<attribute name="OC_NEWARK" value="26K3859" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP29DTG" prefix="U">
<description>D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC100EP29DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="CLK0" pad="4"/>
<connect gate="A" pin="CLK1" pad="6"/>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="8"/>
<connect gate="A" pin="Q0" pad="17"/>
<connect gate="A" pin="Q1" pad="15"/>
<connect gate="A" pin="R0" pad="19"/>
<connect gate="A" pin="R1" pad="12"/>
<connect gate="A" pin="S0" pad="18"/>
<connect gate="A" pin="S1" pad="13"/>
<connect gate="A" pin="VBB" pad="3"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="10"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK0" pad="5"/>
<connect gate="A" pin="~CLK1" pad="7"/>
<connect gate="A" pin="~D1" pad="9"/>
<connect gate="A" pin="~DO" pad="2"/>
<connect gate="A" pin="~Q0" pad="16"/>
<connect gate="A" pin="~Q1" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP29DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1126231" constant="no"/>
<attribute name="OC_NEWARK" value="42K0420" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP31DG" prefix="U">
<description>3.3V / 5V ECL D Flip-Flop with Set and Reset</description>
<gates>
<gate name="A" symbol="MC100EP31DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="4"/>
<connect gate="A" pin="SET" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP31DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607711" constant="no"/>
<attribute name="OC_NEWARK" value="26K3860" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP31DTG" prefix="U">
<description>D Flip-Flop with Set and Reset</description>
<gates>
<gate name="A" symbol="MC100EP31DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="4"/>
<connect gate="A" pin="SET" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP31DTG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K3861" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP32DG" prefix="U">
<description>3.3V / 5V ECL /2 Divider</description>
<gates>
<gate name="A" symbol="MC100EP32DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP32DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607663" constant="no"/>
<attribute name="OC_NEWARK" value="42K0424" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP32DTG" prefix="U">
<description>3.3V / 5V ECL 2 Divider</description>
<gates>
<gate name="A" symbol="MC100EP32DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP32DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607664" constant="no"/>
<attribute name="OC_NEWARK" value="45J0943" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP33DTG" prefix="U">
<description>3.3V / 5V ECL 4 Divider</description>
<gates>
<gate name="A" symbol="MC100EP33DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP33DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607919" constant="no"/>
<attribute name="OC_NEWARK" value="45J0945" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP40DTG" prefix="U">
<description>Differential Phase-Frequency Detector</description>
<gates>
<gate name="A" symbol="MC100EP40DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="D" pad="17"/>
<connect gate="A" pin="FB" pad="4"/>
<connect gate="A" pin="NC" pad="12"/>
<connect gate="A" pin="PLD" pad="19"/>
<connect gate="A" pin="R" pad="6"/>
<connect gate="A" pin="U" pad="15"/>
<connect gate="A" pin="VBB" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="13"/>
<connect gate="A" pin="VCC_3" pad="18"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="VEE_2" pad="11"/>
<connect gate="A" pin="VTFB" pad="2"/>
<connect gate="A" pin="VTR" pad="8"/>
<connect gate="A" pin="~D" pad="16"/>
<connect gate="A" pin="~FB" pad="5"/>
<connect gate="A" pin="~R" pad="7"/>
<connect gate="A" pin="~U" pad="14"/>
<connect gate="A" pin="~VTFB" pad="3"/>
<connect gate="A" pin="~VTR" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP40DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1611370" constant="no"/>
<attribute name="OC_NEWARK" value="42K0429" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP445FAG" prefix="U">
<description>ECL 8-Bit Serial/Parallel Converter</description>
<gates>
<gate name="A" symbol="MC100EP445FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CKSEL" pad="7"/>
<connect gate="A" pin="CLK" pad="4"/>
<connect gate="A" pin="PCLK" pad="22"/>
<connect gate="A" pin="Q0" pad="21"/>
<connect gate="A" pin="Q1" pad="19"/>
<connect gate="A" pin="Q2" pad="18"/>
<connect gate="A" pin="Q3" pad="15"/>
<connect gate="A" pin="Q4" pad="14"/>
<connect gate="A" pin="Q5" pad="11"/>
<connect gate="A" pin="Q6" pad="10"/>
<connect gate="A" pin="Q7" pad="9"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="SINA" pad="31"/>
<connect gate="A" pin="SINB" pad="26"/>
<connect gate="A" pin="SINSEL" pad="25"/>
<connect gate="A" pin="SYNC" pad="2"/>
<connect gate="A" pin="VBB0" pad="29"/>
<connect gate="A" pin="VBB1" pad="6"/>
<connect gate="A" pin="VCC" pad="17"/>
<connect gate="A" pin="VCC_2" pad="8"/>
<connect gate="A" pin="VCC_3" pad="12"/>
<connect gate="A" pin="VCC_4" pad="20"/>
<connect gate="A" pin="VCC_5" pad="32"/>
<connect gate="A" pin="VCC_6" pad="13"/>
<connect gate="A" pin="VCC_7" pad="24"/>
<connect gate="A" pin="VEE" pad="16"/>
<connect gate="A" pin="VEE_2" pad="28"/>
<connect gate="A" pin="~CKEN" pad="3"/>
<connect gate="A" pin="~CLK" pad="5"/>
<connect gate="A" pin="~PCLK" pad="23"/>
<connect gate="A" pin="~SINA" pad="30"/>
<connect gate="A" pin="~SINB" pad="27"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP445FAG" constant="no"/>
<attribute name="OC_FARNELL" value="1260025" constant="no"/>
<attribute name="OC_NEWARK" value="26K3865" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP446FAG" prefix="U">
<description>IC CONV 8BIT SER/PAR ECL</description>
<gates>
<gate name="A" symbol="MC100EP446FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CKEN" pad="7"/>
<connect gate="A" pin="CKSEL" pad="2"/>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D0" pad="24"/>
<connect gate="A" pin="D1" pad="23"/>
<connect gate="A" pin="D2" pad="22"/>
<connect gate="A" pin="D3" pad="21"/>
<connect gate="A" pin="D4" pad="20"/>
<connect gate="A" pin="D5" pad="19"/>
<connect gate="A" pin="D6" pad="18"/>
<connect gate="A" pin="D7" pad="17"/>
<connect gate="A" pin="PCLK" pad="15"/>
<connect gate="A" pin="SOUT" pad="12"/>
<connect gate="A" pin="SYNC" pad="29"/>
<connect gate="A" pin="VBB1" pad="5"/>
<connect gate="A" pin="VBB2" pad="31"/>
<connect gate="A" pin="VCC" pad="10"/>
<connect gate="A" pin="VCC_2" pad="32"/>
<connect gate="A" pin="VCC_3" pad="13"/>
<connect gate="A" pin="VCC_4" pad="9"/>
<connect gate="A" pin="VCC_5" pad="25"/>
<connect gate="A" pin="VCC_6" pad="1"/>
<connect gate="A" pin="VCF" pad="26"/>
<connect gate="A" pin="VEE" pad="16"/>
<connect gate="A" pin="VEE_2" pad="8"/>
<connect gate="A" pin="VEE_3" pad="28"/>
<connect gate="A" pin="VEF" pad="27"/>
<connect gate="A" pin="~CKEN" pad="6"/>
<connect gate="A" pin="~CLK" pad="4"/>
<connect gate="A" pin="~PCLK" pad="14"/>
<connect gate="A" pin="~SOUT" pad="11"/>
<connect gate="A" pin="~SYNC" pad="30"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP446FAG" constant="no"/>
<attribute name="OC_FARNELL" value="1703314" constant="no"/>
<attribute name="OC_NEWARK" value="26K3867" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP451FAG" prefix="U">
<description>3.3V / 5V ECL 6-Bit Differential Register</description>
<gates>
<gate name="A" symbol="MC100EP451FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CLK" pad="4"/>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="32"/>
<connect gate="A" pin="D2" pad="30"/>
<connect gate="A" pin="D3" pad="26"/>
<connect gate="A" pin="D4" pad="24"/>
<connect gate="A" pin="D5" pad="22"/>
<connect gate="A" pin="MR" pad="29"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q2" pad="11"/>
<connect gate="A" pin="Q3" pad="14"/>
<connect gate="A" pin="Q4" pad="17"/>
<connect gate="A" pin="Q5" pad="20"/>
<connect gate="A" pin="VCC" pad="6"/>
<connect gate="A" pin="VCC_2" pad="16"/>
<connect gate="A" pin="VCC_3" pad="13"/>
<connect gate="A" pin="VEE" pad="28"/>
<connect gate="A" pin="VEE_2" pad="19"/>
<connect gate="A" pin="~CLK" pad="5"/>
<connect gate="A" pin="~D0" pad="3"/>
<connect gate="A" pin="~D1" pad="1"/>
<connect gate="A" pin="~D2" pad="31"/>
<connect gate="A" pin="~D3" pad="27"/>
<connect gate="A" pin="~D4" pad="25"/>
<connect gate="A" pin="~D5" pad="23"/>
<connect gate="A" pin="~Q0" pad="8"/>
<connect gate="A" pin="~Q1" pad="10"/>
<connect gate="A" pin="~Q2" pad="12"/>
<connect gate="A" pin="~Q3" pad="15"/>
<connect gate="A" pin="~Q4" pad="18"/>
<connect gate="A" pin="~Q5" pad="21"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP451FAG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J0946" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP51DG" prefix="U">
<description>3.3V / 5V ECL D Flip-Flop with Reset and Differential Clock</description>
<gates>
<gate name="A" symbol="MC100EP51DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP51DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607712" constant="no"/>
<attribute name="OC_NEWARK" value="42K0433" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP51DTG" prefix="U">
<description>3.3V / 5V ECL D Flip-Flop with Reset and Differential  Clock</description>
<gates>
<gate name="A" symbol="MC100EP51DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP51DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1354361" constant="no"/>
<attribute name="OC_NEWARK" value="71J5411" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP56DTG" prefix="U">
<description>2:1 Multiplexer</description>
<gates>
<gate name="A" symbol="MC100EP56DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="COM_SEL" pad="16"/>
<connect gate="A" pin="D0A" pad="1"/>
<connect gate="A" pin="D0B" pad="4"/>
<connect gate="A" pin="D1A" pad="6"/>
<connect gate="A" pin="D1B" pad="9"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="13"/>
<connect gate="A" pin="SEL0" pad="17"/>
<connect gate="A" pin="SEL1" pad="15"/>
<connect gate="A" pin="VBB0" pad="3"/>
<connect gate="A" pin="VBB1" pad="8"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="14"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~D0A" pad="2"/>
<connect gate="A" pin="~D0B" pad="5"/>
<connect gate="A" pin="~D1A" pad="7"/>
<connect gate="A" pin="~D1B" pad="10"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP56DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607687" constant="no"/>
<attribute name="OC_NEWARK" value="42K0438" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP56DWG" prefix="U">
<description>3.3V / 5V ECL Dual Differential 2:1 Multiplexer</description>
<gates>
<gate name="A" symbol="MC100EP56DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="COM_SEL" pad="16"/>
<connect gate="A" pin="D0A" pad="1"/>
<connect gate="A" pin="D0B" pad="4"/>
<connect gate="A" pin="D1A" pad="6"/>
<connect gate="A" pin="D1B" pad="9"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="13"/>
<connect gate="A" pin="SEL0" pad="17"/>
<connect gate="A" pin="SEL1" pad="15"/>
<connect gate="A" pin="VBB1" pad="8"/>
<connect gate="A" pin="VBBO" pad="3"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="VCC_2" pad="20"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~D0A" pad="2"/>
<connect gate="A" pin="~D0B" pad="5"/>
<connect gate="A" pin="~D1A" pad="7"/>
<connect gate="A" pin="~D1B" pad="10"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP56DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607688" constant="no"/>
<attribute name="OC_NEWARK" value="26K3870" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP57DTG" prefix="U">
<description>ECL 4:1 Differential Multiplexer</description>
<gates>
<gate name="A" symbol="MC100EP57DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="6"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="Q" pad="16"/>
<connect gate="A" pin="SEL0" pad="18"/>
<connect gate="A" pin="SEL1" pad="19"/>
<connect gate="A" pin="VBB1" pad="13"/>
<connect gate="A" pin="VBB2" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="1"/>
<connect gate="A" pin="VCC_3" pad="14"/>
<connect gate="A" pin="VCC_4" pad="17"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="VEE_2" pad="10"/>
<connect gate="A" pin="~D0" pad="3"/>
<connect gate="A" pin="~D1" pad="5"/>
<connect gate="A" pin="~D2" pad="7"/>
<connect gate="A" pin="~D3" pad="9"/>
<connect gate="A" pin="~Q" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP57DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1468710" constant="no"/>
<attribute name="OC_NEWARK" value="71J5412" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP58DG" prefix="U">
<description>3.3V / 5V ECL 2:1 Multiplexer</description>
<gates>
<gate name="A" symbol="MC100EP58DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="DA" pad="2"/>
<connect gate="A" pin="DB" pad="3"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="SEL" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP58DG" constant="no"/>
<attribute name="OC_FARNELL" value="1150414" constant="no"/>
<attribute name="OC_NEWARK" value="45J0947" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EP58DTG" prefix="U">
<description>3.3V / 5V ECL 2:1 Multiplexer</description>
<gates>
<gate name="A" symbol="MC100EP58DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="DA" pad="2"/>
<connect gate="A" pin="DB" pad="3"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="SEL" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EP58DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1150415" constant="no"/>
<attribute name="OC_NEWARK" value="45J0949" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT20DG" prefix="U">
<description>3.3V LVTTL/LVCMOS to Differential LVPECL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT20DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="6"/>
<connect gate="A" pin="Q" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT20DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607865" constant="no"/>
<attribute name="OC_NEWARK" value="45J0921" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT20DTG" prefix="U">
<description>TTL-CMOS-Differential-ECL-Translator</description>
<gates>
<gate name="A" symbol="MC100EPT20DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="4"/>
<connect gate="A" pin="Q" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="" constant="no"/>
<attribute name="OC_FARNELL" value="" constant="no"/>
<attribute name="OC_NEWARK" value="" constant="no"/>
<attribute name="PACKAGE" value="" constant="no"/>
<attribute name="SUPPLIER" value="" constant="no"/>
</technology>
<technology name="TTL-CMOS-DIFFERENTIAL-ECL-TRANSLATOR">
<attribute name="MPN" value="MC100EPT20DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1192076" constant="no"/>
<attribute name="OC_NEWARK" value="45J0922" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT22DG" prefix="U">
<description>3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT22DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="7"/>
<connect gate="A" pin="D1" pad="6"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT22DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607867" constant="no"/>
<attribute name="OC_NEWARK" value="45J0924" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT22DTG" prefix="U">
<description>LVTTL/LVCMOS to Differential LVPECL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT22DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="7"/>
<connect gate="A" pin="D1" pad="6"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT22DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1192078" constant="no"/>
<attribute name="OC_NEWARK" value="45J0926" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT24DG" prefix="U">
<description>3.3V LVTTL/LVCMOS to Differential LVECL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT24DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT24DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607871" constant="no"/>
<attribute name="OC_NEWARK" value="45J0731" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT24DTG" prefix="U">
<description>LVTTL/LVCMOS to Differential LVECL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT24DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT24DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607872" constant="no"/>
<attribute name="OC_NEWARK" value="45J0932" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT25DG" prefix="U">
<description>-3.3V / -5V Differential ECL to +3.3V LVTTL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT25DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT25DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607873" constant="no"/>
<attribute name="OC_NEWARK" value="45J0933" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT25DTG" prefix="U">
<description>Differential ECL to +3.3V LVTTL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT25DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT25DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1192079" constant="no"/>
<attribute name="OC_NEWARK" value="45J0934" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT26DG" prefix="U">
<description>3.3V 1:2 Fanout Differentia LVPECL/LVDS to LVTTL Translator</description>
<gates>
<gate name="A" symbol="MC100EPT26DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT26DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607874" constant="no"/>
<attribute name="OC_NEWARK" value="42K0377" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100EPT26DTG" prefix="U">
<description>3.3V 1:2 Fanout Differential LVPECL/LVDS to LVTTL  Translator</description>
<gates>
<gate name="A" symbol="MC100EPT26DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100EPT26DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1209363" constant="no"/>
<attribute name="OC_NEWARK" value="26K3838" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL11DG" prefix="U">
<description>2.5V / 3.3V ECL 1:2 Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100LVEL11DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL11DG" constant="no"/>
<attribute name="OC_FARNELL" value="1142207" constant="no"/>
<attribute name="OC_NEWARK" value="71J5430" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL11DR2G" prefix="U">
<description>1:2 Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100LVEL11DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL11DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J0990" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL11DTG" prefix="U">
<description>Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100LVEL11DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL11DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1364053" constant="no"/>
<attribute name="OC_NEWARK" value="26K3898" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL14DWG" prefix="U">
<description>3.3V ECL 1:5 Clock Distribution Chip</description>
<gates>
<gate name="A" symbol="MC100LVEL14DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CLK" pad="15"/>
<connect gate="A" pin="NC" pad="17"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="9"/>
<connect gate="A" pin="SCLK" pad="16"/>
<connect gate="A" pin="SEL" pad="12"/>
<connect gate="A" pin="VBB" pad="13"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="20"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK" pad="14"/>
<connect gate="A" pin="~EN" pad="19"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
<connect gate="A" pin="~Q2" pad="6"/>
<connect gate="A" pin="~Q3" pad="8"/>
<connect gate="A" pin="~Q4" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL14DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1192080" constant="no"/>
<attribute name="OC_NEWARK" value="98H0640" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL16DG" prefix="U">
<description>3.3V ECL Differential Receiver</description>
<gates>
<gate name="A" symbol="MC100LVEL16DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL16DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192081" constant="no"/>
<attribute name="OC_NEWARK" value="98H0642" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL16DTG" prefix="U">
<description>ECL Differential Receiver</description>
<gates>
<gate name="A" symbol="MC100LVEL16DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL16DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607608" constant="no"/>
<attribute name="OC_NEWARK" value="26K3900" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL29DWG" prefix="U">
<description>D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC100LVEL29DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CLK0" pad="3"/>
<connect gate="A" pin="CLK1" pad="8"/>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="6"/>
<connect gate="A" pin="Q0" pad="18"/>
<connect gate="A" pin="Q1" pad="13"/>
<connect gate="A" pin="R0" pad="20"/>
<connect gate="A" pin="R1" pad="10"/>
<connect gate="A" pin="S0" pad="16"/>
<connect gate="A" pin="S1" pad="15"/>
<connect gate="A" pin="VBB" pad="5"/>
<connect gate="A" pin="VCC" pad="19"/>
<connect gate="A" pin="VCC_2" pad="14"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK0" pad="4"/>
<connect gate="A" pin="~CLK1" pad="9"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="7"/>
<connect gate="A" pin="~Q0" pad="17"/>
<connect gate="A" pin="~Q1" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL29DWG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="98H0645" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL51DG" prefix="U">
<description>3.3V ECL Differential Clock D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC100LVEL51DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="R" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL51DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K3911" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL90DWG" prefix="U">
<description>Output Translator</description>
<gates>
<gate name="A" symbol="MC100LVEL90DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="5"/>
<connect gate="A" pin="D2" pad="8"/>
<connect gate="A" pin="ECLVBB" pad="7"/>
<connect gate="A" pin="ECLVBB_2" pad="4"/>
<connect gate="A" pin="GND" pad="17"/>
<connect gate="A" pin="GND_2" pad="14"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q0_2" pad="18"/>
<connect gate="A" pin="Q1" pad="15"/>
<connect gate="A" pin="Q1_2" pad="16"/>
<connect gate="A" pin="Q2" pad="12"/>
<connect gate="A" pin="Q2_2" pad="13"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="1"/>
<connect gate="A" pin="VCC_3" pad="11"/>
<connect gate="A" pin="VEE" pad="10"/>
<connect gate="A" pin="~D0" pad="3"/>
<connect gate="A" pin="~D1" pad="6"/>
<connect gate="A" pin="~D2" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL90DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607875" constant="no"/>
<attribute name="OC_NEWARK" value="26K3916" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL91DWG" prefix="U">
<description>Output Translator</description>
<gates>
<gate name="A" symbol="MC100LVEL91DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="5"/>
<connect gate="A" pin="D2" pad="8"/>
<connect gate="A" pin="GND" pad="17"/>
<connect gate="A" pin="GND_2" pad="14"/>
<connect gate="A" pin="PECLVBB" pad="4"/>
<connect gate="A" pin="PECLVBB_2" pad="7"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="16"/>
<connect gate="A" pin="Q2" pad="13"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="1"/>
<connect gate="A" pin="VCC_3" pad="11"/>
<connect gate="A" pin="VEE" pad="10"/>
<connect gate="A" pin="~D0" pad="3"/>
<connect gate="A" pin="~D1" pad="6"/>
<connect gate="A" pin="~D2" pad="9"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="15"/>
<connect gate="A" pin="~Q2" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL91DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1468712" constant="no"/>
<attribute name="OC_NEWARK" value="26K3918" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEL92DWG" prefix="U">
<description>5V Triple PECL Input to LVPECL Output Translator</description>
<gates>
<gate name="A" symbol="MC100LVEL92DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="5"/>
<connect gate="A" pin="D2" pad="8"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="LVCC" pad="14"/>
<connect gate="A" pin="LVCC_2" pad="17"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="16"/>
<connect gate="A" pin="Q2" pad="13"/>
<connect gate="A" pin="VBB_PECL" pad="4"/>
<connect gate="A" pin="VBB_PECL_2" pad="7"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="1"/>
<connect gate="A" pin="VCC_3" pad="11"/>
<connect gate="A" pin="~D0" pad="3"/>
<connect gate="A" pin="~D1" pad="6"/>
<connect gate="A" pin="~D2" pad="9"/>
<connect gate="A" pin="~Q0" pad="18"/>
<connect gate="A" pin="~Q1" pad="15"/>
<connect gate="A" pin="~Q2" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEL92DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1155551" constant="no"/>
<attribute name="OC_NEWARK" value="71J5440" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVELT22DG" prefix="U">
<description>3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator</description>
<gates>
<gate name="A" symbol="MC100LVELT22DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="7"/>
<connect gate="A" pin="D1" pad="6"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVELT22DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468713" constant="no"/>
<attribute name="OC_NEWARK" value="45J0984" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVELT22DTG" prefix="U">
<description>Dual Differential LVPECL/LVDS to LVTTL Translator</description>
<gates>
<gate name="A" symbol="MC100LVELT22DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="7"/>
<connect gate="A" pin="D1" pad="6"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVELT22DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1150428" constant="no"/>
<attribute name="OC_NEWARK" value="45J0986" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVELT23DTG" prefix="U">
<description>Dual Differential LVPECL/LVDS to LVTTL Translator</description>
<gates>
<gate name="A" symbol="MC100LVELT23DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVELT23DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1258374" constant="no"/>
<attribute name="OC_NEWARK" value="42K0472" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEP111FAG" prefix="U">
<description>Differential ECL/PECL/HSTL Clock Driver</description>
<gates>
<gate name="A" symbol="MC100LVEP111FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CLK0" pad="3"/>
<connect gate="A" pin="CLK1" pad="6"/>
<connect gate="A" pin="CLK_SEL" pad="2"/>
<connect gate="A" pin="Q0" pad="31"/>
<connect gate="A" pin="Q1" pad="29"/>
<connect gate="A" pin="Q2" pad="27"/>
<connect gate="A" pin="Q3" pad="24"/>
<connect gate="A" pin="Q4" pad="22"/>
<connect gate="A" pin="Q5" pad="20"/>
<connect gate="A" pin="Q6" pad="18"/>
<connect gate="A" pin="Q7" pad="15"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="11"/>
<connect gate="A" pin="VBB" pad="5"/>
<connect gate="A" pin="VCC" pad="9"/>
<connect gate="A" pin="VCC_2" pad="32"/>
<connect gate="A" pin="VCC_3" pad="1"/>
<connect gate="A" pin="VCC_4" pad="25"/>
<connect gate="A" pin="VCC_5" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~CLK0" pad="4"/>
<connect gate="A" pin="~CLK1" pad="7"/>
<connect gate="A" pin="~Q0" pad="30"/>
<connect gate="A" pin="~Q1" pad="28"/>
<connect gate="A" pin="~Q2" pad="26"/>
<connect gate="A" pin="~Q3" pad="23"/>
<connect gate="A" pin="~Q4" pad="21"/>
<connect gate="A" pin="~Q5" pad="19"/>
<connect gate="A" pin="~Q6" pad="17"/>
<connect gate="A" pin="~Q7" pad="14"/>
<connect gate="A" pin="~Q8" pad="12"/>
<connect gate="A" pin="~Q9" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEP111FAG" constant="no"/>
<attribute name="OC_FARNELL" value="1607921" constant="no"/>
<attribute name="OC_NEWARK" value="98H0648" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEP11DG" prefix="U">
<description>2.5V / 3.3V ECL 1:2 Differential Fanout Buffer</description>
<gates>
<gate name="A" symbol="MC100LVEP11DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEP11DG" constant="no"/>
<attribute name="OC_FARNELL" value="1199235" constant="no"/>
<attribute name="OC_NEWARK" value="26K3919" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEP11DTG" prefix="U">
<description>Buffer</description>
<gates>
<gate name="A" symbol="MC100LVEP11DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEP11DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1155552" constant="no"/>
<attribute name="OC_NEWARK" value="71J5441" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEP14DTG" prefix="U">
<description>Differential ECL/PECL/HSTL Clock Driver</description>
<gates>
<gate name="A" symbol="MC100LVEP14DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="CLK0" pad="13"/>
<connect gate="A" pin="CLK1" pad="16"/>
<connect gate="A" pin="CLK_SEL" pad="12"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="9"/>
<connect gate="A" pin="VBB" pad="15"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VCC_2" pad="18"/>
<connect gate="A" pin="VEE" pad="11"/>
<connect gate="A" pin="~CLK0" pad="14"/>
<connect gate="A" pin="~CLK1" pad="17"/>
<connect gate="A" pin="~EN" pad="19"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
<connect gate="A" pin="~Q2" pad="6"/>
<connect gate="A" pin="~Q3" pad="8"/>
<connect gate="A" pin="~Q4" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEP14DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1468715" constant="no"/>
<attribute name="OC_NEWARK" value="42K0489" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC100LVEP16DTG" prefix="U">
<description>ECL Differential Receiver/Driver</description>
<gates>
<gate name="A" symbol="MC100LVEP16DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC100LVEP16DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607609" constant="no"/>
<attribute name="OC_NEWARK" value="71J5443" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10E016FNG" prefix="U">
<description>Synchronous Binary Up Counter</description>
<gates>
<gate name="A" symbol="MC10E016FNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="PLCC127P1257X1257X457-28N">
<connects>
<connect gate="A" pin="CLK" pad="27"/>
<connect gate="A" pin="MR" pad="26"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="P0" pad="3"/>
<connect gate="A" pin="P1" pad="4"/>
<connect gate="A" pin="P2" pad="5"/>
<connect gate="A" pin="P3" pad="6"/>
<connect gate="A" pin="P4" pad="7"/>
<connect gate="A" pin="P5" pad="21"/>
<connect gate="A" pin="P6" pad="22"/>
<connect gate="A" pin="P7" pad="23"/>
<connect gate="A" pin="Q0" pad="9"/>
<connect gate="A" pin="Q1" pad="10"/>
<connect gate="A" pin="Q2" pad="11"/>
<connect gate="A" pin="Q3" pad="12"/>
<connect gate="A" pin="Q4" pad="13"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="17"/>
<connect gate="A" pin="Q7" pad="18"/>
<connect gate="A" pin="TCLD" pad="28"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VCCO" pad="20"/>
<connect gate="A" pin="VCCO_2" pad="8"/>
<connect gate="A" pin="VCCO_3" pad="14"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~CE" pad="24"/>
<connect gate="A" pin="~PE" pad="25"/>
<connect gate="A" pin="~TC" pad="19"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10E016FNG" constant="no"/>
<attribute name="OC_FARNELL" value="1468717" constant="no"/>
<attribute name="OC_NEWARK" value="26K3738" constant="no"/>
<attribute name="PACKAGE" value="PLCC-28" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EL01DG" prefix="U">
<description>5V ECL 4-Input OR/NOR</description>
<gates>
<gate name="A" symbol="MC10EL01DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="D2" pad="3"/>
<connect gate="A" pin="D3" pad="4"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EL01DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468718" constant="no"/>
<attribute name="OC_NEWARK" value="45J0833" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EL04DG" prefix="U">
<description>5V ECL 2-Input AND/NAND</description>
<gates>
<gate name="A" symbol="MC10EL04DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EL04DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468719" constant="no"/>
<attribute name="OC_NEWARK" value="98H0612" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EL16DG" prefix="U">
<description>5.0 V ECL Differential Receiver</description>
<gates>
<gate name="A" symbol="MC10EL16DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EL16DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607876" constant="no"/>
<attribute name="OC_NEWARK" value="71J5370" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EL16DR2G" prefix="U">
<description>5.0 V ECL Differential Receiver</description>
<gates>
<gate name="A" symbol="MC10EL16DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EL16DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1607877" constant="no"/>
<attribute name="OC_NEWARK" value="83H7289" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EL31DG" prefix="U">
<description>5 V ECL D Flip-Flop With Set and Reset</description>
<gates>
<gate name="A" symbol="MC10EL31DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="R" pad="4"/>
<connect gate="A" pin="S" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EL31DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607713" constant="no"/>
<attribute name="OC_NEWARK" value="98H0615" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EL89DG" prefix="U">
<description>5V ECL Coaxial Cable Driver</description>
<gates>
<gate name="A" symbol="MC10EL89DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EL89DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192083" constant="no"/>
<attribute name="OC_NEWARK" value="45J0841" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT20DG" prefix="U">
<description>5V TTL to Differential PECL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT20DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="NC_3" pad="4"/>
<connect gate="A" pin="Q" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT20DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607878" constant="no"/>
<attribute name="OC_NEWARK" value="88H4693" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT21DG" prefix="U">
<description>5 V Differential PECL to TTL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT21DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D0" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT21DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607879" constant="no"/>
<attribute name="OC_NEWARK" value="98H0610" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT22DG" prefix="U">
<description>5.0 V Dual TTL to Differential PECL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT22DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="7"/>
<connect gate="A" pin="D1" pad="6"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT22DG" constant="no"/>
<attribute name="OC_FARNELL" value="1155782" constant="no"/>
<attribute name="OC_NEWARK" value="98H0611" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT24DG" prefix="U">
<description>5V TTL to Differential ECL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT24DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NC_2" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT24DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607880" constant="no"/>
<attribute name="OC_NEWARK" value="88H4695" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT25DG" prefix="U">
<description>-5 V Differential ECL to TTL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT25DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT25DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607882" constant="no"/>
<attribute name="OC_NEWARK" value="88H4696" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT25DTG" prefix="U">
<description>ECL to TTL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT25DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="1"/>
<connect gate="A" pin="~D" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT25DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1147688" constant="no"/>
<attribute name="OC_NEWARK" value="42K0043" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10ELT28DG" prefix="U">
<description>5 V TTL to Differential PECL and Differential PECL to TTL Translator</description>
<gates>
<gate name="A" symbol="MC10ELT28DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="DECL" pad="1"/>
<connect gate="A" pin="DTTL" pad="6"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="QECL" pad="3"/>
<connect gate="A" pin="QTTL" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~DECL" pad="2"/>
<connect gate="A" pin="~QECL" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10ELT28DG" constant="no"/>
<attribute name="OC_FARNELL" value="1263934" constant="no"/>
<attribute name="OC_NEWARK" value="26K3714" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EP05DG" prefix="U">
<description>3.3V / 5V ECL 2-Input Differential AND/NAND</description>
<gates>
<gate name="A" symbol="MC10EP05DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="4"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EP05DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607764" constant="no"/>
<attribute name="OC_NEWARK" value="45J0843" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EP16DG" prefix="U">
<description>ECL Differential Receiver/Driver</description>
<gates>
<gate name="A" symbol="MC10EP16DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EP16DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607766" constant="no"/>
<attribute name="OC_NEWARK" value="45J0847" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EP16DTG" prefix="U">
<description>Differential Receiver/Driver</description>
<gates>
<gate name="A" symbol="MC10EP16DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EP16DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1611398" constant="no"/>
<attribute name="OC_NEWARK" value="26K3728" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EP195FAG" prefix="U">
<description>3.3V ECL Programmable Delay Chip</description>
<gates>
<gate name="A" symbol="MC10EP195FAG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFP80P900X900X160-32N">
<connects>
<connect gate="A" pin="CASCADE" pad="15"/>
<connect gate="A" pin="D0" pad="23"/>
<connect gate="A" pin="D1" pad="25"/>
<connect gate="A" pin="D10" pad="3"/>
<connect gate="A" pin="D2" pad="26"/>
<connect gate="A" pin="D3" pad="27"/>
<connect gate="A" pin="D4" pad="29"/>
<connect gate="A" pin="D5" pad="30"/>
<connect gate="A" pin="D6" pad="31"/>
<connect gate="A" pin="D7" pad="32"/>
<connect gate="A" pin="D8" pad="1"/>
<connect gate="A" pin="D9" pad="2"/>
<connect gate="A" pin="IN" pad="4"/>
<connect gate="A" pin="LEN" pad="10"/>
<connect gate="A" pin="NC" pad="17"/>
<connect gate="A" pin="Q" pad="21"/>
<connect gate="A" pin="SETMAX" pad="12"/>
<connect gate="A" pin="SETMIN" pad="11"/>
<connect gate="A" pin="VBB" pad="6"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="22"/>
<connect gate="A" pin="VCC_3" pad="19"/>
<connect gate="A" pin="VCC_4" pad="13"/>
<connect gate="A" pin="VCF" pad="8"/>
<connect gate="A" pin="VEE" pad="28"/>
<connect gate="A" pin="VEE_2" pad="9"/>
<connect gate="A" pin="VEE_3" pad="24"/>
<connect gate="A" pin="VEF" pad="7"/>
<connect gate="A" pin="~CASCADE" pad="14"/>
<connect gate="A" pin="~EN" pad="16"/>
<connect gate="A" pin="~IN" pad="5"/>
<connect gate="A" pin="~Q" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EP195FAG" constant="no"/>
<attribute name="OC_FARNELL" value="1258225" constant="no"/>
<attribute name="OC_NEWARK" value="26K3730" constant="no"/>
<attribute name="PACKAGE" value="LQFP-32" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EP31DG" prefix="U">
<description>3.3V / 5V ECL D Flip-Flop with Set and Reset</description>
<gates>
<gate name="A" symbol="MC10EP31DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="4"/>
<connect gate="A" pin="SET" pad="1"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EP31DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J0849" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10EP32DTG" prefix="U">
<description>ECL by 2 Divider</description>
<gates>
<gate name="A" symbol="MC10EP32DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="Q" pad="7"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VBB" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~CLK" pad="3"/>
<connect gate="A" pin="~Q" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10EP32DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1258226" constant="no"/>
<attribute name="OC_NEWARK" value="26K3732" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H101PG" prefix="U">
<description>Quad OR/NOR Gate</description>
<gates>
<gate name="A" symbol="MC10H101PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="4"/>
<connect gate="A" pin="AOUT" pad="5"/>
<connect gate="A" pin="BIN" pad="7"/>
<connect gate="A" pin="BOUT" pad="6"/>
<connect gate="A" pin="CIN" pad="10"/>
<connect gate="A" pin="COM_IN" pad="12"/>
<connect gate="A" pin="COUT" pad="11"/>
<connect gate="A" pin="DIN" pad="13"/>
<connect gate="A" pin="DOUT" pad="9"/>
<connect gate="A" pin="VCC1" pad="1"/>
<connect gate="A" pin="VCC2" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~AOUT" pad="2"/>
<connect gate="A" pin="~BOUT" pad="3"/>
<connect gate="A" pin="~COUT" pad="14"/>
<connect gate="A" pin="~DOUT" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H101PG" constant="no"/>
<attribute name="OC_FARNELL" value="1354350" constant="no"/>
<attribute name="OC_NEWARK" value="45J0861" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H102PG" prefix="U">
<description>Quad 2-Input NOR Gate</description>
<gates>
<gate name="A" symbol="MC10H102PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="4"/>
<connect gate="A" pin="AIN_2" pad="5"/>
<connect gate="A" pin="BIN" pad="7"/>
<connect gate="A" pin="BIN_2" pad="6"/>
<connect gate="A" pin="CIN" pad="10"/>
<connect gate="A" pin="CIN_2" pad="11"/>
<connect gate="A" pin="DIN" pad="12"/>
<connect gate="A" pin="DIN_2" pad="13"/>
<connect gate="A" pin="DOUT" pad="9"/>
<connect gate="A" pin="VCC1" pad="1"/>
<connect gate="A" pin="VCC2" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~AOUT" pad="2"/>
<connect gate="A" pin="~BOUT" pad="3"/>
<connect gate="A" pin="~COUT" pad="14"/>
<connect gate="A" pin="~DOUT" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H102PG" constant="no"/>
<attribute name="OC_FARNELL" value="1354351" constant="no"/>
<attribute name="OC_NEWARK" value="45J0862" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H105PG" prefix="U">
<description>Triple 2-3-2-Input OR/NOR Gate</description>
<gates>
<gate name="A" symbol="MC10H105PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="4"/>
<connect gate="A" pin="AIN_2" pad="5"/>
<connect gate="A" pin="AOUT" pad="2"/>
<connect gate="A" pin="BIN" pad="10"/>
<connect gate="A" pin="BIN_2" pad="9"/>
<connect gate="A" pin="BIN_3" pad="11"/>
<connect gate="A" pin="BOUT" pad="7"/>
<connect gate="A" pin="BOUT_2" pad="6"/>
<connect gate="A" pin="CIN" pad="12"/>
<connect gate="A" pin="CIN_2" pad="13"/>
<connect gate="A" pin="COUT" pad="15"/>
<connect gate="A" pin="VCC1" pad="1"/>
<connect gate="A" pin="VCC2" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~AOUT" pad="3"/>
<connect gate="A" pin="~COUT" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H105PG" constant="no"/>
<attribute name="OC_FARNELL" value="1147790" constant="no"/>
<attribute name="OC_NEWARK" value="45J0866" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H116DG" prefix="U">
<description>Triple Line Receiver</description>
<gates>
<gate name="A" symbol="MC10H116DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="AIN" pad="5"/>
<connect gate="A" pin="AOUT" pad="3"/>
<connect gate="A" pin="BIN" pad="10"/>
<connect gate="A" pin="BOUT" pad="7"/>
<connect gate="A" pin="CIN" pad="13"/>
<connect gate="A" pin="COUT" pad="15"/>
<connect gate="A" pin="VBB" pad="11"/>
<connect gate="A" pin="VCC1" pad="1"/>
<connect gate="A" pin="VCC2" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~AIN" pad="4"/>
<connect gate="A" pin="~AOUT" pad="2"/>
<connect gate="A" pin="~BIN" pad="9"/>
<connect gate="A" pin="~BOUT" pad="6"/>
<connect gate="A" pin="~CIN" pad="12"/>
<connect gate="A" pin="~COUT" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H116DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607610" constant="no"/>
<attribute name="OC_NEWARK" value="26K3776" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H124PG" prefix="U">
<description>Quad TTL-to-MECL Translator With TTL Strobe Input</description>
<gates>
<gate name="A" symbol="MC10H124PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="5"/>
<connect gate="A" pin="AOUT" pad="2"/>
<connect gate="A" pin="BIN" pad="7"/>
<connect gate="A" pin="BOUT" pad="1"/>
<connect gate="A" pin="CIN" pad="10"/>
<connect gate="A" pin="COMMON_STROBE" pad="6"/>
<connect gate="A" pin="COUT" pad="15"/>
<connect gate="A" pin="DIN" pad="11"/>
<connect gate="A" pin="DOUT" pad="14"/>
<connect gate="A" pin="GND" pad="16"/>
<connect gate="A" pin="VCC" pad="9"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~AOUT" pad="4"/>
<connect gate="A" pin="~BOUT" pad="3"/>
<connect gate="A" pin="~COUT" pad="12"/>
<connect gate="A" pin="~DOUT" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H124PG" constant="no"/>
<attribute name="OC_FARNELL" value="1607885" constant="no"/>
<attribute name="OC_NEWARK" value="98H0625" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H125PG" prefix="U">
<description>Quad MECL-to-TTL Translator</description>
<gates>
<gate name="A" symbol="MC10H125PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="3"/>
<connect gate="A" pin="AOUT" pad="4"/>
<connect gate="A" pin="BIN" pad="7"/>
<connect gate="A" pin="BOUT" pad="5"/>
<connect gate="A" pin="CIN" pad="11"/>
<connect gate="A" pin="COUT" pad="12"/>
<connect gate="A" pin="DIN" pad="15"/>
<connect gate="A" pin="DOUT" pad="13"/>
<connect gate="A" pin="GND" pad="16"/>
<connect gate="A" pin="VBB" pad="1"/>
<connect gate="A" pin="VCC" pad="9"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~AIN" pad="2"/>
<connect gate="A" pin="~BIN" pad="6"/>
<connect gate="A" pin="~CIN" pad="10"/>
<connect gate="A" pin="~DIN" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H125PG" constant="no"/>
<attribute name="OC_FARNELL" value="1607887" constant="no"/>
<attribute name="OC_NEWARK" value="45J0876" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H131PG" prefix="U">
<description>Dual D Type Master-Slave Flip-Flop</description>
<gates>
<gate name="A" symbol="MC10H131PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CC" pad="9"/>
<connect gate="A" pin="D1" pad="7"/>
<connect gate="A" pin="D2" pad="10"/>
<connect gate="A" pin="Q1" pad="2"/>
<connect gate="A" pin="Q2" pad="15"/>
<connect gate="A" pin="R1" pad="4"/>
<connect gate="A" pin="R2" pad="13"/>
<connect gate="A" pin="S1" pad="5"/>
<connect gate="A" pin="S2" pad="12"/>
<connect gate="A" pin="VCC1" pad="1"/>
<connect gate="A" pin="VCC2" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~CE1" pad="6"/>
<connect gate="A" pin="~CE2" pad="11"/>
<connect gate="A" pin="~Q1" pad="3"/>
<connect gate="A" pin="~Q2" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H131PG" constant="no"/>
<attribute name="OC_FARNELL" value="1468724" constant="no"/>
<attribute name="OC_NEWARK" value="45J0879" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC10H136PG" prefix="U">
<description>Universal Hexadecimal Counter</description>
<gates>
<gate name="A" symbol="MC10H136PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CLOCK" pad="13"/>
<connect gate="A" pin="D0" pad="12"/>
<connect gate="A" pin="D1" pad="11"/>
<connect gate="A" pin="D2" pad="6"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="Q0" pad="14"/>
<connect gate="A" pin="Q1" pad="15"/>
<connect gate="A" pin="Q2" pad="2"/>
<connect gate="A" pin="Q3" pad="3"/>
<connect gate="A" pin="S1" pad="9"/>
<connect gate="A" pin="S2" pad="7"/>
<connect gate="A" pin="VCC1" pad="1"/>
<connect gate="A" pin="VCC2" pad="16"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="~CIN" pad="10"/>
<connect gate="A" pin="~COUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC10H136PG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J0882" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC12026ADG" prefix="U">
<description>1.1 GHz Dual Modulus Prescaler</description>
<gates>
<gate name="A" symbol="MC12026ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="IN" pad="1"/>
<connect gate="A" pin="MC" pad="6"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="OUT" pad="4"/>
<connect gate="A" pin="SW" pad="3"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="~IN" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC12026ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1468725" constant="no"/>
<attribute name="OC_NEWARK" value="45J1002" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC12080DG" prefix="U">
<description>1.1 GHz Prescaler</description>
<gates>
<gate name="A" symbol="MC12080DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="IN" pad="1"/>
<connect gate="A" pin="OUT" pad="4"/>
<connect gate="A" pin="SW1" pad="3"/>
<connect gate="A" pin="SW2" pad="6"/>
<connect gate="A" pin="SW3" pad="7"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="~IN" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC12080DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607924" constant="no"/>
<attribute name="OC_NEWARK" value="45J1004" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC12093DG" prefix="U">
<description>÷2, ÷4, ÷8 1.1 GHz Low Power Prescaler with Stand-By Mode</description>
<gates>
<gate name="A" symbol="MC12093DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="IN" pad="1"/>
<connect gate="A" pin="OUT" pad="4"/>
<connect gate="A" pin="SB" pad="7"/>
<connect gate="A" pin="SW1" pad="6"/>
<connect gate="A" pin="SW2" pad="3"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="~IN" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC12093DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607925" constant="no"/>
<attribute name="OC_NEWARK" value="45J1005" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC12095DG" prefix="U">
<description>2.5 GHz Low Power Prescaler With Stand-By Mode</description>
<gates>
<gate name="A" symbol="MC12095DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="IN" pad="1"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="4"/>
<connect gate="A" pin="SB" pad="7"/>
<connect gate="A" pin="SW" pad="6"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="~IN" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC12095DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607926" constant="no"/>
<attribute name="OC_NEWARK" value="45J1006" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14001BCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14001BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="4"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14001BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665455" constant="no"/>
<attribute name="OC_NEWARK" value="45J1007" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14001BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14001BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14001BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666303" constant="no"/>
<attribute name="OC_NEWARK" value="26K3924" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14001UBCPG" prefix="U">
<description>CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14001UBCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14001UBCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1211173" constant="no"/>
<attribute name="OC_NEWARK" value="45J1009" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14001UBDG" prefix="U">
<description>UB-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14001UBDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14001UBDG" constant="no"/>
<attribute name="OC_FARNELL" value="1191820" constant="no"/>
<attribute name="OC_NEWARK" value="97K4601" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14007UBDG" prefix="U">
<description>Dual Complementary Pair Plus Inverter</description>
<gates>
<gate name="A" symbol="MC14007UBDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="D-NA" pad="8"/>
<connect gate="A" pin="D-NB" pad="5"/>
<connect gate="A" pin="D-PA" pad="13"/>
<connect gate="A" pin="D-PB" pad="1"/>
<connect gate="A" pin="GATEA" pad="6"/>
<connect gate="A" pin="GATEB" pad="3"/>
<connect gate="A" pin="GATEC" pad="10"/>
<connect gate="A" pin="OUTC" pad="12"/>
<connect gate="A" pin="S-NB" pad="4"/>
<connect gate="A" pin="S-NC" pad="9"/>
<connect gate="A" pin="S-PB" pad="2"/>
<connect gate="A" pin="S-PC" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14007UBDG" constant="no"/>
<attribute name="OC_FARNELL" value="9665110" constant="no"/>
<attribute name="OC_NEWARK" value="26K3925" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14008BCPG" prefix="U">
<description>4-Bit Full Adder</description>
<gates>
<gate name="A" symbol="MC14008BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A1" pad="7"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="3"/>
<connect gate="A" pin="A4" pad="1"/>
<connect gate="A" pin="B1" pad="6"/>
<connect gate="A" pin="B2" pad="4"/>
<connect gate="A" pin="B3" pad="2"/>
<connect gate="A" pin="B4" pad="15"/>
<connect gate="A" pin="CIN" pad="9"/>
<connect gate="A" pin="COUT" pad="14"/>
<connect gate="A" pin="S1" pad="10"/>
<connect gate="A" pin="S2" pad="11"/>
<connect gate="A" pin="S3" pad="12"/>
<connect gate="A" pin="S4" pad="13"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14008BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665757" constant="no"/>
<attribute name="OC_NEWARK" value="45J1013" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14011BCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14011BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14011BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665463" constant="no"/>
<attribute name="OC_NEWARK" value="45J1014" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14011BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14011BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14011BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666311" constant="no"/>
<attribute name="OC_NEWARK" value="26K3926" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14011BDR2G" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14011BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14011BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1273009" constant="no"/>
<attribute name="OC_NEWARK" value="45J1015" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14011UBCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14011UBCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14011UBCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1468726" constant="no"/>
<attribute name="OC_NEWARK" value="45J1016" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14011UBDG" prefix="U">
<description>UB-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14011UBDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14011UBDG" constant="no"/>
<attribute name="OC_FARNELL" value="1353832" constant="no"/>
<attribute name="OC_NEWARK" value="42K0501" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14012BCPG" prefix="U">
<description>Dual 4-Input NAND Gates</description>
<gates>
<gate name="A" symbol="MC14012BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN1A" pad="2"/>
<connect gate="A" pin="IN1B" pad="9"/>
<connect gate="A" pin="IN2A" pad="3"/>
<connect gate="A" pin="IN2B" pad="10"/>
<connect gate="A" pin="IN3A" pad="4"/>
<connect gate="A" pin="IN3B" pad="11"/>
<connect gate="A" pin="IN4A" pad="5"/>
<connect gate="A" pin="IN4B" pad="12"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="OUTA" pad="1"/>
<connect gate="A" pin="OUTB" pad="13"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14012BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664572" constant="no"/>
<attribute name="OC_NEWARK" value="45J1017" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14012BDG" prefix="U">
<description>Dual 4-Input NAND Gates</description>
<gates>
<gate name="A" symbol="MC14012BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="2"/>
<connect gate="A" pin="IN_1B" pad="9"/>
<connect gate="A" pin="IN_2A" pad="3"/>
<connect gate="A" pin="IN_2B" pad="10"/>
<connect gate="A" pin="IN_3A" pad="4"/>
<connect gate="A" pin="IN_3B" pad="11"/>
<connect gate="A" pin="IN_4A" pad="5"/>
<connect gate="A" pin="IN_4B" pad="12"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="OUTA" pad="1"/>
<connect gate="A" pin="OUTB" pad="13"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14012BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9664840" constant="no"/>
<attribute name="OC_NEWARK" value="71J5454" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14013BCPG" prefix="U">
<description>Dual Type D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC14013BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CA" pad="3"/>
<connect gate="A" pin="CB" pad="11"/>
<connect gate="A" pin="DA" pad="5"/>
<connect gate="A" pin="DB" pad="9"/>
<connect gate="A" pin="QA" pad="1"/>
<connect gate="A" pin="QB" pad="13"/>
<connect gate="A" pin="RA" pad="4"/>
<connect gate="A" pin="RB" pad="10"/>
<connect gate="A" pin="SA" pad="6"/>
<connect gate="A" pin="SB" pad="8"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
<connect gate="A" pin="~QA" pad="2"/>
<connect gate="A" pin="~QB" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14013BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665471" constant="no"/>
<attribute name="OC_NEWARK" value="88H4713" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14013BDG" prefix="U">
<description>Dual Type D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC14013BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CA" pad="3"/>
<connect gate="A" pin="CB" pad="11"/>
<connect gate="A" pin="DA" pad="5"/>
<connect gate="A" pin="DB" pad="9"/>
<connect gate="A" pin="QA" pad="1"/>
<connect gate="A" pin="QB" pad="13"/>
<connect gate="A" pin="RA" pad="4"/>
<connect gate="A" pin="RB" pad="10"/>
<connect gate="A" pin="SA" pad="6"/>
<connect gate="A" pin="SB" pad="8"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
<connect gate="A" pin="~QA" pad="2"/>
<connect gate="A" pin="~QB" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14013BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666320" constant="no"/>
<attribute name="OC_NEWARK" value="45J1018" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14014BCPG" prefix="U">
<description>8-Bit Static Shift Register</description>
<gates>
<gate name="A" symbol="MC14014BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C" pad="10"/>
<connect gate="A" pin="DS" pad="11"/>
<connect gate="A" pin="P/S" pad="9"/>
<connect gate="A" pin="P1" pad="7"/>
<connect gate="A" pin="P2" pad="6"/>
<connect gate="A" pin="P3" pad="5"/>
<connect gate="A" pin="P4" pad="4"/>
<connect gate="A" pin="P5" pad="13"/>
<connect gate="A" pin="P6" pad="14"/>
<connect gate="A" pin="P7" pad="15"/>
<connect gate="A" pin="P8" pad="1"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="12"/>
<connect gate="A" pin="Q8" pad="3"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14014BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664580" constant="no"/>
<attribute name="OC_NEWARK" value="45J1020" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14016BCPG" prefix="U">
<description>Quad Multiplexer</description>
<gates>
<gate name="A" symbol="MC14016BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CONTROL_1" pad="13"/>
<connect gate="A" pin="CONTROL_2" pad="5"/>
<connect gate="A" pin="CONTROL_3" pad="6"/>
<connect gate="A" pin="CONTROL_4" pad="12"/>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="8"/>
<connect gate="A" pin="IN_4" pad="11"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="3"/>
<connect gate="A" pin="OUT_3" pad="9"/>
<connect gate="A" pin="OUT_4" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14016BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665706" constant="no"/>
<attribute name="OC_NEWARK" value="45J1024" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14016BDG" prefix="U">
<description>Quad Analog Switch/Quad Multiplexer</description>
<gates>
<gate name="A" symbol="MC14016BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CONTROL1" pad="13"/>
<connect gate="A" pin="CONTROL2" pad="5"/>
<connect gate="A" pin="CONTROL3" pad="6"/>
<connect gate="A" pin="CONTROL4" pad="12"/>
<connect gate="A" pin="IN1" pad="1"/>
<connect gate="A" pin="IN2" pad="4"/>
<connect gate="A" pin="IN3" pad="8"/>
<connect gate="A" pin="IN4" pad="11"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="3"/>
<connect gate="A" pin="OUT3" pad="9"/>
<connect gate="A" pin="OUT4" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14016BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666338" constant="no"/>
<attribute name="OC_NEWARK" value="71J5456" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14017BCPG" prefix="U">
<description>Decade Counter</description>
<gates>
<gate name="A" symbol="MC14017BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CLK" pad="14"/>
<connect gate="A" pin="COUT" pad="12"/>
<connect gate="A" pin="Q0" pad="3"/>
<connect gate="A" pin="Q1" pad="2"/>
<connect gate="A" pin="Q2" pad="4"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="10"/>
<connect gate="A" pin="Q5" pad="1"/>
<connect gate="A" pin="Q6" pad="5"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="9"/>
<connect gate="A" pin="Q9" pad="11"/>
<connect gate="A" pin="RESET" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CE" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14017BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9666621" constant="no"/>
<attribute name="OC_NEWARK" value="45J1025" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14017BDG" prefix="U">
<description>Decade Counter</description>
<gates>
<gate name="A" symbol="MC14017BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="14"/>
<connect gate="A" pin="COUT" pad="12"/>
<connect gate="A" pin="Q0" pad="3"/>
<connect gate="A" pin="Q1" pad="2"/>
<connect gate="A" pin="Q2" pad="4"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="10"/>
<connect gate="A" pin="Q5" pad="1"/>
<connect gate="A" pin="Q6" pad="5"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="9"/>
<connect gate="A" pin="Q9" pad="11"/>
<connect gate="A" pin="RESET" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CE" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14017BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1104712" constant="no"/>
<attribute name="OC_NEWARK" value="42K0508" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14020BCPG" prefix="U">
<description>14-Bit Binary Counter</description>
<gates>
<gate name="A" symbol="MC14020BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C" pad="10"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q13" pad="2"/>
<connect gate="A" pin="Q14" pad="3"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="R" pad="11"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14020BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665480" constant="no"/>
<attribute name="OC_NEWARK" value="45J1027" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14020BDG" prefix="U">
<description>14-Bit Binary Counter</description>
<gates>
<gate name="A" symbol="MC14020BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="C" pad="10"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q13" pad="2"/>
<connect gate="A" pin="Q14" pad="3"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="R" pad="11"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14020BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1191821" constant="no"/>
<attribute name="OC_NEWARK" value="26K3930" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14022BCPG" prefix="U">
<description>Octal Counter</description>
<gates>
<gate name="A" symbol="MC14022BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C" pad="14"/>
<connect gate="A" pin="COUT" pad="12"/>
<connect gate="A" pin="NC" pad="9"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="1"/>
<connect gate="A" pin="Q2" pad="3"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="11"/>
<connect gate="A" pin="Q5" pad="4"/>
<connect gate="A" pin="Q6" pad="5"/>
<connect gate="A" pin="Q7" pad="10"/>
<connect gate="A" pin="R" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CE" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14022BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1607666" constant="no"/>
<attribute name="OC_NEWARK" value="45J1032" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14022BDG" prefix="U">
<description>Octal Counter</description>
<gates>
<gate name="A" symbol="MC14022BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="C" pad="14"/>
<connect gate="A" pin="COUT" pad="12"/>
<connect gate="A" pin="NC" pad="9"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="1"/>
<connect gate="A" pin="Q2" pad="3"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="11"/>
<connect gate="A" pin="Q5" pad="4"/>
<connect gate="A" pin="Q6" pad="5"/>
<connect gate="A" pin="Q7" pad="10"/>
<connect gate="A" pin="R" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CE" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14022BDG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K3931" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14023BCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14023BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="3"/>
<connect gate="A" pin="IN_1C" pad="11"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="4"/>
<connect gate="A" pin="IN_2C" pad="12"/>
<connect gate="A" pin="IN_3A" pad="8"/>
<connect gate="A" pin="IN_3B" pad="5"/>
<connect gate="A" pin="IN_3C" pad="13"/>
<connect gate="A" pin="OUT_A" pad="9"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14023BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665501" constant="no"/>
<attribute name="OC_NEWARK" value="73K0840" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14023BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14023BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="3"/>
<connect gate="A" pin="IN_1C" pad="11"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="4"/>
<connect gate="A" pin="IN_2C" pad="12"/>
<connect gate="A" pin="IN_3A" pad="8"/>
<connect gate="A" pin="IN_3B" pad="5"/>
<connect gate="A" pin="IN_3C" pad="13"/>
<connect gate="A" pin="OUTA" pad="9"/>
<connect gate="A" pin="OUTB" pad="6"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14023BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1191823" constant="no"/>
<attribute name="OC_NEWARK" value="26K3932" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14024BCPG" prefix="U">
<description>7-Stage Ripple Counter</description>
<gates>
<gate name="A" symbol="MC14024BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CLK" pad="1"/>
<connect gate="A" pin="NC" pad="13"/>
<connect gate="A" pin="NC_2" pad="10"/>
<connect gate="A" pin="NC_3" pad="8"/>
<connect gate="A" pin="Q1" pad="12"/>
<connect gate="A" pin="Q2" pad="11"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="6"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="3"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14024BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664610" constant="no"/>
<attribute name="OC_NEWARK" value="45J1036" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14025BCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14025BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="3"/>
<connect gate="A" pin="IN_1C" pad="11"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="4"/>
<connect gate="A" pin="IN_2C" pad="12"/>
<connect gate="A" pin="IN_3A" pad="8"/>
<connect gate="A" pin="IN_3B" pad="5"/>
<connect gate="A" pin="IN_3C" pad="13"/>
<connect gate="A" pin="OUT_A" pad="9"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14025BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665285" constant="no"/>
<attribute name="OC_NEWARK" value="45J1037" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14025BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14025BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="3"/>
<connect gate="A" pin="IN_1C" pad="11"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="4"/>
<connect gate="A" pin="IN_2C" pad="12"/>
<connect gate="A" pin="IN_3A" pad="8"/>
<connect gate="A" pin="IN_3B" pad="5"/>
<connect gate="A" pin="IN_3C" pad="13"/>
<connect gate="A" pin="OUTA" pad="9"/>
<connect gate="A" pin="OUTB" pad="6"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14025BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1191824" constant="no"/>
<attribute name="OC_NEWARK" value="26K3933" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14027BCPG" prefix="U">
<description>Dual J-K Flip-Flop</description>
<gates>
<gate name="A" symbol="MC14027BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CA" pad="3"/>
<connect gate="A" pin="CB" pad="13"/>
<connect gate="A" pin="JA" pad="6"/>
<connect gate="A" pin="JB" pad="10"/>
<connect gate="A" pin="KA" pad="5"/>
<connect gate="A" pin="KB" pad="11"/>
<connect gate="A" pin="QA" pad="1"/>
<connect gate="A" pin="QB" pad="15"/>
<connect gate="A" pin="RA" pad="4"/>
<connect gate="A" pin="RB" pad="12"/>
<connect gate="A" pin="SA" pad="7"/>
<connect gate="A" pin="SB" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~QA" pad="2"/>
<connect gate="A" pin="~QB" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14027BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665510" constant="no"/>
<attribute name="OC_NEWARK" value="45J1039" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14027BDG" prefix="U">
<description>Dual J-K Flip-Flop</description>
<gates>
<gate name="A" symbol="MC14027BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CA" pad="3"/>
<connect gate="A" pin="CB" pad="13"/>
<connect gate="A" pin="JA" pad="6"/>
<connect gate="A" pin="JB" pad="10"/>
<connect gate="A" pin="KA" pad="5"/>
<connect gate="A" pin="KB" pad="11"/>
<connect gate="A" pin="QA" pad="1"/>
<connect gate="A" pin="QB" pad="15"/>
<connect gate="A" pin="RA" pad="4"/>
<connect gate="A" pin="RB" pad="12"/>
<connect gate="A" pin="SA" pad="7"/>
<connect gate="A" pin="SB" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~QA" pad="2"/>
<connect gate="A" pin="~QB" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14027BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666354" constant="no"/>
<attribute name="OC_NEWARK" value="71J5463" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14028BDG" prefix="U">
<description>BCD-To-Decimal Decoder Binary-To-Octal Decoder</description>
<gates>
<gate name="A" symbol="MC14028BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="10"/>
<connect gate="A" pin="B" pad="13"/>
<connect gate="A" pin="C" pad="12"/>
<connect gate="A" pin="D" pad="11"/>
<connect gate="A" pin="Q0" pad="3"/>
<connect gate="A" pin="Q1" pad="14"/>
<connect gate="A" pin="Q2" pad="2"/>
<connect gate="A" pin="Q3" pad="15"/>
<connect gate="A" pin="Q4" pad="1"/>
<connect gate="A" pin="Q5" pad="6"/>
<connect gate="A" pin="Q6" pad="7"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="9"/>
<connect gate="A" pin="Q9" pad="5"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14028BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666362" constant="no"/>
<attribute name="OC_NEWARK" value="71J5465" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14029BCPG" prefix="U">
<description>Binary/Decade Up/Down Counter</description>
<gates>
<gate name="A" symbol="MC14029BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="B/D" pad="9"/>
<connect gate="A" pin="CLK" pad="15"/>
<connect gate="A" pin="P0" pad="4"/>
<connect gate="A" pin="P1" pad="12"/>
<connect gate="A" pin="P2" pad="13"/>
<connect gate="A" pin="P3" pad="3"/>
<connect gate="A" pin="PE" pad="1"/>
<connect gate="A" pin="Q0" pad="6"/>
<connect gate="A" pin="Q1" pad="11"/>
<connect gate="A" pin="Q2" pad="14"/>
<connect gate="A" pin="Q3" pad="2"/>
<connect gate="A" pin="U/D" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CIN" pad="5"/>
<connect gate="A" pin="~COUT" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14029BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664629" constant="no"/>
<attribute name="OC_NEWARK" value="45J1041" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14029BDR2G" prefix="U">
<description>Binary/Decade Up/Down Counter</description>
<gates>
<gate name="A" symbol="MC14029BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="B/D" pad="9"/>
<connect gate="A" pin="CLK" pad="15"/>
<connect gate="A" pin="P0" pad="4"/>
<connect gate="A" pin="P1" pad="12"/>
<connect gate="A" pin="P2" pad="13"/>
<connect gate="A" pin="P3" pad="3"/>
<connect gate="A" pin="PE" pad="1"/>
<connect gate="A" pin="Q0" pad="6"/>
<connect gate="A" pin="Q1" pad="11"/>
<connect gate="A" pin="Q2" pad="14"/>
<connect gate="A" pin="Q3" pad="2"/>
<connect gate="A" pin="U/D" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CIN" pad="5"/>
<connect gate="A" pin="~COUT" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14029BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7793" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14040BCPG" prefix="U">
<description>12-Bit Binary Counter</description>
<gates>
<gate name="A" symbol="MC14040BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C" pad="10"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q2" pad="7"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="Q5" pad="3"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="R" pad="11"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14040BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665544" constant="no"/>
<attribute name="OC_NEWARK" value="45J1045" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14040BDG" prefix="U">
<description>12-Bit Binary Counter</description>
<gates>
<gate name="A" symbol="MC14040BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="C" pad="10"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q2" pad="7"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="Q5" pad="3"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="R" pad="11"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14040BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666370" constant="no"/>
<attribute name="OC_NEWARK" value="45J1046" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14040BDR2G" prefix="U">
<description>12-Bit Binary Counter</description>
<gates>
<gate name="A" symbol="MC14040BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="C" pad="10"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q2" pad="7"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="Q5" pad="3"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="R" pad="11"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14040BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1364057" constant="no"/>
<attribute name="OC_NEWARK" value="26K3935" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14042BDG" prefix="U">
<description>Quad Transparent Latch</description>
<gates>
<gate name="A" symbol="MC14042BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="5"/>
<connect gate="A" pin="D0" pad="4"/>
<connect gate="A" pin="D1" pad="7"/>
<connect gate="A" pin="D2" pad="13"/>
<connect gate="A" pin="D3" pad="14"/>
<connect gate="A" pin="POLARITY" pad="6"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="10"/>
<connect gate="A" pin="Q2" pad="11"/>
<connect gate="A" pin="Q3" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~Q0" pad="3"/>
<connect gate="A" pin="~Q1" pad="9"/>
<connect gate="A" pin="~Q2" pad="12"/>
<connect gate="A" pin="~Q3" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14042BDG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="71J5467" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14043BCPG" prefix="U">
<description>CMOS MSI</description>
<gates>
<gate name="A" symbol="MC14043BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="E" pad="5"/>
<connect gate="A" pin="NC" pad="13"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="Q3" pad="1"/>
<connect gate="A" pin="R0" pad="3"/>
<connect gate="A" pin="R1" pad="7"/>
<connect gate="A" pin="R2" pad="11"/>
<connect gate="A" pin="R3" pad="15"/>
<connect gate="A" pin="S0" pad="4"/>
<connect gate="A" pin="S1" pad="6"/>
<connect gate="A" pin="S2" pad="12"/>
<connect gate="A" pin="S3" pad="14"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14043BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664645" constant="no"/>
<attribute name="OC_NEWARK" value="45J1048" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14043BDG" prefix="U">
<description>CMOS MSI</description>
<gates>
<gate name="A" symbol="MC14043BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="E" pad="5"/>
<connect gate="A" pin="NC" pad="13"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="Q3" pad="1"/>
<connect gate="A" pin="R0" pad="3"/>
<connect gate="A" pin="R1" pad="7"/>
<connect gate="A" pin="R2" pad="11"/>
<connect gate="A" pin="R3" pad="15"/>
<connect gate="A" pin="S0" pad="4"/>
<connect gate="A" pin="S1" pad="6"/>
<connect gate="A" pin="S2" pad="12"/>
<connect gate="A" pin="S3" pad="14"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14043BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9665145" constant="no"/>
<attribute name="OC_NEWARK" value="26K3936" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14044BCPG" prefix="U">
<description>CMOS MSI</description>
<gates>
<gate name="A" symbol="MC14044BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="E" pad="5"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="Q0" pad="13"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="Q3" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~R0" pad="4"/>
<connect gate="A" pin="~R1" pad="6"/>
<connect gate="A" pin="~R2" pad="12"/>
<connect gate="A" pin="~R3" pad="14"/>
<connect gate="A" pin="~S0" pad="3"/>
<connect gate="A" pin="~S1" pad="7"/>
<connect gate="A" pin="~S2" pad="11"/>
<connect gate="A" pin="~S3" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14044BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664653" constant="no"/>
<attribute name="OC_NEWARK" value="45J1050" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14046BCPG" prefix="U">
<description>Phase Locked Loop</description>
<gates>
<gate name="A" symbol="MC14046BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C1A" pad="6"/>
<connect gate="A" pin="C1B" pad="7"/>
<connect gate="A" pin="INH" pad="5"/>
<connect gate="A" pin="LD" pad="1"/>
<connect gate="A" pin="PC1OUT" pad="2"/>
<connect gate="A" pin="PC2OUT" pad="13"/>
<connect gate="A" pin="PCAIN" pad="14"/>
<connect gate="A" pin="PCBIN" pad="3"/>
<connect gate="A" pin="R1" pad="11"/>
<connect gate="A" pin="R2" pad="12"/>
<connect gate="A" pin="SFOUT" pad="10"/>
<connect gate="A" pin="VCOIN" pad="9"/>
<connect gate="A" pin="VCOOUT" pad="4"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="ZENER" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14046BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664661" constant="no"/>
<attribute name="OC_NEWARK" value="45J1053" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14049BCPG" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14049BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14049BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664670" constant="no"/>
<attribute name="OC_NEWARK" value="26K3937" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14049BDG" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14049BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14049BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1468727" constant="no"/>
<attribute name="OC_NEWARK" value="71J5469" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14049UBCPG" prefix="U">
<description>Hex Buffers</description>
<gates>
<gate name="A" symbol="MC14049UBCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14049UBCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664688" constant="no"/>
<attribute name="OC_NEWARK" value="45J1056" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14049UBDG" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14049UBDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14049UBDG" constant="no"/>
<attribute name="OC_FARNELL" value="9665170" constant="no"/>
<attribute name="OC_NEWARK" value="71J5471" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14049UBDR2G" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14049UBDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14049UBDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1365190" constant="no"/>
<attribute name="OC_NEWARK" value="84K8744" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14050BCPG" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14050BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14050BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665552" constant="no"/>
<attribute name="OC_NEWARK" value="45J1058" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14050BDG" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14050BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14050BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666397" constant="no"/>
<attribute name="OC_NEWARK" value="26K3938" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14050BDR2G" prefix="U">
<description>Hex Buffer</description>
<gates>
<gate name="A" symbol="MC14050BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="INA" pad="3"/>
<connect gate="A" pin="INB" pad="5"/>
<connect gate="A" pin="INC" pad="7"/>
<connect gate="A" pin="IND" pad="9"/>
<connect gate="A" pin="INE" pad="11"/>
<connect gate="A" pin="INF" pad="14"/>
<connect gate="A" pin="NC" pad="16"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="OUTA" pad="2"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="6"/>
<connect gate="A" pin="OUTD" pad="10"/>
<connect gate="A" pin="OUTE" pad="12"/>
<connect gate="A" pin="OUTF" pad="15"/>
<connect gate="A" pin="VDD" pad="1"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14050BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1365191" constant="no"/>
<attribute name="OC_NEWARK" value="84K8745" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14051BCPG" prefix="U">
<description>Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14051BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="3"/>
<connect gate="A" pin="X0" pad="13"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="12"/>
<connect gate="A" pin="X4" pad="1"/>
<connect gate="A" pin="X5" pad="5"/>
<connect gate="A" pin="X6" pad="2"/>
<connect gate="A" pin="X7" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14051BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665684" constant="no"/>
<attribute name="OC_NEWARK" value="45J1060" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14051BDG" prefix="U">
<description>Analog Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14051BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="3"/>
<connect gate="A" pin="X0" pad="13"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="12"/>
<connect gate="A" pin="X4" pad="1"/>
<connect gate="A" pin="X5" pad="5"/>
<connect gate="A" pin="X6" pad="2"/>
<connect gate="A" pin="X7" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14051BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666400" constant="no"/>
<attribute name="OC_NEWARK" value="45J1061" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14051BDTR2G" prefix="U">
<description>Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14051BDTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="3"/>
<connect gate="A" pin="X0" pad="13"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="12"/>
<connect gate="A" pin="X4" pad="1"/>
<connect gate="A" pin="X5" pad="5"/>
<connect gate="A" pin="X6" pad="2"/>
<connect gate="A" pin="X7" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14051BDTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0523" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14052BCPG" prefix="U">
<description>Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14052BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="10"/>
<connect gate="A" pin="B" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="13"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="11"/>
<connect gate="A" pin="Y" pad="3"/>
<connect gate="A" pin="Y0" pad="1"/>
<connect gate="A" pin="Y1" pad="5"/>
<connect gate="A" pin="Y2" pad="2"/>
<connect gate="A" pin="Y3" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14052BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665692" constant="no"/>
<attribute name="OC_NEWARK" value="98H0653" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14053BCPG" prefix="U">
<description>Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14053BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="14"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="13"/>
<connect gate="A" pin="Y" pad="15"/>
<connect gate="A" pin="Y0" pad="2"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Z" pad="4"/>
<connect gate="A" pin="Z0" pad="5"/>
<connect gate="A" pin="Z1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14053BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664696" constant="no"/>
<attribute name="OC_NEWARK" value="45J1063" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14053BDG" prefix="U">
<description>Analog Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14053BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="14"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="13"/>
<connect gate="A" pin="Y" pad="15"/>
<connect gate="A" pin="Y0" pad="2"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Z" pad="4"/>
<connect gate="A" pin="Z0" pad="5"/>
<connect gate="A" pin="Z1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14053BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666427" constant="no"/>
<attribute name="OC_NEWARK" value="45J1064" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14053BDTR2G" prefix="U">
<description>Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14053BDTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="INH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X" pad="14"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="13"/>
<connect gate="A" pin="Y" pad="15"/>
<connect gate="A" pin="Y0" pad="2"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Z" pad="4"/>
<connect gate="A" pin="Z0" pad="5"/>
<connect gate="A" pin="Z1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14053BDTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7824" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14060BCPG" prefix="U">
<description>14-Bit Binary Counter</description>
<gates>
<gate name="A" symbol="MC14060BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CLK" pad="11"/>
<connect gate="A" pin="OUT_1" pad="10"/>
<connect gate="A" pin="OUT_2" pad="9"/>
<connect gate="A" pin="Q10" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q13" pad="2"/>
<connect gate="A" pin="Q14" pad="3"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="14"/>
<connect gate="A" pin="Q9" pad="13"/>
<connect gate="A" pin="RESET" pad="12"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14060BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665560" constant="no"/>
<attribute name="OC_NEWARK" value="45J1065" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14060BDG" prefix="U">
<description>14-Bit Binary Counter and Oscillator</description>
<gates>
<gate name="A" symbol="MC14060BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="11"/>
<connect gate="A" pin="OUT_1" pad="10"/>
<connect gate="A" pin="OUT_2" pad="9"/>
<connect gate="A" pin="Q10" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q13" pad="2"/>
<connect gate="A" pin="Q14" pad="3"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="14"/>
<connect gate="A" pin="Q9" pad="13"/>
<connect gate="A" pin="RESET" pad="12"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14060BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666435" constant="no"/>
<attribute name="OC_NEWARK" value="71J5473" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14066BCPG" prefix="U">
<description>Quad Analog Switch/Quad Multiplexer</description>
<gates>
<gate name="A" symbol="MC14066BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CONTROL_1" pad="13"/>
<connect gate="A" pin="CONTROL_2" pad="5"/>
<connect gate="A" pin="CONTROL_3" pad="6"/>
<connect gate="A" pin="CONTROL_4" pad="12"/>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="8"/>
<connect gate="A" pin="IN_4" pad="11"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="3"/>
<connect gate="A" pin="OUT_3" pad="9"/>
<connect gate="A" pin="OUT_4" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14066BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664700" constant="no"/>
<attribute name="OC_NEWARK" value="45J1067" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14066BDG" prefix="U">
<description>Quad Analog Switch/Quad Multiplexer</description>
<gates>
<gate name="A" symbol="MC14066BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CONTROL_1" pad="13"/>
<connect gate="A" pin="CONTROL_2" pad="5"/>
<connect gate="A" pin="CONTROL_3" pad="6"/>
<connect gate="A" pin="CONTROL_4" pad="12"/>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="8"/>
<connect gate="A" pin="IN_4" pad="11"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="3"/>
<connect gate="A" pin="OUT_3" pad="9"/>
<connect gate="A" pin="OUT_4" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14066BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666443" constant="no"/>
<attribute name="OC_NEWARK" value="45J1068" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14066BDR2G" prefix="U">
<description>Quad Multiplexer</description>
<gates>
<gate name="A" symbol="MC14066BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CNTR1" pad="13"/>
<connect gate="A" pin="CNTR2" pad="5"/>
<connect gate="A" pin="CNTR3" pad="6"/>
<connect gate="A" pin="CNTR4" pad="12"/>
<connect gate="A" pin="IN1" pad="1"/>
<connect gate="A" pin="IN2" pad="4"/>
<connect gate="A" pin="IN3" pad="8"/>
<connect gate="A" pin="IN4" pad="11"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="3"/>
<connect gate="A" pin="OUT3" pad="9"/>
<connect gate="A" pin="OUT4" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14066BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1887036" constant="no"/>
<attribute name="OC_NEWARK" value="98H0656" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14066BDTR2G" prefix="U">
<description>Quad Mux</description>
<gates>
<gate name="A" symbol="MC14066BDTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="CONTROL1" pad="13"/>
<connect gate="A" pin="CONTROL2" pad="5"/>
<connect gate="A" pin="CONTROL3" pad="6"/>
<connect gate="A" pin="CONTROL4" pad="12"/>
<connect gate="A" pin="IN1" pad="1"/>
<connect gate="A" pin="IN2" pad="4"/>
<connect gate="A" pin="IN3" pad="8"/>
<connect gate="A" pin="IN4" pad="11"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="3"/>
<connect gate="A" pin="OUT3" pad="9"/>
<connect gate="A" pin="OUT4" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14066BDTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1568904" constant="no"/>
<attribute name="OC_NEWARK" value="42K0527" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14067BDWG" prefix="U">
<description>Analog Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC14067BDWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-24N">
<connects>
<connect gate="A" pin="A" pad="10"/>
<connect gate="A" pin="B" pad="11"/>
<connect gate="A" pin="C" pad="14"/>
<connect gate="A" pin="D" pad="13"/>
<connect gate="A" pin="INHIBIT" pad="15"/>
<connect gate="A" pin="VDD" pad="24"/>
<connect gate="A" pin="VSS" pad="12"/>
<connect gate="A" pin="X" pad="1"/>
<connect gate="A" pin="X0" pad="9"/>
<connect gate="A" pin="X1" pad="8"/>
<connect gate="A" pin="X10" pad="21"/>
<connect gate="A" pin="X11" pad="20"/>
<connect gate="A" pin="X12" pad="19"/>
<connect gate="A" pin="X13" pad="18"/>
<connect gate="A" pin="X14" pad="17"/>
<connect gate="A" pin="X15" pad="16"/>
<connect gate="A" pin="X2" pad="7"/>
<connect gate="A" pin="X3" pad="6"/>
<connect gate="A" pin="X5" pad="5"/>
<connect gate="A" pin="X5_2" pad="4"/>
<connect gate="A" pin="X6" pad="3"/>
<connect gate="A" pin="X7" pad="2"/>
<connect gate="A" pin="X8" pad="23"/>
<connect gate="A" pin="X9" pad="22"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14067BDWG" constant="no"/>
<attribute name="OC_FARNELL" value="9664882" constant="no"/>
<attribute name="OC_NEWARK" value="45J1070" constant="no"/>
<attribute name="PACKAGE" value="SOIC-24" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14069UBCPG" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC14069UBCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="IN_3" pad="5"/>
<connect gate="A" pin="IN_4" pad="9"/>
<connect gate="A" pin="IN_5" pad="11"/>
<connect gate="A" pin="IN_6" pad="13"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="8"/>
<connect gate="A" pin="OUT_5" pad="10"/>
<connect gate="A" pin="OUT_6" pad="12"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14069UBCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665579" constant="no"/>
<attribute name="OC_NEWARK" value="45J1072" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14069UBDG" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC14069UBDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="IN_3" pad="5"/>
<connect gate="A" pin="IN_4" pad="9"/>
<connect gate="A" pin="IN_5" pad="11"/>
<connect gate="A" pin="IN_6" pad="13"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="8"/>
<connect gate="A" pin="OUT_5" pad="10"/>
<connect gate="A" pin="OUT_6" pad="12"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14069UBDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666451" constant="no"/>
<attribute name="OC_NEWARK" value="45J1073" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14070BCPG" prefix="U">
<description>Quad Exclusive ?OR? and ?NOR? Gates</description>
<gates>
<gate name="A" symbol="MC14070BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="4"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14070BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665714" constant="no"/>
<attribute name="OC_NEWARK" value="45J1075" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14070BDG" prefix="U">
<description>CMOS SSI</description>
<gates>
<gate name="A" symbol="MC14070BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14070BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666460" constant="no"/>
<attribute name="OC_NEWARK" value="71J5474" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14071BCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14071BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="4"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14071BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665587" constant="no"/>
<attribute name="OC_NEWARK" value="88H4715" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14071BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14071BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14071BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666478" constant="no"/>
<attribute name="OC_NEWARK" value="26K3944" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14073BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14073BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="3"/>
<connect gate="A" pin="IN_1C" pad="11"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="4"/>
<connect gate="A" pin="IN_2C" pad="12"/>
<connect gate="A" pin="IN_3A" pad="8"/>
<connect gate="A" pin="IN_3B" pad="5"/>
<connect gate="A" pin="IN_3C" pad="13"/>
<connect gate="A" pin="OUTA" pad="9"/>
<connect gate="A" pin="OUTB" pad="6"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14073BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1705997" constant="no"/>
<attribute name="OC_NEWARK" value="71J5475" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14077BDG" prefix="U">
<description>CMOS SSI</description>
<gates>
<gate name="A" symbol="MC14077BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14077BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666486" constant="no"/>
<attribute name="OC_NEWARK" value="26K3945" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14081BCPG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14081BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="4"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14081BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665595" constant="no"/>
<attribute name="OC_NEWARK" value="45J1085" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14081BDG" prefix="U">
<description>B-Suffix Series CMOS Gates</description>
<gates>
<gate name="A" symbol="MC14081BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14081BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666494" constant="no"/>
<attribute name="OC_NEWARK" value="45J1086" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14093BCPG" prefix="U">
<description>Quad 2-Input NAND" Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC14093BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="4"/>
<connect gate="A" pin="OUT_C" pad="10"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14093BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665609" constant="no"/>
<attribute name="OC_NEWARK" value="45J1089" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14093BDG" prefix="U">
<description>Quad 2-Input "NAND" Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC14093BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1A" pad="1"/>
<connect gate="A" pin="IN_1B" pad="5"/>
<connect gate="A" pin="IN_1C" pad="8"/>
<connect gate="A" pin="IN_1D" pad="12"/>
<connect gate="A" pin="IN_2A" pad="2"/>
<connect gate="A" pin="IN_2B" pad="6"/>
<connect gate="A" pin="IN_2C" pad="9"/>
<connect gate="A" pin="IN_2D" pad="13"/>
<connect gate="A" pin="OUTA" pad="3"/>
<connect gate="A" pin="OUTB" pad="4"/>
<connect gate="A" pin="OUTC" pad="10"/>
<connect gate="A" pin="OUTD" pad="11"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14093BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666508" constant="no"/>
<attribute name="OC_NEWARK" value="71J5481" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14094BDG" prefix="U">
<description>8-Stage Shift/Store Register with Three-State Outputs</description>
<gates>
<gate name="A" symbol="MC14094BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="DATA" pad="2"/>
<connect gate="A" pin="OUT_EN" pad="15"/>
<connect gate="A" pin="Q1" pad="4"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="14"/>
<connect gate="A" pin="Q6" pad="13"/>
<connect gate="A" pin="Q7" pad="12"/>
<connect gate="A" pin="Q8" pad="11"/>
<connect gate="A" pin="QS" pad="9"/>
<connect gate="A" pin="QS_2" pad="10"/>
<connect gate="A" pin="STROBE" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14094BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666516" constant="no"/>
<attribute name="OC_NEWARK" value="45J1092" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14099BCPG" prefix="U">
<description>8-Bit Addressable Latches</description>
<gates>
<gate name="A" symbol="MC14099BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A0" pad="5"/>
<connect gate="A" pin="A1" pad="6"/>
<connect gate="A" pin="A2" pad="7"/>
<connect gate="A" pin="DATA" pad="3"/>
<connect gate="A" pin="Q0" pad="9"/>
<connect gate="A" pin="Q1" pad="10"/>
<connect gate="A" pin="Q2" pad="11"/>
<connect gate="A" pin="Q3" pad="12"/>
<connect gate="A" pin="Q4" pad="13"/>
<connect gate="A" pin="Q5" pad="14"/>
<connect gate="A" pin="Q6" pad="15"/>
<connect gate="A" pin="Q7" pad="1"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="WRITE_DISABLE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14099BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665722" constant="no"/>
<attribute name="OC_NEWARK" value="45J1093" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14106BDG" prefix="U">
<description>Hex Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC14106BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN" pad="13"/>
<connect gate="A" pin="IN_2" pad="1"/>
<connect gate="A" pin="IN_3" pad="11"/>
<connect gate="A" pin="IN_4" pad="3"/>
<connect gate="A" pin="IN_5" pad="5"/>
<connect gate="A" pin="IN_6" pad="9"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="OUT_2" pad="8"/>
<connect gate="A" pin="OUT_3" pad="4"/>
<connect gate="A" pin="OUT_4" pad="12"/>
<connect gate="A" pin="OUT_5" pad="10"/>
<connect gate="A" pin="OUT_6" pad="2"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14106BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666524" constant="no"/>
<attribute name="OC_NEWARK" value="71J5483" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14175BCPG" prefix="U">
<description>Quad Type D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC14175BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="D0" pad="4"/>
<connect gate="A" pin="D1" pad="5"/>
<connect gate="A" pin="D2" pad="12"/>
<connect gate="A" pin="D3" pad="13"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="7"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="Q3" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~Q0" pad="3"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="11"/>
<connect gate="A" pin="~Q3" pad="14"/>
<connect gate="A" pin="~R" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14175BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1607714" constant="no"/>
<attribute name="OC_NEWARK" value="45J1098" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14490DWG" prefix="U">
<description>Hex Contact Bounce Eliminator</description>
<gates>
<gate name="A" symbol="MC14490DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="AIN" pad="1"/>
<connect gate="A" pin="AOUT" pad="15"/>
<connect gate="A" pin="BIN" pad="14"/>
<connect gate="A" pin="BOUT" pad="2"/>
<connect gate="A" pin="CIN" pad="3"/>
<connect gate="A" pin="COUT" pad="13"/>
<connect gate="A" pin="DIN" pad="12"/>
<connect gate="A" pin="DOUT" pad="4"/>
<connect gate="A" pin="EIN" pad="5"/>
<connect gate="A" pin="EOUT" pad="11"/>
<connect gate="A" pin="FIN" pad="10"/>
<connect gate="A" pin="FOUT" pad="6"/>
<connect gate="A" pin="OSCIN" pad="7"/>
<connect gate="A" pin="OSCOUT" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14490DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1191828" constant="no"/>
<attribute name="OC_NEWARK" value="26K3951" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14490PG" prefix="U">
<description>Hex Contact Bounce Eliminator</description>
<gates>
<gate name="A" symbol="MC14490PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="1"/>
<connect gate="A" pin="AOUT" pad="15"/>
<connect gate="A" pin="BIN" pad="14"/>
<connect gate="A" pin="BOUT" pad="2"/>
<connect gate="A" pin="CIN" pad="3"/>
<connect gate="A" pin="COUT" pad="13"/>
<connect gate="A" pin="DIN" pad="12"/>
<connect gate="A" pin="DOUT" pad="4"/>
<connect gate="A" pin="EIN" pad="5"/>
<connect gate="A" pin="EOUT" pad="11"/>
<connect gate="A" pin="FIN" pad="10"/>
<connect gate="A" pin="FOUT" pad="6"/>
<connect gate="A" pin="OSCIN" pad="7"/>
<connect gate="A" pin="OSCOUT" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14490PG" constant="no"/>
<attribute name="OC_FARNELL" value="9664947" constant="no"/>
<attribute name="OC_NEWARK" value="45J1099" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14503BCPG" prefix="U">
<description>Hex Non-Inverting 3-State Buffer</description>
<gates>
<gate name="A" symbol="MC14503BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="DIS_A" pad="1"/>
<connect gate="A" pin="DIS_B" pad="15"/>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="6"/>
<connect gate="A" pin="IN_4" pad="10"/>
<connect gate="A" pin="IN_5" pad="12"/>
<connect gate="A" pin="IN_6" pad="14"/>
<connect gate="A" pin="OUT_1" pad="3"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="OUT_3" pad="7"/>
<connect gate="A" pin="OUT_4" pad="9"/>
<connect gate="A" pin="OUT_5" pad="11"/>
<connect gate="A" pin="OUT_6" pad="13"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14503BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664769" constant="no"/>
<attribute name="OC_NEWARK" value="45J1100" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14503BDG" prefix="U">
<description>Hex Non-Inverting 3-State Buffer</description>
<gates>
<gate name="A" symbol="MC14503BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="DIS_A" pad="1"/>
<connect gate="A" pin="DIS_B" pad="15"/>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="6"/>
<connect gate="A" pin="IN_4" pad="10"/>
<connect gate="A" pin="IN_5" pad="12"/>
<connect gate="A" pin="IN_6" pad="14"/>
<connect gate="A" pin="OUT_1" pad="3"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="OUT_3" pad="7"/>
<connect gate="A" pin="OUT_4" pad="9"/>
<connect gate="A" pin="OUT_5" pad="11"/>
<connect gate="A" pin="OUT_6" pad="13"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14503BDG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="71J5487" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14504BCPG" prefix="U">
<description>Hex Level Shifter</description>
<gates>
<gate name="A" symbol="MC14504BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AIN" pad="3"/>
<connect gate="A" pin="AOUT" pad="2"/>
<connect gate="A" pin="BIN" pad="5"/>
<connect gate="A" pin="BOUT" pad="4"/>
<connect gate="A" pin="CIN" pad="7"/>
<connect gate="A" pin="COUT" pad="6"/>
<connect gate="A" pin="DIN" pad="9"/>
<connect gate="A" pin="DOUT" pad="10"/>
<connect gate="A" pin="EIN" pad="11"/>
<connect gate="A" pin="EOUT" pad="12"/>
<connect gate="A" pin="FIN" pad="14"/>
<connect gate="A" pin="FOUT" pad="15"/>
<connect gate="A" pin="MODE" pad="13"/>
<connect gate="A" pin="VCC" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14504BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665064" constant="no"/>
<attribute name="OC_NEWARK" value="45J1101" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14504BDG" prefix="U">
<description>Hex Level Shifter for TTL to CMOS or CMOS to CMOS</description>
<gates>
<gate name="A" symbol="MC14504BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="AIN" pad="3"/>
<connect gate="A" pin="AOUT" pad="2"/>
<connect gate="A" pin="BIN" pad="5"/>
<connect gate="A" pin="BOUT" pad="4"/>
<connect gate="A" pin="CIN" pad="7"/>
<connect gate="A" pin="COUT" pad="6"/>
<connect gate="A" pin="DIN" pad="9"/>
<connect gate="A" pin="DOUT" pad="10"/>
<connect gate="A" pin="EIN" pad="11"/>
<connect gate="A" pin="EOUT" pad="12"/>
<connect gate="A" pin="FIN" pad="14"/>
<connect gate="A" pin="FOUT" pad="15"/>
<connect gate="A" pin="MODE" pad="13"/>
<connect gate="A" pin="VCC" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14504BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9665218" constant="no"/>
<attribute name="OC_NEWARK" value="71J5489" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14504BDR2G" prefix="U">
<description>Hex Level Shifter for TTL to CMOS or CMOS to CMOS</description>
<gates>
<gate name="A" symbol="MC14504BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="AIN" pad="3"/>
<connect gate="A" pin="AOUT" pad="2"/>
<connect gate="A" pin="BIN" pad="5"/>
<connect gate="A" pin="BOUT" pad="4"/>
<connect gate="A" pin="CIN" pad="7"/>
<connect gate="A" pin="COUT" pad="6"/>
<connect gate="A" pin="DIN" pad="9"/>
<connect gate="A" pin="DOUT" pad="10"/>
<connect gate="A" pin="EIN" pad="11"/>
<connect gate="A" pin="EOUT" pad="12"/>
<connect gate="A" pin="FIN" pad="14"/>
<connect gate="A" pin="FOUT" pad="15"/>
<connect gate="A" pin="MODE" pad="13"/>
<connect gate="A" pin="VCC" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14504BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1273197" constant="no"/>
<attribute name="OC_NEWARK" value="84K8754" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14511BCPG" prefix="U">
<description>BCD-To-Seven Segment</description>
<gates>
<gate name="A" symbol="MC14511BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="13"/>
<connect gate="A" pin="A_2" pad="7"/>
<connect gate="A" pin="B" pad="12"/>
<connect gate="A" pin="B_2" pad="1"/>
<connect gate="A" pin="C" pad="11"/>
<connect gate="A" pin="C_2" pad="2"/>
<connect gate="A" pin="D" pad="10"/>
<connect gate="A" pin="D_2" pad="6"/>
<connect gate="A" pin="E" pad="9"/>
<connect gate="A" pin="F" pad="15"/>
<connect gate="A" pin="G" pad="14"/>
<connect gate="A" pin="LE" pad="5"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~BI" pad="4"/>
<connect gate="A" pin="~LT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14511BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665617" constant="no"/>
<attribute name="OC_NEWARK" value="45J1104" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14512BCPG" prefix="U">
<description>8-Channel Data Selector</description>
<gates>
<gate name="A" symbol="MC14512BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="12"/>
<connect gate="A" pin="C" pad="13"/>
<connect gate="A" pin="DIS" pad="15"/>
<connect gate="A" pin="INH" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X0" pad="1"/>
<connect gate="A" pin="X1" pad="2"/>
<connect gate="A" pin="X2" pad="3"/>
<connect gate="A" pin="X3" pad="4"/>
<connect gate="A" pin="X4" pad="5"/>
<connect gate="A" pin="X5" pad="6"/>
<connect gate="A" pin="X6" pad="7"/>
<connect gate="A" pin="X7" pad="9"/>
<connect gate="A" pin="Z" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14512BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665625" constant="no"/>
<attribute name="OC_NEWARK" value="45J1105" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14512BDG" prefix="U">
<description>8-Channel Data Selector</description>
<gates>
<gate name="A" symbol="MC14512BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="12"/>
<connect gate="A" pin="C" pad="13"/>
<connect gate="A" pin="DIS" pad="15"/>
<connect gate="A" pin="INH" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="X0" pad="1"/>
<connect gate="A" pin="X1" pad="2"/>
<connect gate="A" pin="X2" pad="3"/>
<connect gate="A" pin="X3" pad="4"/>
<connect gate="A" pin="X4" pad="5"/>
<connect gate="A" pin="X5" pad="6"/>
<connect gate="A" pin="X6" pad="7"/>
<connect gate="A" pin="X7" pad="9"/>
<connect gate="A" pin="Z" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14512BDG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="71J5491" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14513BCPG" prefix="U">
<description>BCD-To-Seven Segment</description>
<gates>
<gate name="A" symbol="MC14513BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-18">
<connects>
<connect gate="A" pin="A" pad="15"/>
<connect gate="A" pin="A_2" pad="7"/>
<connect gate="A" pin="B" pad="14"/>
<connect gate="A" pin="B_2" pad="1"/>
<connect gate="A" pin="C" pad="13"/>
<connect gate="A" pin="C_2" pad="2"/>
<connect gate="A" pin="D" pad="12"/>
<connect gate="A" pin="D_2" pad="6"/>
<connect gate="A" pin="E" pad="11"/>
<connect gate="A" pin="F" pad="17"/>
<connect gate="A" pin="G" pad="16"/>
<connect gate="A" pin="LE" pad="5"/>
<connect gate="A" pin="RBI" pad="8"/>
<connect gate="A" pin="RBO" pad="10"/>
<connect gate="A" pin="VDD" pad="18"/>
<connect gate="A" pin="VSS" pad="9"/>
<connect gate="A" pin="~BI" pad="4"/>
<connect gate="A" pin="~LT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14513BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1353501" constant="no"/>
<attribute name="OC_NEWARK" value="71J5493" constant="no"/>
<attribute name="PACKAGE" value="PDIP-18" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14516BCPG" prefix="U">
<description>Binary Up/Down Counter</description>
<gates>
<gate name="A" symbol="MC14516BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C" pad="15"/>
<connect gate="A" pin="P0" pad="4"/>
<connect gate="A" pin="P1" pad="12"/>
<connect gate="A" pin="P2" pad="13"/>
<connect gate="A" pin="P3" pad="3"/>
<connect gate="A" pin="PE" pad="1"/>
<connect gate="A" pin="Q0" pad="6"/>
<connect gate="A" pin="Q1" pad="11"/>
<connect gate="A" pin="Q2" pad="14"/>
<connect gate="A" pin="Q3" pad="2"/>
<connect gate="A" pin="R" pad="9"/>
<connect gate="A" pin="U/D" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CARRY_IN" pad="5"/>
<connect gate="A" pin="~CARRY_OUT" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14516BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665293" constant="no"/>
<attribute name="OC_NEWARK" value="45J1108" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14518BCPG" prefix="U">
<description>Dual Up Counters</description>
<gates>
<gate name="A" symbol="MC14518BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CA" pad="1"/>
<connect gate="A" pin="CB" pad="9"/>
<connect gate="A" pin="EA" pad="2"/>
<connect gate="A" pin="EB" pad="10"/>
<connect gate="A" pin="Q0A" pad="3"/>
<connect gate="A" pin="Q0B" pad="11"/>
<connect gate="A" pin="Q1A" pad="4"/>
<connect gate="A" pin="Q1B" pad="12"/>
<connect gate="A" pin="Q2A" pad="5"/>
<connect gate="A" pin="Q2B" pad="13"/>
<connect gate="A" pin="Q3A" pad="6"/>
<connect gate="A" pin="Q3B" pad="14"/>
<connect gate="A" pin="RA" pad="7"/>
<connect gate="A" pin="RB" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14518BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665633" constant="no"/>
<attribute name="OC_NEWARK" value="45J1110" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14520BCPG" prefix="U">
<description>Dual Up Counters</description>
<gates>
<gate name="A" symbol="MC14520BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CA" pad="1"/>
<connect gate="A" pin="CB" pad="9"/>
<connect gate="A" pin="EA" pad="2"/>
<connect gate="A" pin="EB" pad="10"/>
<connect gate="A" pin="Q0A" pad="3"/>
<connect gate="A" pin="Q0B" pad="11"/>
<connect gate="A" pin="Q1A" pad="4"/>
<connect gate="A" pin="Q1B" pad="12"/>
<connect gate="A" pin="Q2A" pad="5"/>
<connect gate="A" pin="Q2B" pad="13"/>
<connect gate="A" pin="Q3A" pad="6"/>
<connect gate="A" pin="Q3B" pad="14"/>
<connect gate="A" pin="RA" pad="7"/>
<connect gate="A" pin="RB" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14520BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665676" constant="no"/>
<attribute name="OC_NEWARK" value="45J1111" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14521BCPG" prefix="U">
<description>24-Stage Frequency Divider</description>
<gates>
<gate name="A" symbol="MC14521BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="IN_1" pad="9"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="7"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="Q18" pad="10"/>
<connect gate="A" pin="Q19" pad="11"/>
<connect gate="A" pin="Q20" pad="12"/>
<connect gate="A" pin="Q21" pad="13"/>
<connect gate="A" pin="Q22" pad="14"/>
<connect gate="A" pin="Q23" pad="15"/>
<connect gate="A" pin="Q24" pad="1"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VDD_2" pad="5"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="VSS_2" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14521BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664793" constant="no"/>
<attribute name="OC_NEWARK" value="45J1112" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14521BDG" prefix="U">
<description>24-Stage Frequency Divider</description>
<gates>
<gate name="A" symbol="MC14521BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="IN_1" pad="9"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="OUT1" pad="7"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="Q18" pad="10"/>
<connect gate="A" pin="Q19" pad="11"/>
<connect gate="A" pin="Q20" pad="12"/>
<connect gate="A" pin="Q21" pad="13"/>
<connect gate="A" pin="Q22" pad="14"/>
<connect gate="A" pin="Q23" pad="15"/>
<connect gate="A" pin="Q24" pad="1"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VDD_2" pad="5"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="VSS_2" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14521BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1705943" constant="no"/>
<attribute name="OC_NEWARK" value="45J1113" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14528BCPG" prefix="U">
<description>Dual Monostable Multivibrator</description>
<gates>
<gate name="A" symbol="MC14528BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="12"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="11"/>
<connect gate="A" pin="CX1/RX1" pad="2"/>
<connect gate="A" pin="CX2/RX2" pad="14"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="1"/>
<connect gate="A" pin="VSS_2" pad="8"/>
<connect gate="A" pin="VSS_3" pad="15"/>
<connect gate="A" pin="~Q1" pad="7"/>
<connect gate="A" pin="~Q2" pad="9"/>
<connect gate="A" pin="~RESET_1" pad="3"/>
<connect gate="A" pin="~RESET_2" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14528BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665749" constant="no"/>
<attribute name="OC_NEWARK" value="45J1116" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14528BDG" prefix="U">
<description>Dual Monostable Multivibrator</description>
<gates>
<gate name="A" symbol="MC14528BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="12"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="11"/>
<connect gate="A" pin="CX1/RX1" pad="2"/>
<connect gate="A" pin="CX2/RX2" pad="14"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="15"/>
<connect gate="A" pin="VSS_2" pad="1"/>
<connect gate="A" pin="VSS_3" pad="8"/>
<connect gate="A" pin="~Q1" pad="7"/>
<connect gate="A" pin="~Q2" pad="9"/>
<connect gate="A" pin="~RESET_1" pad="3"/>
<connect gate="A" pin="~RESET_2" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14528BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666567" constant="no"/>
<attribute name="OC_NEWARK" value="26K3964" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14532BCPG" prefix="U">
<description>8-Bit Priority Encoder</description>
<gates>
<gate name="A" symbol="MC14532BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="D0" pad="10"/>
<connect gate="A" pin="D1" pad="11"/>
<connect gate="A" pin="D2" pad="12"/>
<connect gate="A" pin="D3" pad="13"/>
<connect gate="A" pin="D4" pad="1"/>
<connect gate="A" pin="D5" pad="2"/>
<connect gate="A" pin="D6" pad="3"/>
<connect gate="A" pin="D7" pad="4"/>
<connect gate="A" pin="EIN" pad="5"/>
<connect gate="A" pin="EOUT" pad="15"/>
<connect gate="A" pin="GS" pad="14"/>
<connect gate="A" pin="Q0" pad="9"/>
<connect gate="A" pin="Q1" pad="7"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14532BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665641" constant="no"/>
<attribute name="OC_NEWARK" value="45J1118" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14536BCPG" prefix="U">
<description>Programmable Timer</description>
<gates>
<gate name="A" symbol="MC14536BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="8-BYPASS" pad="6"/>
<connect gate="A" pin="A" pad="9"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="11"/>
<connect gate="A" pin="CLOCK_INH" pad="7"/>
<connect gate="A" pin="D" pad="12"/>
<connect gate="A" pin="DECODE" pad="13"/>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="MONO-IN" pad="15"/>
<connect gate="A" pin="OSC_INH" pad="14"/>
<connect gate="A" pin="OUT_1" pad="4"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="SET" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14536BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9664807" constant="no"/>
<attribute name="OC_NEWARK" value="26K3966" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14536BDWG" prefix="U">
<description>Programmable Timer</description>
<gates>
<gate name="A" symbol="MC14536BDWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="8-BYPASS" pad="6"/>
<connect gate="A" pin="A" pad="9"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="11"/>
<connect gate="A" pin="CLC_INH" pad="7"/>
<connect gate="A" pin="D" pad="12"/>
<connect gate="A" pin="DECODE" pad="13"/>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="MONO-IN" pad="15"/>
<connect gate="A" pin="OSC_INH" pad="14"/>
<connect gate="A" pin="OUT_1" pad="4"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="RESET" pad="2"/>
<connect gate="A" pin="SET" pad="1"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14536BDWG" constant="no"/>
<attribute name="OC_FARNELL" value="9665234" constant="no"/>
<attribute name="OC_NEWARK" value="26K3967" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14538BCPG" prefix="U">
<description>Monostable Multivibrator</description>
<gates>
<gate name="A" symbol="MC14538BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AA" pad="4"/>
<connect gate="A" pin="AB" pad="12"/>
<connect gate="A" pin="CX/RXA" pad="2"/>
<connect gate="A" pin="CX/RXB" pad="14"/>
<connect gate="A" pin="QA" pad="6"/>
<connect gate="A" pin="QB" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="VSS_2" pad="1"/>
<connect gate="A" pin="VSS_3" pad="15"/>
<connect gate="A" pin="~BA" pad="5"/>
<connect gate="A" pin="~BB" pad="11"/>
<connect gate="A" pin="~QA" pad="7"/>
<connect gate="A" pin="~QB" pad="9"/>
<connect gate="A" pin="~RESET_A" pad="3"/>
<connect gate="A" pin="~RESET_B" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14538BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665650" constant="no"/>
<attribute name="OC_NEWARK" value="45J1120" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14538BDG" prefix="U">
<description>Dual Precision Retriggerable/Resettable Monostable Multivibrator</description>
<gates>
<gate name="A" symbol="MC14538BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="AA" pad="4"/>
<connect gate="A" pin="AB" pad="12"/>
<connect gate="A" pin="CX/RXA" pad="2"/>
<connect gate="A" pin="CX/RXB" pad="14"/>
<connect gate="A" pin="QA" pad="6"/>
<connect gate="A" pin="QB" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="VSS_2" pad="15"/>
<connect gate="A" pin="VSS_3" pad="1"/>
<connect gate="A" pin="~BA" pad="5"/>
<connect gate="A" pin="~BB" pad="11"/>
<connect gate="A" pin="~QA" pad="7"/>
<connect gate="A" pin="~QB" pad="9"/>
<connect gate="A" pin="~RESET_A" pad="3"/>
<connect gate="A" pin="~RESET_B" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14538BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666575" constant="no"/>
<attribute name="OC_NEWARK" value="45J1121" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14538BDWG" prefix="U">
<description>Dual Precision Retriggerable/Resettable Monostable Multivibrator</description>
<gates>
<gate name="A" symbol="MC14538BDWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="AA" pad="4"/>
<connect gate="A" pin="AB" pad="12"/>
<connect gate="A" pin="CX/RXA" pad="2"/>
<connect gate="A" pin="CX/RXB" pad="14"/>
<connect gate="A" pin="QA" pad="6"/>
<connect gate="A" pin="QB" pad="10"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="1"/>
<connect gate="A" pin="VSS_2" pad="15"/>
<connect gate="A" pin="VSS_3" pad="8"/>
<connect gate="A" pin="~BA" pad="5"/>
<connect gate="A" pin="~BB" pad="11"/>
<connect gate="A" pin="~QA" pad="7"/>
<connect gate="A" pin="~QB" pad="9"/>
<connect gate="A" pin="~RESET_A" pad="3"/>
<connect gate="A" pin="~RESET_B" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14538BDWG" constant="no"/>
<attribute name="OC_FARNELL" value="9664920" constant="no"/>
<attribute name="OC_NEWARK" value="26K3968" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14541BCPG" prefix="U">
<description>Programmable Timer</description>
<gates>
<gate name="A" symbol="MC14541BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A" pad="12"/>
<connect gate="A" pin="AR" pad="5"/>
<connect gate="A" pin="B" pad="13"/>
<connect gate="A" pin="CTC" pad="2"/>
<connect gate="A" pin="MODE" pad="10"/>
<connect gate="A" pin="MR" pad="6"/>
<connect gate="A" pin="NC" pad="11"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="Q" pad="8"/>
<connect gate="A" pin="Q/~Q_SEL" pad="9"/>
<connect gate="A" pin="RS" pad="3"/>
<connect gate="A" pin="RTC" pad="1"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14541BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665668" constant="no"/>
<attribute name="OC_NEWARK" value="45J1124" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14541BDG" prefix="U">
<description>Programmable Timer</description>
<gates>
<gate name="A" symbol="MC14541BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A" pad="12"/>
<connect gate="A" pin="AR" pad="5"/>
<connect gate="A" pin="B" pad="13"/>
<connect gate="A" pin="CTC" pad="2"/>
<connect gate="A" pin="MODE" pad="10"/>
<connect gate="A" pin="MR" pad="6"/>
<connect gate="A" pin="NC" pad="11"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="Q" pad="8"/>
<connect gate="A" pin="Q/~Q_SEL" pad="9"/>
<connect gate="A" pin="RS" pad="3"/>
<connect gate="A" pin="RTC" pad="1"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14541BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666583" constant="no"/>
<attribute name="OC_NEWARK" value="26K3971" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14541BDR2G" prefix="U">
<description>Programmable Timer</description>
<gates>
<gate name="A" symbol="MC14541BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A" pad="12"/>
<connect gate="A" pin="AR" pad="5"/>
<connect gate="A" pin="B" pad="13"/>
<connect gate="A" pin="CTC" pad="2"/>
<connect gate="A" pin="MODE" pad="10"/>
<connect gate="A" pin="MR" pad="6"/>
<connect gate="A" pin="NC" pad="11"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="Q" pad="8"/>
<connect gate="A" pin="Q/~Q_SEL" pad="9"/>
<connect gate="A" pin="RS" pad="3"/>
<connect gate="A" pin="RTC" pad="1"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14541BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1365197" constant="no"/>
<attribute name="OC_NEWARK" value="84K8755" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14543BDG" prefix="U">
<description>BCD-to-Seven Segment Latch/Decoder/Driver for Liquid Crystals</description>
<gates>
<gate name="A" symbol="MC14543BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="9"/>
<connect gate="A" pin="A_2" pad="5"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="BI" pad="7"/>
<connect gate="A" pin="B_2" pad="3"/>
<connect gate="A" pin="C" pad="11"/>
<connect gate="A" pin="C_2" pad="2"/>
<connect gate="A" pin="D" pad="12"/>
<connect gate="A" pin="D_2" pad="4"/>
<connect gate="A" pin="E" pad="13"/>
<connect gate="A" pin="F" pad="15"/>
<connect gate="A" pin="G" pad="14"/>
<connect gate="A" pin="LD" pad="1"/>
<connect gate="A" pin="PH" pad="6"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14543BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9664939" constant="no"/>
<attribute name="OC_NEWARK" value="71J5499" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14551BCPG" prefix="U">
<description>Multiplexer/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC14551BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CONTROL" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="W" pad="14"/>
<connect gate="A" pin="W0" pad="15"/>
<connect gate="A" pin="W1" pad="1"/>
<connect gate="A" pin="X" pad="4"/>
<connect gate="A" pin="X0" pad="2"/>
<connect gate="A" pin="X1" pad="3"/>
<connect gate="A" pin="Y" pad="5"/>
<connect gate="A" pin="Y0" pad="6"/>
<connect gate="A" pin="Y1" pad="10"/>
<connect gate="A" pin="Z" pad="13"/>
<connect gate="A" pin="Z0" pad="11"/>
<connect gate="A" pin="Z1" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14551BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665072" constant="no"/>
<attribute name="OC_NEWARK" value="45J1130" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14551BDG" prefix="U">
<description>Quad 2-Channel Analog Multiplexer/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC14551BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CONTROL" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="W" pad="14"/>
<connect gate="A" pin="W0" pad="15"/>
<connect gate="A" pin="W1" pad="1"/>
<connect gate="A" pin="X" pad="4"/>
<connect gate="A" pin="X0" pad="2"/>
<connect gate="A" pin="X1" pad="3"/>
<connect gate="A" pin="Y" pad="5"/>
<connect gate="A" pin="Y0" pad="6"/>
<connect gate="A" pin="Y1" pad="10"/>
<connect gate="A" pin="Z" pad="13"/>
<connect gate="A" pin="Z0" pad="11"/>
<connect gate="A" pin="Z1" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14551BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9665242" constant="no"/>
<attribute name="OC_NEWARK" value="71J5501" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14553BCPG" prefix="U">
<description>3-Digit BCD Counter</description>
<gates>
<gate name="A" symbol="MC14553BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CIA" pad="4"/>
<connect gate="A" pin="CIB" pad="3"/>
<connect gate="A" pin="CLK" pad="12"/>
<connect gate="A" pin="DIS" pad="11"/>
<connect gate="A" pin="LE" pad="10"/>
<connect gate="A" pin="MR" pad="13"/>
<connect gate="A" pin="O.F" pad="14"/>
<connect gate="A" pin="Q0" pad="9"/>
<connect gate="A" pin="Q1" pad="7"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="5"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~DS1" pad="2"/>
<connect gate="A" pin="~DS2" pad="1"/>
<connect gate="A" pin="~DS3" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14553BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1131" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14555BCPG" prefix="U">
<description>Dual Binary to 1-of-4 Decoder/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC14555BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="AA" pad="2"/>
<connect gate="A" pin="AB" pad="14"/>
<connect gate="A" pin="BA" pad="3"/>
<connect gate="A" pin="BB" pad="13"/>
<connect gate="A" pin="Q0A" pad="4"/>
<connect gate="A" pin="Q0B" pad="12"/>
<connect gate="A" pin="Q1A" pad="5"/>
<connect gate="A" pin="Q1B" pad="11"/>
<connect gate="A" pin="Q2A" pad="6"/>
<connect gate="A" pin="Q2B" pad="10"/>
<connect gate="A" pin="Q3A" pad="7"/>
<connect gate="A" pin="Q3B" pad="9"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~EA" pad="1"/>
<connect gate="A" pin="~EB" pad="15"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14555BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665277" constant="no"/>
<attribute name="OC_NEWARK" value="45J1132" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14557BCPG" prefix="U">
<description>Shift Register</description>
<gates>
<gate name="A" symbol="MC14557BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="7"/>
<connect gate="A" pin="A/B_SEL" pad="9"/>
<connect gate="A" pin="B" pad="6"/>
<connect gate="A" pin="CLK" pad="4"/>
<connect gate="A" pin="L1" pad="2"/>
<connect gate="A" pin="L16" pad="13"/>
<connect gate="A" pin="L2" pad="1"/>
<connect gate="A" pin="L32" pad="12"/>
<connect gate="A" pin="L4" pad="15"/>
<connect gate="A" pin="L8" pad="14"/>
<connect gate="A" pin="Q" pad="10"/>
<connect gate="A" pin="RESET" pad="3"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="~CE" pad="5"/>
<connect gate="A" pin="~Q" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14557BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1191819" constant="no"/>
<attribute name="OC_NEWARK" value="45J1134" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1455BP1G" prefix="U">
<description>Timers</description>
<gates>
<gate name="A" symbol="MC1455BP1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="CONTROL_VOLTAGE" pad="5"/>
<connect gate="A" pin="DISCHARGE" pad="7"/>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="OUTPUT" pad="3"/>
<connect gate="A" pin="RESET" pad="4"/>
<connect gate="A" pin="THRESHOLD" pad="6"/>
<connect gate="A" pin="TRIGGER" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1455BP1G" constant="no"/>
<attribute name="OC_FARNELL" value="1468729" constant="no"/>
<attribute name="OC_NEWARK" value="98H0658" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1455P1G" prefix="U">
<description>Timers</description>
<gates>
<gate name="A" symbol="MC1455P1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="CONTROL_VOLTAGE" pad="5"/>
<connect gate="A" pin="DISCHARGE" pad="7"/>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="OUTPUT" pad="3"/>
<connect gate="A" pin="RESET" pad="4"/>
<connect gate="A" pin="THRESHOLD" pad="6"/>
<connect gate="A" pin="TRIGGER" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1455P1G" constant="no"/>
<attribute name="OC_FARNELL" value="9664394" constant="no"/>
<attribute name="OC_NEWARK" value="88H4718" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14569BCPG" prefix="U">
<description>Programmable Divide-By-N Dual 4-Bit Binary/BCD Down Counter</description>
<gates>
<gate name="A" symbol="MC14569BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CASCADE_FEEDBACK" pad="7"/>
<connect gate="A" pin="CLOCK" pad="9"/>
<connect gate="A" pin="CTL1" pad="2"/>
<connect gate="A" pin="CTL2" pad="10"/>
<connect gate="A" pin="P0" pad="3"/>
<connect gate="A" pin="P1" pad="4"/>
<connect gate="A" pin="P2" pad="5"/>
<connect gate="A" pin="P3" pad="6"/>
<connect gate="A" pin="P4" pad="11"/>
<connect gate="A" pin="P5" pad="12"/>
<connect gate="A" pin="P6" pad="13"/>
<connect gate="A" pin="P7" pad="14"/>
<connect gate="A" pin="Q" pad="15"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
<connect gate="A" pin="ZERO_DETECT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14569BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="1191831" constant="no"/>
<attribute name="OC_NEWARK" value="45J1136" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14584BCPG" prefix="U">
<description>Hex Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC14584BCPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN1" pad="1"/>
<connect gate="A" pin="IN2" pad="3"/>
<connect gate="A" pin="IN3" pad="5"/>
<connect gate="A" pin="IN4" pad="9"/>
<connect gate="A" pin="IN5" pad="11"/>
<connect gate="A" pin="IN6" pad="13"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="4"/>
<connect gate="A" pin="OUT3" pad="6"/>
<connect gate="A" pin="OUT4" pad="8"/>
<connect gate="A" pin="OUT5" pad="10"/>
<connect gate="A" pin="OUT6" pad="12"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14584BCPG" constant="no"/>
<attribute name="OC_FARNELL" value="9665099" constant="no"/>
<attribute name="OC_NEWARK" value="45J1139" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14584BDG" prefix="U">
<description>Hex Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC14584BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="IN_3" pad="5"/>
<connect gate="A" pin="IN_4" pad="9"/>
<connect gate="A" pin="IN_5" pad="11"/>
<connect gate="A" pin="IN_6" pad="13"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="8"/>
<connect gate="A" pin="OUT_5" pad="10"/>
<connect gate="A" pin="OUT_6" pad="12"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14584BDG" constant="no"/>
<attribute name="OC_FARNELL" value="9665102" constant="no"/>
<attribute name="OC_NEWARK" value="45J1140" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14584BDR2G" prefix="U">
<description>Hex Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC14584BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN_1" pad="1"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="IN_3" pad="5"/>
<connect gate="A" pin="IN_4" pad="9"/>
<connect gate="A" pin="IN_5" pad="11"/>
<connect gate="A" pin="IN_6" pad="13"/>
<connect gate="A" pin="OUT_1" pad="2"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="8"/>
<connect gate="A" pin="OUT_5" pad="10"/>
<connect gate="A" pin="OUT_6" pad="12"/>
<connect gate="A" pin="VDD" pad="14"/>
<connect gate="A" pin="VSS" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14584BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1365199" constant="no"/>
<attribute name="OC_NEWARK" value="84K8756" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC14585BDG" prefix="U">
<description>4-Bit Magnitude Comparator</description>
<gates>
<gate name="A" symbol="MC14585BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="(A_&lt;_B)IN" pad="5"/>
<connect gate="A" pin="(A_&lt;_B)OUT" pad="12"/>
<connect gate="A" pin="(A_=_B)IN" pad="6"/>
<connect gate="A" pin="(A_=_B)OUT" pad="3"/>
<connect gate="A" pin="(A_&gt;_B)IN" pad="4"/>
<connect gate="A" pin="(A_&gt;_B)OUT" pad="13"/>
<connect gate="A" pin="A0" pad="10"/>
<connect gate="A" pin="A1" pad="7"/>
<connect gate="A" pin="A2" pad="2"/>
<connect gate="A" pin="A3" pad="15"/>
<connect gate="A" pin="B0" pad="11"/>
<connect gate="A" pin="B1" pad="9"/>
<connect gate="A" pin="B2" pad="1"/>
<connect gate="A" pin="B3" pad="14"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VSS" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC14585BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1191839" constant="no"/>
<attribute name="OC_NEWARK" value="71J5507" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1488DG" prefix="U">
<description>Quad Line EIA-232D Driver</description>
<gates>
<gate name="A" symbol="MC1488DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B1" pad="4"/>
<connect gate="A" pin="IN_B2" pad="5"/>
<connect gate="A" pin="IN_C1" pad="10"/>
<connect gate="A" pin="IN_C2" pad="9"/>
<connect gate="A" pin="IN_D1" pad="13"/>
<connect gate="A" pin="IN_D2" pad="12"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="8"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="VEE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1488DG" constant="no"/>
<attribute name="OC_FARNELL" value="1147618" constant="no"/>
<attribute name="OC_NEWARK" value="26K3980" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1488PG" prefix="U">
<description>Quad Line EIA-232D Driver</description>
<gates>
<gate name="A" symbol="MC1488PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B1" pad="4"/>
<connect gate="A" pin="IN_B2" pad="5"/>
<connect gate="A" pin="IN_C1" pad="10"/>
<connect gate="A" pin="IN_C2" pad="9"/>
<connect gate="A" pin="IN_D1" pad="13"/>
<connect gate="A" pin="IN_D2" pad="12"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="8"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="VEE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1488PG" constant="no"/>
<attribute name="OC_FARNELL" value="9664530" constant="no"/>
<attribute name="OC_NEWARK" value="98H0659" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1489ADG" prefix="U">
<description>Quad Line EIA-232D Receivers</description>
<gates>
<gate name="A" symbol="MC1489ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN_A" pad="1"/>
<connect gate="A" pin="IN_B" pad="4"/>
<connect gate="A" pin="IN_C" pad="10"/>
<connect gate="A" pin="IN_D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="8"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="RESPONSE_CONTROL_A" pad="2"/>
<connect gate="A" pin="RESPONSE_CONTROL_B" pad="5"/>
<connect gate="A" pin="RESPONSE_CONTROL_C" pad="9"/>
<connect gate="A" pin="RESPONSE_CONTROL_D" pad="12"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1489ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1350100" constant="no"/>
<attribute name="OC_NEWARK" value="42K0556" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1489DG" prefix="U">
<description>Quad Line EIA-232D Receivers</description>
<gates>
<gate name="A" symbol="MC1489DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN_A" pad="1"/>
<connect gate="A" pin="IN_B" pad="4"/>
<connect gate="A" pin="IN_C" pad="10"/>
<connect gate="A" pin="IN_D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="8"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="RESPONSE_CONTROL_A" pad="2"/>
<connect gate="A" pin="RESPONSE_CONTROL_B" pad="5"/>
<connect gate="A" pin="RESPONSE_CONTROL_C" pad="9"/>
<connect gate="A" pin="RESPONSE_CONTROL_D" pad="12"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1489DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607611" constant="no"/>
<attribute name="OC_NEWARK" value="45J1146" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1489PG" prefix="U">
<description>Quad Line EIA-232D Receivers</description>
<gates>
<gate name="A" symbol="MC1489PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN_A" pad="1"/>
<connect gate="A" pin="IN_B" pad="4"/>
<connect gate="A" pin="IN_C" pad="10"/>
<connect gate="A" pin="IN_D" pad="13"/>
<connect gate="A" pin="OUT_A" pad="3"/>
<connect gate="A" pin="OUT_B" pad="6"/>
<connect gate="A" pin="OUT_C" pad="8"/>
<connect gate="A" pin="OUT_D" pad="11"/>
<connect gate="A" pin="RESPONSE_COTROL_A" pad="2"/>
<connect gate="A" pin="RESPONSE_COTROL_B" pad="5"/>
<connect gate="A" pin="RESPONSE_COTROL_C" pad="9"/>
<connect gate="A" pin="RESPONSE_COTROL_D" pad="12"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1489PG" constant="no"/>
<attribute name="OC_FARNELL" value="1211144" constant="no"/>
<attribute name="OC_NEWARK" value="98H0661" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1496BPG" prefix="U">
<description>Balanced Modulators /Demodulators</description>
<gates>
<gate name="A" symbol="MC1496BPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="BIAS" pad="5"/>
<connect gate="A" pin="CARRIER_IN" pad="10"/>
<connect gate="A" pin="GAIN_ADJUST" pad="2"/>
<connect gate="A" pin="GAIN_ADJUST_2" pad="3"/>
<connect gate="A" pin="IN_CARRIER" pad="8"/>
<connect gate="A" pin="N/C" pad="7"/>
<connect gate="A" pin="N/C_2" pad="11"/>
<connect gate="A" pin="N/C_3" pad="9"/>
<connect gate="A" pin="N/C_4" pad="13"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="OUT_2" pad="12"/>
<connect gate="A" pin="SIGNAL_IN" pad="1"/>
<connect gate="A" pin="SIGNAL_IN_2" pad="4"/>
<connect gate="A" pin="VEE" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1496BPG" constant="no"/>
<attribute name="OC_FARNELL" value="1125967" constant="no"/>
<attribute name="OC_NEWARK" value="26K3981" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC1496DR2G" prefix="U">
<description>Balanced Modulators/Demodulators</description>
<gates>
<gate name="A" symbol="MC1496DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="BIAS" pad="5"/>
<connect gate="A" pin="CARRIER_IN" pad="10"/>
<connect gate="A" pin="GAIN_ADJ" pad="2"/>
<connect gate="A" pin="GAIN_ADJ_2" pad="3"/>
<connect gate="A" pin="IN_CARRIER" pad="8"/>
<connect gate="A" pin="N/C" pad="13"/>
<connect gate="A" pin="N/C_2" pad="7"/>
<connect gate="A" pin="N/C_3" pad="9"/>
<connect gate="A" pin="N/C_4" pad="11"/>
<connect gate="A" pin="OUT" pad="12"/>
<connect gate="A" pin="OUT_2" pad="6"/>
<connect gate="A" pin="SIG_IN" pad="4"/>
<connect gate="A" pin="SIG_IN_2" pad="1"/>
<connect gate="A" pin="VEE" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC1496DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1651904" constant="no"/>
<attribute name="OC_NEWARK" value="45J1148" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC3302PG" prefix="U">
<description>Comparators</description>
<gates>
<gate name="A" symbol="MC3302PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="+IN1" pad="5"/>
<connect gate="A" pin="+IN2" pad="7"/>
<connect gate="A" pin="+IN3" pad="9"/>
<connect gate="A" pin="+IN4" pad="11"/>
<connect gate="A" pin="-IN1" pad="4"/>
<connect gate="A" pin="-IN2" pad="6"/>
<connect gate="A" pin="-IN3" pad="8"/>
<connect gate="A" pin="-IN4" pad="10"/>
<connect gate="A" pin="GND" pad="12"/>
<connect gate="A" pin="OUT1" pad="2"/>
<connect gate="A" pin="OUT2" pad="1"/>
<connect gate="A" pin="OUT3" pad="14"/>
<connect gate="A" pin="OUT4" pad="13"/>
<connect gate="A" pin="VCC" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC3302PG" constant="no"/>
<attribute name="OC_FARNELL" value="1468733" constant="no"/>
<attribute name="OC_NEWARK" value="71J5510" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33033DWR2G" prefix="U">
<description>Brushless DC Motor Controller</description>
<gates>
<gate name="A" symbol="MC33033DWR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="60_DEG/120DEG__SELECT" pad="18"/>
<connect gate="A" pin="AB" pad="17"/>
<connect gate="A" pin="AT" pad="2"/>
<connect gate="A" pin="BB" pad="16"/>
<connect gate="A" pin="BT" pad="1"/>
<connect gate="A" pin="CB" pad="15"/>
<connect gate="A" pin="CT" pad="20"/>
<connect gate="A" pin="CURRENT_SENSE_POS" pad="12"/>
<connect gate="A" pin="ERROR_AMP_NEG" pad="10"/>
<connect gate="A" pin="ERROR_AMP_OUT/PWM_INPUT" pad="11"/>
<connect gate="A" pin="ERROR_AMP_POS" pad="9"/>
<connect gate="A" pin="FWD/REV" pad="3"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="OSCILLATOR" pad="8"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="19"/>
<connect gate="A" pin="REFERENCE_OUTPUT" pad="7"/>
<connect gate="A" pin="SA" pad="4"/>
<connect gate="A" pin="SB" pad="5"/>
<connect gate="A" pin="SC" pad="6"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33033DWR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="84K8758" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33035DWG" prefix="U">
<description>Brushless DC Motor Controller</description>
<gates>
<gate name="A" symbol="MC33035DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-24N">
<connects>
<connect gate="A" pin="60°/~120°_SELECT" pad="22"/>
<connect gate="A" pin="AB" pad="21"/>
<connect gate="A" pin="AT" pad="2"/>
<connect gate="A" pin="BB" pad="20"/>
<connect gate="A" pin="BRAKE" pad="23"/>
<connect gate="A" pin="BT" pad="1"/>
<connect gate="A" pin="CB" pad="19"/>
<connect gate="A" pin="CT" pad="24"/>
<connect gate="A" pin="CURRENT_SENSE_INVERTING_INPUT" pad="15"/>
<connect gate="A" pin="CURRENT_SENSE_NONINVERTING_INPUT" pad="9"/>
<connect gate="A" pin="ERROR_AMP_INVERTING_INPUT" pad="12"/>
<connect gate="A" pin="ERROR_AMP_NONINVERTING_INPUT" pad="11"/>
<connect gate="A" pin="ERROR_AMP_OUT_PWM_INPUT" pad="13"/>
<connect gate="A" pin="FWD/REV" pad="3"/>
<connect gate="A" pin="GND" pad="16"/>
<connect gate="A" pin="OSCILLATOR" pad="10"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="7"/>
<connect gate="A" pin="REFERENCE_OUTPUT" pad="8"/>
<connect gate="A" pin="SA" pad="4"/>
<connect gate="A" pin="SB" pad="5"/>
<connect gate="A" pin="SC" pad="6"/>
<connect gate="A" pin="VC" pad="18"/>
<connect gate="A" pin="VCC" pad="17"/>
<connect gate="A" pin="~FAULT_OUTPUT" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33035DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1652428" constant="no"/>
<attribute name="OC_NEWARK" value="26K3990" constant="no"/>
<attribute name="PACKAGE" value="SOIC-24" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33039DG" prefix="U">
<description>Closed Loop Brushless Motor Adapter</description>
<gates>
<gate name="A" symbol="MC33039DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="A" pad="3"/>
<connect gate="A" pin="B" pad="2"/>
<connect gate="A" pin="C" pad="1"/>
<connect gate="A" pin="FOUT" pad="5"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="RT/CT" pad="6"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~A" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33039DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211112" constant="no"/>
<attribute name="OC_NEWARK" value="45J1154" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC3303PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC3303PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC3303PG" constant="no"/>
<attribute name="OC_FARNELL" value="1426358" constant="no"/>
<attribute name="OC_NEWARK" value="26K3986" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33060ADG" prefix="U">
<description>Fixed Frequency, PWM, Voltage Mode Single Ended Controllers</description>
<gates>
<gate name="A" symbol="MC33060ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="COMPEN/PWM_COMP_INPUT" pad="3"/>
<connect gate="A" pin="CT" pad="5"/>
<connect gate="A" pin="DEAD-TIME_CONTROL" pad="4"/>
<connect gate="A" pin="E" pad="8"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="N.C." pad="11"/>
<connect gate="A" pin="NEG_IN" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="13"/>
<connect gate="A" pin="POS_IN" pad="14"/>
<connect gate="A" pin="POS_IN_2" pad="1"/>
<connect gate="A" pin="RT" pad="6"/>
<connect gate="A" pin="VCC" pad="10"/>
<connect gate="A" pin="VREF" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33060ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1468735" constant="no"/>
<attribute name="OC_NEWARK" value="71J5511" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33063ADG" prefix="U">
<description>Step-Up/Down/Inverting Switching Regulators</description>
<gates>
<gate name="A" symbol="MC33063ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMPTR_NEG" pad="5"/>
<connect gate="A" pin="CT" pad="3"/>
<connect gate="A" pin="DRVR_C" pad="8"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SENSE" pad="7"/>
<connect gate="A" pin="SW_C" pad="1"/>
<connect gate="A" pin="SW_E" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33063ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9664440" constant="no"/>
<attribute name="OC_NEWARK" value="88H4720" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33063ADR2G" prefix="U">
<description>Step-Up/Down/Inverting Switching Regulators</description>
<gates>
<gate name="A" symbol="MC33063ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMPTR_NEG" pad="5"/>
<connect gate="A" pin="CT" pad="3"/>
<connect gate="A" pin="DRVR_C" pad="8"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SENSE" pad="7"/>
<connect gate="A" pin="SW_C" pad="1"/>
<connect gate="A" pin="SW_E" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33063ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1569173" constant="no"/>
<attribute name="OC_NEWARK" value="88H4721" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33063AP1G" prefix="U">
<description>Regulators</description>
<gates>
<gate name="A" symbol="MC33063AP1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="COMP_NEG" pad="5"/>
<connect gate="A" pin="CT" pad="3"/>
<connect gate="A" pin="DRVR_C" pad="8"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SEN" pad="7"/>
<connect gate="A" pin="SW_C" pad="1"/>
<connect gate="A" pin="SW_E" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33063AP1G" constant="no"/>
<attribute name="OC_FARNELL" value="9664432" constant="no"/>
<attribute name="OC_NEWARK" value="45J1156" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33064D-5G" prefix="U">
<description>Undervoltage Sensing Circuit</description>
<gates>
<gate name="A" symbol="MC33064D-5G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT" pad="2"/>
<connect gate="A" pin="N.C." pad="7"/>
<connect gate="A" pin="N.C._2" pad="3"/>
<connect gate="A" pin="N.C._3" pad="8"/>
<connect gate="A" pin="N.C._4" pad="5"/>
<connect gate="A" pin="N.C._5" pad="6"/>
<connect gate="A" pin="~RESET" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33064D-5G" constant="no"/>
<attribute name="OC_FARNELL" value="1211114" constant="no"/>
<attribute name="OC_NEWARK" value="26K3992" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33064D-5R2G" prefix="U">
<description>Undervoltage Sensing Circuit</description>
<gates>
<gate name="A" symbol="MC33064D-5R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT" pad="2"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="5"/>
<connect gate="A" pin="N.C._3" pad="3"/>
<connect gate="A" pin="N.C._4" pad="7"/>
<connect gate="A" pin="N.C._5" pad="6"/>
<connect gate="A" pin="~RESET" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33064D-5R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1155800" constant="no"/>
<attribute name="OC_NEWARK" value="98H0668" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33071ADG" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33071ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NEG_IN" pad="2"/>
<connect gate="A" pin="OFFSET_NULL" pad="1"/>
<connect gate="A" pin="OFFSET_NULL_2" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS_IN" pad="3"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33071ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1155801" constant="no"/>
<attribute name="OC_NEWARK" value="98H0669" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33071APG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33071APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN" pad="3"/>
<connect gate="A" pin="IN_2" pad="2"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="OFS" pad="5"/>
<connect gate="A" pin="OFS_2" pad="1"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33071APG" constant="no"/>
<attribute name="OC_FARNELL" value="1315259" constant="no"/>
<attribute name="OC_NEWARK" value="42K0570" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33072APG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33072APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33072APG" constant="no"/>
<attribute name="OC_FARNELL" value="1147620" constant="no"/>
<attribute name="OC_NEWARK" value="26K3998" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33072DG" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33072DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33072DG" constant="no"/>
<attribute name="OC_FARNELL" value="1651872" constant="no"/>
<attribute name="OC_NEWARK" value="71J5514" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33072DR2G" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33072DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33072DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1261138" constant="no"/>
<attribute name="OC_NEWARK" value="88H4723" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33072PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33072PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33072PG" constant="no"/>
<attribute name="OC_FARNELL" value="1191841" constant="no"/>
<attribute name="OC_NEWARK" value="98H0672" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074ADG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33074ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1136151" constant="no"/>
<attribute name="OC_NEWARK" value="45J1159" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074ADR2G" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33074ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="98H0673" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074ADTBG" prefix="U">
<description>Single Supply 3.0 V to 44 V OPAMPs</description>
<gates>
<gate name="A" symbol="MC33074ADTBG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074ADTBG" constant="no"/>
<attribute name="OC_FARNELL" value="1705871" constant="no"/>
<attribute name="OC_NEWARK" value="42K0572" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074APG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33074APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074APG" constant="no"/>
<attribute name="OC_FARNELL" value="1126236" constant="no"/>
<attribute name="OC_NEWARK" value="42K0574" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33074DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211115" constant="no"/>
<attribute name="OC_NEWARK" value="45J1160" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074DR2G" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33074DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="98H0674" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33074PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33074PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="10"/>
<connect gate="A" pin="IN_3_2" pad="9"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33074PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666800" constant="no"/>
<attribute name="OC_NEWARK" value="26K3999" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33077DG" prefix="U">
<description>Low Noise Dual Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33077DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33077DG" constant="no"/>
<attribute name="OC_FARNELL" value="1211116" constant="no"/>
<attribute name="OC_NEWARK" value="98H0675" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33078DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33078DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="+IN_1" pad="3"/>
<connect gate="A" pin="+IN_2" pad="5"/>
<connect gate="A" pin="-IN_1" pad="2"/>
<connect gate="A" pin="-IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33078DG" constant="no"/>
<attribute name="OC_FARNELL" value="9665323" constant="no"/>
<attribute name="OC_NEWARK" value="71J5515" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33079DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33079DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="5"/>
<connect gate="A" pin="IN2_2" pad="6"/>
<connect gate="A" pin="IN3" pad="9"/>
<connect gate="A" pin="IN3_2" pad="10"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33079DG" constant="no"/>
<attribute name="OC_FARNELL" value="9665331" constant="no"/>
<attribute name="OC_NEWARK" value="98H0677" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33079PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33079PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33079PG" constant="no"/>
<attribute name="OC_FARNELL" value="9665030" constant="no"/>
<attribute name="OC_NEWARK" value="98H0678" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33151PG" prefix="U">
<description>Dual MOSFET Drivers</description>
<gates>
<gate name="A" symbol="MC33151PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="DRIVE_OUTPUT_A" pad="7"/>
<connect gate="A" pin="DRIVE_OUTPUT_B" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="I_A" pad="2"/>
<connect gate="A" pin="I_B" pad="4"/>
<connect gate="A" pin="N.C" pad="8"/>
<connect gate="A" pin="N.C_2" pad="1"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33151PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666770" constant="no"/>
<attribute name="OC_NEWARK" value="45J1165" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33152DG" prefix="U">
<description>High Speed Dual MOSFET Drivers</description>
<gates>
<gate name="A" symbol="MC33152DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="DRVR_OUTA" pad="7"/>
<connect gate="A" pin="DRVR_OUTB" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="4"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="1"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33152DG" constant="no"/>
<attribute name="OC_FARNELL" value="1191817" constant="no"/>
<attribute name="OC_NEWARK" value="26K4001" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33152PG" prefix="U">
<description>Dual MOSFET Drivers</description>
<gates>
<gate name="A" symbol="MC33152PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="DRIVE_OUTPUT_A" pad="7"/>
<connect gate="A" pin="DRIVE_OUTPUT_B" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="I_A" pad="2"/>
<connect gate="A" pin="I_B" pad="4"/>
<connect gate="A" pin="N.C" pad="8"/>
<connect gate="A" pin="N.C_2" pad="1"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33152PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666788" constant="no"/>
<attribute name="OC_NEWARK" value="45J1167" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33153DG" prefix="U">
<description>Single IGBT Gate Driver</description>
<gates>
<gate name="A" symbol="MC33153DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CURRENT_SEN_IN" pad="1"/>
<connect gate="A" pin="DRIVE_OUT" pad="5"/>
<connect gate="A" pin="FAULT_BLANKING/DESATURATION_IN" pad="8"/>
<connect gate="A" pin="FAULT_OUT" pad="7"/>
<connect gate="A" pin="KELVIN_GND" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
<connect gate="A" pin="VEE" pad="3"/>
<connect gate="A" pin="~INPUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33153DG" constant="no"/>
<attribute name="OC_FARNELL" value="1104702" constant="no"/>
<attribute name="OC_NEWARK" value="42K0579" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33153DR2G" prefix="U">
<description>Single IGBT Gate Driver</description>
<gates>
<gate name="A" symbol="MC33153DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CURRENT_SENSE_IN" pad="1"/>
<connect gate="A" pin="DRIVE_OUT" pad="5"/>
<connect gate="A" pin="FAULT_BLANKING/DESATURATION_IN" pad="8"/>
<connect gate="A" pin="FAULT_OUT" pad="7"/>
<connect gate="A" pin="KELVIN_GND" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
<connect gate="A" pin="VEE" pad="3"/>
<connect gate="A" pin="~INPUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33153DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1278011" constant="no"/>
<attribute name="OC_NEWARK" value="42K0580" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33153PG" prefix="U">
<description>Single IGBT Gate Driver</description>
<gates>
<gate name="A" symbol="MC33153PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="DR_OUT" pad="5"/>
<connect gate="A" pin="FAULT_BLANKING/DESATURATION_INPUT" pad="8"/>
<connect gate="A" pin="FLT_OUT" pad="7"/>
<connect gate="A" pin="ISEN_IN" pad="1"/>
<connect gate="A" pin="KELVIN_GND" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
<connect gate="A" pin="VEE" pad="3"/>
<connect gate="A" pin="~INPUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33153PG" constant="no"/>
<attribute name="OC_FARNELL" value="1104713" constant="no"/>
<attribute name="OC_NEWARK" value="42K0581" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33161DG" prefix="U">
<description>Universal Voltage Monitors</description>
<gates>
<gate name="A" symbol="MC33161DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="MODE" pad="7"/>
<connect gate="A" pin="OUT_1" pad="6"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VREF" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33161DG" constant="no"/>
<attribute name="OC_FARNELL" value="1192059" constant="no"/>
<attribute name="OC_NEWARK" value="98H0679" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33161PG" prefix="U">
<description>Universal Voltage Monitors</description>
<gates>
<gate name="A" symbol="MC33161PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT_1" pad="2"/>
<connect gate="A" pin="INPUT_2" pad="3"/>
<connect gate="A" pin="MODE_SELECT" pad="7"/>
<connect gate="A" pin="OUTPUT_1" pad="6"/>
<connect gate="A" pin="OUTPUT_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VREF" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33161PG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1168" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33164D-3G" prefix="U">
<description>Micropower Undervoltage Sensing Circuits</description>
<gates>
<gate name="A" symbol="MC33164D-3G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT" pad="2"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="5"/>
<connect gate="A" pin="N.C._3" pad="3"/>
<connect gate="A" pin="N.C._4" pad="7"/>
<connect gate="A" pin="N.C._5" pad="6"/>
<connect gate="A" pin="~RESET" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33164D-3G" constant="no"/>
<attribute name="OC_FARNELL" value="1705998" constant="no"/>
<attribute name="OC_NEWARK" value="71J5517" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33171DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33171DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NEG" pad="2"/>
<connect gate="A" pin="OFS" pad="1"/>
<connect gate="A" pin="OFS_2" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS" pad="3"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33171DG" constant="no"/>
<attribute name="OC_FARNELL" value="1104707" constant="no"/>
<attribute name="OC_NEWARK" value="42K0590" constant="no"/>
<attribute name="PACKAGE" value="SO-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33171PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33171PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="INV._IN" pad="2"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NONINV._IN" pad="3"/>
<connect gate="A" pin="OFS" pad="5"/>
<connect gate="A" pin="OFS_2" pad="1"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33171PG" constant="no"/>
<attribute name="OC_FARNELL" value="9664955" constant="no"/>
<attribute name="OC_NEWARK" value="26K4011" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33172DG" prefix="U">
<description>Single Supply 3.0 V to 44 V, Low Power Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33172DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33172DG" constant="no"/>
<attribute name="OC_FARNELL" value="9665307" constant="no"/>
<attribute name="OC_NEWARK" value="17H1572" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33172DR2G" prefix="U">
<description>Single Supply 3.0 V to 44 V, Low Power Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33172DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33172DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1651873" constant="no"/>
<attribute name="OC_NEWARK" value="84K8759" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33172PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33172PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33172PG" constant="no"/>
<attribute name="OC_FARNELL" value="9664963" constant="no"/>
<attribute name="OC_NEWARK" value="45J1173" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33174PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33174PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33174PG" constant="no"/>
<attribute name="OC_FARNELL" value="9664971" constant="no"/>
<attribute name="OC_NEWARK" value="71J5520" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33178DG" prefix="U">
<description>Low Power, Low Noise Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33178DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33178DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468737" constant="no"/>
<attribute name="OC_NEWARK" value="88H4724" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33178PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33178PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33178PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666818" constant="no"/>
<attribute name="OC_NEWARK" value="71J5521" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33179DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33179DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="5"/>
<connect gate="A" pin="IN2_2" pad="6"/>
<connect gate="A" pin="IN3" pad="9"/>
<connect gate="A" pin="IN3_2" pad="10"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33179DG" constant="no"/>
<attribute name="OC_FARNELL" value="1651874" constant="no"/>
<attribute name="OC_NEWARK" value="98H0686" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33179DR2G" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33179DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="2"/>
<connect gate="A" pin="IN1_2" pad="3"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="9"/>
<connect gate="A" pin="IN3_2" pad="10"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33179DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1261557" constant="no"/>
<attribute name="OC_NEWARK" value="98H0687" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33179PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33179PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33179PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666826" constant="no"/>
<attribute name="OC_NEWARK" value="26K4013" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33201DG" prefix="U">
<description>Low Voltage, Rail-to-Rail Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33201DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="NC_3" pad="8"/>
<connect gate="A" pin="NEG_IN" pad="2"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS_IN" pad="3"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33201DG" constant="no"/>
<attribute name="OC_FARNELL" value="9666656" constant="no"/>
<attribute name="OC_NEWARK" value="71J5522" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33202DG" prefix="U">
<description>Low Voltage, Rail-to-Rail Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33202DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="3"/>
<connect gate="A" pin="NEG_IN_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="2"/>
<connect gate="A" pin="POS_IN_2" pad="6"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33202DG" constant="no"/>
<attribute name="OC_FARNELL" value="9666672" constant="no"/>
<attribute name="OC_NEWARK" value="17H1575" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33202PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33202PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33202PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666680" constant="no"/>
<attribute name="OC_NEWARK" value="71J5524" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33202VDG" prefix="U">
<description>Low Voltage, Rail-to-Rail Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33202VDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33202VDG" constant="no"/>
<attribute name="OC_FARNELL" value="1143534" constant="no"/>
<attribute name="OC_NEWARK" value="26K4016" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33204DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33204DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="5"/>
<connect gate="A" pin="IN2_2" pad="6"/>
<connect gate="A" pin="IN3" pad="9"/>
<connect gate="A" pin="IN3_2" pad="10"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33204DG" constant="no"/>
<attribute name="OC_FARNELL" value="9666699" constant="no"/>
<attribute name="OC_NEWARK" value="45J1178" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33204DTBG" prefix="U">
<description>Low Voltage, Rail-to-Rail OPAMPs</description>
<gates>
<gate name="A" symbol="MC33204DTBG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33204DTBG" constant="no"/>
<attribute name="OC_FARNELL" value="1703205" constant="no"/>
<attribute name="OC_NEWARK" value="42K0597" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33262DG" prefix="U">
<description>Power Factor Controllers</description>
<gates>
<gate name="A" symbol="MC33262DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="2"/>
<connect gate="A" pin="DRIVE_OUTPUT" pad="7"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="ISEN_IN" pad="4"/>
<connect gate="A" pin="MULTIPLIER_INPUT" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_INPUT" pad="1"/>
<connect gate="A" pin="ZERO_CURRENT_DETECT_INPUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33262DG" constant="no"/>
<attribute name="OC_FARNELL" value="9664475" constant="no"/>
<attribute name="OC_NEWARK" value="88H4727" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33262PG" prefix="U">
<description>Power Factor Controllers</description>
<gates>
<gate name="A" symbol="MC33262PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="COMP" pad="2"/>
<connect gate="A" pin="DRIVE_OUTPUT" pad="7"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="ISEN" pad="4"/>
<connect gate="A" pin="MULTIPLIER_INPUT" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_INPUT" pad="1"/>
<connect gate="A" pin="ZERO_CURRENT_DETECT_INPUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33262PG" constant="no"/>
<attribute name="OC_FARNELL" value="9666745" constant="no"/>
<attribute name="OC_NEWARK" value="98H0691" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33269D-3.3G" prefix="U">
<description>Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC33269D-3.3G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND/ADJ" pad="1"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
<connect gate="A" pin="VOUT_2" pad="2"/>
<connect gate="A" pin="VOUT_3" pad="7"/>
<connect gate="A" pin="VOUT_4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33269D-3.3G" constant="no"/>
<attribute name="OC_FARNELL" value="1652329" constant="no"/>
<attribute name="OC_NEWARK" value="45J1180" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33269DG" prefix="U">
<description>Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC33269DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND/ADJ" pad="1"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="8"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="7"/>
<connect gate="A" pin="VOUT_2" pad="6"/>
<connect gate="A" pin="VOUT_3" pad="2"/>
<connect gate="A" pin="VOUT_4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33269DG" constant="no"/>
<attribute name="OC_FARNELL" value="1260774" constant="no"/>
<attribute name="OC_NEWARK" value="42K0603" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33272ADG" prefix="U">
<description>Single Supply,High Slew Rate,Low Input Offset Voltage,Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33272ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33272ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1651875" constant="no"/>
<attribute name="OC_NEWARK" value="45J1186" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33272ADR2G" prefix="U">
<description>Single Supply,High Slew Rate,Low Input Offset Voltage,Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33272ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="3"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="2"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33272ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1258879" constant="no"/>
<attribute name="OC_NEWARK" value="88H4728" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33274APG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC33274APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33274APG" constant="no"/>
<attribute name="OC_FARNELL" value="9666842" constant="no"/>
<attribute name="OC_NEWARK" value="26K4020" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33363ADWG" prefix="U">
<description>High Voltage Switching Regulator</description>
<gates>
<gate name="A" symbol="MC33363ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="COMPENSATION" pad="9"/>
<connect gate="A" pin="CT" pad="7"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="GND_4" pad="5"/>
<connect gate="A" pin="OVERVOLTAGE_PROTECTION_INPUT" pad="11"/>
<connect gate="A" pin="POWER_SWITCH_DRAIN" pad="16"/>
<connect gate="A" pin="REGULATOR_OUTPUT" pad="8"/>
<connect gate="A" pin="RT" pad="6"/>
<connect gate="A" pin="STARTUP_INPUT" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_INPUT" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33363ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1136116" constant="no"/>
<attribute name="OC_NEWARK" value="42K0622" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33363BDWG" prefix="U">
<description>High Voltage Switching Regulator</description>
<gates>
<gate name="A" symbol="MC33363BDWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="COMPENSATION" pad="9"/>
<connect gate="A" pin="CT" pad="7"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="GND_4" pad="5"/>
<connect gate="A" pin="OVERVOLTAGE_PROTECTION_INPUT" pad="11"/>
<connect gate="A" pin="POWER_SWITCH_DRAIN" pad="16"/>
<connect gate="A" pin="REGULATOR_OUTPUT" pad="8"/>
<connect gate="A" pin="RT" pad="6"/>
<connect gate="A" pin="STARTUP_INPUT" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_INPUT" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33363BDWG" constant="no"/>
<attribute name="OC_FARNELL" value="1192057" constant="no"/>
<attribute name="OC_NEWARK" value="42K0623" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33364DG" prefix="U">
<description>Critical Conduction GreenLinet SMPS Controller</description>
<gates>
<gate name="A" symbol="MC33364DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A_GND" pad="9"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="FREQ_CLAMP" pad="8"/>
<connect gate="A" pin="GATE_DRIVE" pad="11"/>
<connect gate="A" pin="LINE" pad="16"/>
<connect gate="A" pin="N/C" pad="2"/>
<connect gate="A" pin="N/C_2" pad="7"/>
<connect gate="A" pin="N/C_3" pad="5"/>
<connect gate="A" pin="N/C_4" pad="13"/>
<connect gate="A" pin="P_GND" pad="10"/>
<connect gate="A" pin="VCC" pad="12"/>
<connect gate="A" pin="VOLTAGE_FB" pad="4"/>
<connect gate="A" pin="VREF" pad="6"/>
<connect gate="A" pin="ZERO_CURRENT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33364DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0624" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33368DG" prefix="U">
<description>High Voltage GreenLinet Power Factor Controller</description>
<gates>
<gate name="A" symbol="MC33368DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="5.0_VREF" pad="1"/>
<connect gate="A" pin="AGND" pad="8"/>
<connect gate="A" pin="COMP" pad="4"/>
<connect gate="A" pin="CURRENT_SENSE" pad="6"/>
<connect gate="A" pin="FREQUENCY_CLAMP" pad="13"/>
<connect gate="A" pin="GATE" pad="11"/>
<connect gate="A" pin="LEB" pad="9"/>
<connect gate="A" pin="LINE" pad="16"/>
<connect gate="A" pin="MULT" pad="5"/>
<connect gate="A" pin="PGND" pad="10"/>
<connect gate="A" pin="RESTART_DELAY" pad="2"/>
<connect gate="A" pin="VCC" pad="12"/>
<connect gate="A" pin="VOLTAGE_FB" pad="3"/>
<connect gate="A" pin="ZERO_CURRENT" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33368DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468740" constant="no"/>
<attribute name="OC_NEWARK" value="42K0627" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33502DG" prefix="U">
<description>1.0 V, Rail-to-Rail, Dual Operational Amplifier</description>
<gates>
<gate name="A" symbol="MC33502DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33502DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468742" constant="no"/>
<attribute name="OC_NEWARK" value="26K4035" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33502DR2G" prefix="U">
<description>1.0 V, Rail-to-Rail, Dual Operational Amplifier</description>
<gates>
<gate name="A" symbol="MC33502DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33502DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1703207" constant="no"/>
<attribute name="OC_NEWARK" value="84K8761" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33502PG" prefix="U">
<description>Operational Amplifier</description>
<gates>
<gate name="A" symbol="MC33502PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33502PG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="70K3089" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33503SNT1G" prefix="U">
<description>Micropower Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC33503SNT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="NEG" pad="4"/>
<connect gate="A" pin="OUT" pad="1"/>
<connect gate="A" pin="POS" pad="3"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="VEE" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33503SNT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1202" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC33761SNT1-050G" prefix="U">
<description>Dropout Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC33761SNT1-050G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="ON/~OFF" pad="3"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC33761SNT1-050G" constant="no"/>
<attribute name="OC_FARNELL" value="1232007" constant="no"/>
<attribute name="OC_NEWARK" value="83H7303" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34023PG" prefix="U">
<description>High Speed Single-Ended PWM Controller</description>
<gates>
<gate name="A" symbol="MC34023PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CLOCK" pad="4"/>
<connect gate="A" pin="CT" pad="6"/>
<connect gate="A" pin="CURRENT_LIMIT/SHUTDOWN" pad="9"/>
<connect gate="A" pin="CURRENT_LIMIT_REFERENCE" pad="11"/>
<connect gate="A" pin="ERROR_AMP_NEG" pad="1"/>
<connect gate="A" pin="ERROR_AMP_OUT" pad="3"/>
<connect gate="A" pin="ERROR_AMP_POS" pad="2"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OUT" pad="14"/>
<connect gate="A" pin="POWER_GND" pad="12"/>
<connect gate="A" pin="RAMP" pad="7"/>
<connect gate="A" pin="RT" pad="5"/>
<connect gate="A" pin="SOFT-START" pad="8"/>
<connect gate="A" pin="VC" pad="13"/>
<connect gate="A" pin="VCC" pad="15"/>
<connect gate="A" pin="VREF" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34023PG" constant="no"/>
<attribute name="OC_FARNELL" value="1143553" constant="no"/>
<attribute name="OC_NEWARK" value="61K0888" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34025PG" prefix="U">
<description>High Speed Double-Ended PWM Controller</description>
<gates>
<gate name="A" symbol="MC34025PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CLOCK" pad="4"/>
<connect gate="A" pin="CT" pad="6"/>
<connect gate="A" pin="CURRENT_LIMIT/SHUTDOWN" pad="9"/>
<connect gate="A" pin="ERROR_AMP_NEG" pad="1"/>
<connect gate="A" pin="ERROR_AMP_OUT" pad="3"/>
<connect gate="A" pin="ERROR_AMP_POS" pad="2"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OUTPUT_A" pad="11"/>
<connect gate="A" pin="OUTPUT_B" pad="14"/>
<connect gate="A" pin="POWER_GND" pad="12"/>
<connect gate="A" pin="RAMP" pad="7"/>
<connect gate="A" pin="RT" pad="5"/>
<connect gate="A" pin="SOFT-START" pad="8"/>
<connect gate="A" pin="VC" pad="13"/>
<connect gate="A" pin="VCC" pad="15"/>
<connect gate="A" pin="VREF" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34025PG" constant="no"/>
<attribute name="OC_FARNELL" value="1364615" constant="no"/>
<attribute name="OC_NEWARK" value="45J1204" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC3403PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC3403PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="10"/>
<connect gate="A" pin="IN_3_2" pad="9"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE/GND" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC3403PG" constant="no"/>
<attribute name="OC_FARNELL" value="1126440" constant="no"/>
<attribute name="OC_NEWARK" value="45J1207" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34060APG" prefix="U">
<description>Fixed Frequency, PWM, Voltage Mode Single Ended Controllers</description>
<gates>
<gate name="A" symbol="MC34060APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="COMPEN/PWM_COMP_INPUT" pad="3"/>
<connect gate="A" pin="CT" pad="5"/>
<connect gate="A" pin="DEAD-TIME_CONTROL" pad="4"/>
<connect gate="A" pin="E" pad="8"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="INV_IN" pad="2"/>
<connect gate="A" pin="INV_IN_2" pad="13"/>
<connect gate="A" pin="N.C." pad="11"/>
<connect gate="A" pin="NONINV_IN" pad="1"/>
<connect gate="A" pin="NONINV_IN_2" pad="14"/>
<connect gate="A" pin="RT" pad="6"/>
<connect gate="A" pin="VCC" pad="10"/>
<connect gate="A" pin="VREF" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34060APG" constant="no"/>
<attribute name="OC_FARNELL" value="1214461" constant="no"/>
<attribute name="OC_NEWARK" value="26K4038" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34063ADG" prefix="U">
<description>Switching Regulators</description>
<gates>
<gate name="A" symbol="MC34063ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMPARATOR_NEG" pad="5"/>
<connect gate="A" pin="DRVR_C" pad="8"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SENSE" pad="7"/>
<connect gate="A" pin="SWITCH_C" pad="1"/>
<connect gate="A" pin="SWITCH_E" pad="2"/>
<connect gate="A" pin="TIMING_CAP" pad="3"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34063ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1211119" constant="no"/>
<attribute name="OC_NEWARK" value="45J1208" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34063AP1G" prefix="U">
<description>Regulators</description>
<gates>
<gate name="A" symbol="MC34063AP1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="COMP_NEG" pad="5"/>
<connect gate="A" pin="CT" pad="3"/>
<connect gate="A" pin="DRVR_C" pad="8"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SEN" pad="7"/>
<connect gate="A" pin="SW_C" pad="1"/>
<connect gate="A" pin="SW_E" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34063AP1G" constant="no"/>
<attribute name="OC_FARNELL" value="1191818" constant="no"/>
<attribute name="OC_NEWARK" value="67H6703" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34064D-5R2G" prefix="U">
<description>Undervoltage Sensing Circuit</description>
<gates>
<gate name="A" symbol="MC34064D-5R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT" pad="2"/>
<connect gate="A" pin="N.C." pad="7"/>
<connect gate="A" pin="N.C._2" pad="6"/>
<connect gate="A" pin="N.C._3" pad="8"/>
<connect gate="A" pin="N.C._4" pad="3"/>
<connect gate="A" pin="N.C._5" pad="5"/>
<connect gate="A" pin="~RESET" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34064D-5R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1364616" constant="no"/>
<attribute name="OC_NEWARK" value="45J1210" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34067PG" prefix="U">
<description>High Performance Resonant Mode Controllers</description>
<gates>
<gate name="A" symbol="MC34067PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CSOFT-START" pad="11"/>
<connect gate="A" pin="DRIVE_OUTPUT_A" pad="14"/>
<connect gate="A" pin="DRIVE_OUTPUT_B" pad="12"/>
<connect gate="A" pin="ENABLE/UVLO_ADJUST" pad="9"/>
<connect gate="A" pin="ERROR_AMP_OUT" pad="6"/>
<connect gate="A" pin="FAULT_INPUT" pad="10"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="NEG" pad="7"/>
<connect gate="A" pin="ONE-SHOT_RC" pad="16"/>
<connect gate="A" pin="OSC_CHARGE" pad="1"/>
<connect gate="A" pin="OSC_CONTROL_CURRENT" pad="3"/>
<connect gate="A" pin="OSC_RC" pad="2"/>
<connect gate="A" pin="POS" pad="8"/>
<connect gate="A" pin="POWER_GND" pad="13"/>
<connect gate="A" pin="VCC" pad="15"/>
<connect gate="A" pin="VREF" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34067PG" constant="no"/>
<attribute name="OC_FARNELL" value="1652411" constant="no"/>
<attribute name="OC_NEWARK" value="88H4731" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34071DG" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34071DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NEG_IN" pad="2"/>
<connect gate="A" pin="OFS_NULL" pad="5"/>
<connect gate="A" pin="OFS_NULL_2" pad="1"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS_IN" pad="3"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34071DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468744" constant="no"/>
<attribute name="OC_NEWARK" value="45J1214" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34072ADG" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34072ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34072ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1426371" constant="no"/>
<attribute name="OC_NEWARK" value="45J1215" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34072APG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34072APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34072APG" constant="no"/>
<attribute name="OC_FARNELL" value="1703202" constant="no"/>
<attribute name="OC_NEWARK" value="45J1216" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34072DG" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34072DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34072DG" constant="no"/>
<attribute name="OC_FARNELL" value="9664416" constant="no"/>
<attribute name="OC_NEWARK" value="88H4732" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34072DR2G" prefix="U">
<description>Single Supply 3.0 V to 44 V Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34072DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NEG_IN_1" pad="2"/>
<connect gate="A" pin="NEG_IN_2" pad="6"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="POS_IN_1" pad="3"/>
<connect gate="A" pin="POS_IN_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34072DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1258880" constant="no"/>
<attribute name="OC_NEWARK" value="88H4733" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34072PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34072PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="6"/>
<connect gate="A" pin="IN_2_2" pad="5"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34072PG" constant="no"/>
<attribute name="OC_FARNELL" value="1468745" constant="no"/>
<attribute name="OC_NEWARK" value="45J1217" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34074ADG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34074ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34074ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1426373" constant="no"/>
<attribute name="OC_NEWARK" value="45J1218" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34074APG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34074APG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="10"/>
<connect gate="A" pin="IN_3_2" pad="9"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34074APG" constant="no"/>
<attribute name="OC_FARNELL" value="1468746" constant="no"/>
<attribute name="OC_NEWARK" value="42K0653" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34074DG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34074DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="IN1" pad="3"/>
<connect gate="A" pin="IN1_2" pad="2"/>
<connect gate="A" pin="IN2" pad="6"/>
<connect gate="A" pin="IN2_2" pad="5"/>
<connect gate="A" pin="IN3" pad="10"/>
<connect gate="A" pin="IN3_2" pad="9"/>
<connect gate="A" pin="IN4" pad="13"/>
<connect gate="A" pin="IN4_2" pad="12"/>
<connect gate="A" pin="OUT1" pad="1"/>
<connect gate="A" pin="OUT2" pad="7"/>
<connect gate="A" pin="OUT3" pad="8"/>
<connect gate="A" pin="OUT4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34074DG" constant="no"/>
<attribute name="OC_FARNELL" value="1426372" constant="no"/>
<attribute name="OC_NEWARK" value="42K0654" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34074PG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34074PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="3"/>
<connect gate="A" pin="IN_1_2" pad="2"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="9"/>
<connect gate="A" pin="IN_3_2" pad="10"/>
<connect gate="A" pin="IN_4" pad="12"/>
<connect gate="A" pin="IN_4_2" pad="13"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34074PG" constant="no"/>
<attribute name="OC_FARNELL" value="1651876" constant="no"/>
<attribute name="OC_NEWARK" value="45J1220" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34074VPG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="MC34074VPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_1_2" pad="3"/>
<connect gate="A" pin="IN_2" pad="5"/>
<connect gate="A" pin="IN_2_2" pad="6"/>
<connect gate="A" pin="IN_3" pad="10"/>
<connect gate="A" pin="IN_3_2" pad="9"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_4_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="1"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="OUT_3" pad="8"/>
<connect gate="A" pin="OUT_4" pad="14"/>
<connect gate="A" pin="VCC" pad="4"/>
<connect gate="A" pin="VEE" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34074VPG" constant="no"/>
<attribute name="OC_FARNELL" value="1705800" constant="no"/>
<attribute name="OC_NEWARK" value="26K4046" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34151PG" prefix="U">
<description>Dual MOSFET Drivers</description>
<gates>
<gate name="A" symbol="MC34151PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="DRIVE_OUTPUT_A" pad="7"/>
<connect gate="A" pin="DRIVE_OUTPUT_B" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="I_A" pad="2"/>
<connect gate="A" pin="I_B" pad="4"/>
<connect gate="A" pin="N.C" pad="8"/>
<connect gate="A" pin="N.C_2" pad="1"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34151PG" constant="no"/>
<attribute name="OC_FARNELL" value="9664459" constant="no"/>
<attribute name="OC_NEWARK" value="71J5536" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34161DG" prefix="U">
<description>Universal Voltage Monitors</description>
<gates>
<gate name="A" symbol="MC34161DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="MODE" pad="7"/>
<connect gate="A" pin="OUT_1" pad="6"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VREF" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34161DG" constant="no"/>
<attribute name="OC_FARNELL" value="1652462" constant="no"/>
<attribute name="OC_NEWARK" value="98H0701" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34161PG" prefix="U">
<description>Universal Voltage Monitors</description>
<gates>
<gate name="A" symbol="MC34161PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_1" pad="2"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="MODE" pad="7"/>
<connect gate="A" pin="OUT_1" pad="6"/>
<connect gate="A" pin="OUT_2" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VREF" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34161PG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="27M2485" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34163DWG" prefix="U">
<description>3.4 A, Step-Up/Down/ Inverting Switching Regulators</description>
<gates>
<gate name="A" symbol="MC34163DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="BOOTSTRAP_IN" pad="16"/>
<connect gate="A" pin="DRIVER_COLLECTOR" pad="9"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="GND_2" pad="5"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="GND_4" pad="13"/>
<connect gate="A" pin="IPK_SENSE" pad="8"/>
<connect gate="A" pin="LVI_OUT" pad="1"/>
<connect gate="A" pin="SWITCH_COLLECTOR" pad="10"/>
<connect gate="A" pin="SWITCH_COLLECTOR_2" pad="11"/>
<connect gate="A" pin="SWITCH_EMITTER" pad="15"/>
<connect gate="A" pin="SWITCH_EMITTER_2" pad="14"/>
<connect gate="A" pin="TIMING_CAPACITOR" pad="6"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="V_FB_1" pad="3"/>
<connect gate="A" pin="V_FB_2" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34163DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1096691" constant="no"/>
<attribute name="OC_NEWARK" value="26K4047" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34163PG" prefix="U">
<description>3.4 A, Step-Up/Down/ Inverting Switching Regulators</description>
<gates>
<gate name="A" symbol="MC34163PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-16">
<connects>
<connect gate="A" pin="BOOTSTRAP_INPUT" pad="16"/>
<connect gate="A" pin="DRIVER_COLLECTOR" pad="9"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="GND_4" pad="13"/>
<connect gate="A" pin="IPK_SENSE" pad="8"/>
<connect gate="A" pin="LVI_OUTPUT" pad="1"/>
<connect gate="A" pin="SWITCH_COLLECTOR" pad="11"/>
<connect gate="A" pin="SWITCH_COLLECTOR_2" pad="10"/>
<connect gate="A" pin="SWITCH_EMITTER" pad="14"/>
<connect gate="A" pin="SWITCH_EMITTER_2" pad="15"/>
<connect gate="A" pin="TIMING_CAPACITOR" pad="6"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_1" pad="3"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_2" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34163PG" constant="no"/>
<attribute name="OC_FARNELL" value="1468747" constant="no"/>
<attribute name="OC_NEWARK" value="71J5539" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34164D-5G" prefix="U">
<description>Micropower Undervoltage Sensing Circuits</description>
<gates>
<gate name="A" symbol="MC34164D-5G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="INPUT" pad="2"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="N.C._2" pad="6"/>
<connect gate="A" pin="N.C._3" pad="5"/>
<connect gate="A" pin="N.C._4" pad="7"/>
<connect gate="A" pin="N.C._5" pad="3"/>
<connect gate="A" pin="~RESET" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34164D-5G" constant="no"/>
<attribute name="OC_FARNELL" value="1703462" constant="no"/>
<attribute name="OC_NEWARK" value="26K4049" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34262DG" prefix="U">
<description>Power Factor Controllers</description>
<gates>
<gate name="A" symbol="MC34262DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="2"/>
<connect gate="A" pin="DRIVE_OUTPUT" pad="7"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="ISEN_IN" pad="4"/>
<connect gate="A" pin="MULTIPLIER_INPUT" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_INPUT" pad="1"/>
<connect gate="A" pin="ZERO_CURRENT_DETECT_INPUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34262DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468748" constant="no"/>
<attribute name="OC_NEWARK" value="88H4735" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC34262PG" prefix="U">
<description>Power Factor Controllers</description>
<gates>
<gate name="A" symbol="MC34262PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X533-8">
<connects>
<connect gate="A" pin="COMP" pad="2"/>
<connect gate="A" pin="DRIVE_OUTPUT" pad="7"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="ISEN" pad="4"/>
<connect gate="A" pin="MULTIPLIER_INPUT" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_INPUT" pad="1"/>
<connect gate="A" pin="ZERO_CURRENT_DETECT_INPUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC34262PG" constant="no"/>
<attribute name="OC_FARNELL" value="1468749" constant="no"/>
<attribute name="OC_NEWARK" value="42K0668" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC00DG" prefix="U">
<description>Quad 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74AC00DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC00DG" constant="no"/>
<attribute name="OC_FARNELL" value="1886881" constant="no"/>
<attribute name="OC_NEWARK" value="45J1255" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC02DG" prefix="U">
<description>Quad 2-Input NOR Gate</description>
<gates>
<gate name="A" symbol="MC74AC02DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="8"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="B1" pad="3"/>
<connect gate="A" pin="B2" pad="6"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="B4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="10"/>
<connect gate="A" pin="Y4" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC02DG" constant="no"/>
<attribute name="OC_FARNELL" value="1706001" constant="no"/>
<attribute name="OC_NEWARK" value="71J5560" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC04DG" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74AC04DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN" pad="11"/>
<connect gate="A" pin="IN_2" pad="1"/>
<connect gate="A" pin="IN_3" pad="3"/>
<connect gate="A" pin="IN_4" pad="5"/>
<connect gate="A" pin="IN_5" pad="13"/>
<connect gate="A" pin="IN_6" pad="9"/>
<connect gate="A" pin="OUT" pad="8"/>
<connect gate="A" pin="OUT_2" pad="12"/>
<connect gate="A" pin="OUT_3" pad="4"/>
<connect gate="A" pin="OUT_4" pad="2"/>
<connect gate="A" pin="OUT_5" pad="10"/>
<connect gate="A" pin="OUT_6" pad="6"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC04DG" constant="no"/>
<attribute name="OC_FARNELL" value="1136093" constant="no"/>
<attribute name="OC_NEWARK" value="26K4108" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC08DG" prefix="U">
<description>Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74AC08DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN" pad="9"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="1"/>
<connect gate="A" pin="IN_4" pad="5"/>
<connect gate="A" pin="IN_5" pad="2"/>
<connect gate="A" pin="IN_6" pad="10"/>
<connect gate="A" pin="IN_7" pad="12"/>
<connect gate="A" pin="IN_8" pad="13"/>
<connect gate="A" pin="OUT" pad="8"/>
<connect gate="A" pin="OUT_2" pad="6"/>
<connect gate="A" pin="OUT_3" pad="3"/>
<connect gate="A" pin="OUT_4" pad="11"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC08DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468750" constant="no"/>
<attribute name="OC_NEWARK" value="26K4111" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC132DG" prefix="U">
<description>Quad 2-Input NAND Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC74AC132DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN" pad="9"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="1"/>
<connect gate="A" pin="IN_4" pad="5"/>
<connect gate="A" pin="IN_5" pad="2"/>
<connect gate="A" pin="IN_6" pad="10"/>
<connect gate="A" pin="IN_7" pad="12"/>
<connect gate="A" pin="IN_8" pad="13"/>
<connect gate="A" pin="OUT" pad="8"/>
<connect gate="A" pin="OUT_2" pad="3"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="11"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC132DG" constant="no"/>
<attribute name="OC_FARNELL" value="1705802" constant="no"/>
<attribute name="OC_NEWARK" value="26K4116" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC138DG" prefix="U">
<description>1-of-8 Decoder/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74AC138DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="E3" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="~E1" pad="4"/>
<connect gate="A" pin="~E2" pad="5"/>
<connect gate="A" pin="~O0" pad="15"/>
<connect gate="A" pin="~O1" pad="14"/>
<connect gate="A" pin="~O2" pad="13"/>
<connect gate="A" pin="~O3" pad="12"/>
<connect gate="A" pin="~O4" pad="11"/>
<connect gate="A" pin="~O5" pad="10"/>
<connect gate="A" pin="~O6" pad="9"/>
<connect gate="A" pin="~O7" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC138DG" constant="no"/>
<attribute name="OC_FARNELL" value="1468752" constant="no"/>
<attribute name="OC_NEWARK" value="26K4118" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC32DG" prefix="U">
<description>Quad 2-Input OR Gate</description>
<gates>
<gate name="A" symbol="MC74AC32DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN" pad="5"/>
<connect gate="A" pin="IN_2" pad="2"/>
<connect gate="A" pin="IN_3" pad="10"/>
<connect gate="A" pin="IN_4" pad="4"/>
<connect gate="A" pin="IN_5" pad="12"/>
<connect gate="A" pin="IN_6" pad="13"/>
<connect gate="A" pin="IN_7" pad="1"/>
<connect gate="A" pin="IN_8" pad="9"/>
<connect gate="A" pin="OUT" pad="11"/>
<connect gate="A" pin="OUT_2" pad="8"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="3"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC32DG" constant="no"/>
<attribute name="OC_FARNELL" value="1147692" constant="no"/>
<attribute name="OC_NEWARK" value="42K0801" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC4040DG" prefix="U">
<description>12-Stage Binary Ripple Counter</description>
<gates>
<gate name="A" symbol="MC74AC4040DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="10"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q2" pad="7"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="Q5" pad="3"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="RESET" pad="11"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC4040DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607667" constant="no"/>
<attribute name="OC_NEWARK" value="26K4154" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC4040NG" prefix="U">
<description>12-Stage Binary Ripple Counter</description>
<gates>
<gate name="A" symbol="MC74AC4040NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="CLK" pad="10"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q2" pad="7"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="Q5" pad="3"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="RESET" pad="11"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC4040NG" constant="no"/>
<attribute name="OC_FARNELL" value="1703293" constant="no"/>
<attribute name="OC_NEWARK" value="42K0810" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC573DWG" prefix="U">
<description>Octal Buffer/Line Driver</description>
<gates>
<gate name="A" symbol="MC74AC573DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="4"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="D4" pad="6"/>
<connect gate="A" pin="D5" pad="7"/>
<connect gate="A" pin="D6" pad="8"/>
<connect gate="A" pin="D7" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="LE" pad="11"/>
<connect gate="A" pin="O0" pad="19"/>
<connect gate="A" pin="O1" pad="18"/>
<connect gate="A" pin="O2" pad="17"/>
<connect gate="A" pin="O3" pad="16"/>
<connect gate="A" pin="O4" pad="15"/>
<connect gate="A" pin="O5" pad="14"/>
<connect gate="A" pin="O6" pad="13"/>
<connect gate="A" pin="O7" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC573DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607715" constant="no"/>
<attribute name="OC_NEWARK" value="42K0814" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC574DWR2G" prefix="U">
<description>Octal D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74AC574DWR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CP" pad="11"/>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="4"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="D4" pad="6"/>
<connect gate="A" pin="D5" pad="7"/>
<connect gate="A" pin="D6" pad="8"/>
<connect gate="A" pin="D7" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="O0" pad="19"/>
<connect gate="A" pin="O1" pad="18"/>
<connect gate="A" pin="O2" pad="17"/>
<connect gate="A" pin="O3" pad="16"/>
<connect gate="A" pin="O4" pad="15"/>
<connect gate="A" pin="O5" pad="14"/>
<connect gate="A" pin="O6" pad="13"/>
<connect gate="A" pin="O7" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC574DWR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K4165" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC74DG" prefix="U">
<description>Dual D-Type Positive Edge-Triggered Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74AC74DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CP1" pad="3"/>
<connect gate="A" pin="CP2" pad="11"/>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="D2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~CD1" pad="1"/>
<connect gate="A" pin="~CD2" pad="13"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
<connect gate="A" pin="~SD1" pad="4"/>
<connect gate="A" pin="~SD2" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC74DG" constant="no"/>
<attribute name="OC_FARNELL" value="1705876" constant="no"/>
<attribute name="OC_NEWARK" value="42K0818" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74AC74NG" prefix="U">
<description>Dual D-Type Positive Edge-Triggered Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74AC74NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CP1" pad="3"/>
<connect gate="A" pin="CP2" pad="11"/>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="D2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~CD1" pad="1"/>
<connect gate="A" pin="~CD2" pad="13"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
<connect gate="A" pin="~SD1" pad="4"/>
<connect gate="A" pin="~SD2" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74AC74NG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1265" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT00DG" prefix="U">
<description>Quad 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74ACT00DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT00DG" constant="no"/>
<attribute name="OC_FARNELL" value="1652018" constant="no"/>
<attribute name="OC_NEWARK" value="42K0673" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT02DG" prefix="U">
<description>Quad 2-Input NOR Gate</description>
<gates>
<gate name="A" symbol="MC74ACT02DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="8"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="B1" pad="3"/>
<connect gate="A" pin="B2" pad="6"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="B4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="10"/>
<connect gate="A" pin="Y4" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT02DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607770" constant="no"/>
<attribute name="OC_NEWARK" value="45J1231" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT05DG" prefix="U">
<description>Hex Inverter with Open-Drain Outputs</description>
<gates>
<gate name="A" symbol="MC74ACT05DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT05DG" constant="no"/>
<attribute name="OC_FARNELL" value="1353833" constant="no"/>
<attribute name="OC_NEWARK" value="42K0680" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT125DG" prefix="U">
<description>Quad Buffer with 3-State Outputs</description>
<gates>
<gate name="A" symbol="MC74ACT125DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="12"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="O0" pad="3"/>
<connect gate="A" pin="O1" pad="6"/>
<connect gate="A" pin="O2" pad="11"/>
<connect gate="A" pin="O3" pad="8"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~A0" pad="1"/>
<connect gate="A" pin="~A1" pad="4"/>
<connect gate="A" pin="~A2" pad="13"/>
<connect gate="A" pin="~A3" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT125DG" constant="no"/>
<attribute name="OC_FARNELL" value="1705944" constant="no"/>
<attribute name="OC_NEWARK" value="45J1238" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT132DG" prefix="U">
<description>Quad 2-Input NAND Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC74ACT132DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN" pad="9"/>
<connect gate="A" pin="IN_2" pad="4"/>
<connect gate="A" pin="IN_3" pad="1"/>
<connect gate="A" pin="IN_4" pad="5"/>
<connect gate="A" pin="IN_5" pad="2"/>
<connect gate="A" pin="IN_6" pad="10"/>
<connect gate="A" pin="IN_7" pad="12"/>
<connect gate="A" pin="IN_8" pad="13"/>
<connect gate="A" pin="OUT" pad="8"/>
<connect gate="A" pin="OUT_2" pad="3"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="11"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT132DG" constant="no"/>
<attribute name="OC_FARNELL" value="1607771" constant="no"/>
<attribute name="OC_NEWARK" value="42K0691" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT14DG" prefix="U">
<description>Hex Inverter Schmitt Trigger</description>
<gates>
<gate name="A" symbol="MC74ACT14DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="IN" pad="5"/>
<connect gate="A" pin="IN_2" pad="3"/>
<connect gate="A" pin="IN_3" pad="11"/>
<connect gate="A" pin="IN_4" pad="13"/>
<connect gate="A" pin="IN_5" pad="1"/>
<connect gate="A" pin="IN_6" pad="9"/>
<connect gate="A" pin="OUT" pad="8"/>
<connect gate="A" pin="OUT_2" pad="2"/>
<connect gate="A" pin="OUT_3" pad="6"/>
<connect gate="A" pin="OUT_4" pad="10"/>
<connect gate="A" pin="OUT_5" pad="4"/>
<connect gate="A" pin="OUT_6" pad="12"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT14DG" constant="no"/>
<attribute name="OC_FARNELL" value="1652019" constant="no"/>
<attribute name="OC_NEWARK" value="42K0699" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74ACT74DG" prefix="U">
<description>Dual D-Type Positive Edge-Triggered Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74ACT74DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CP1" pad="3"/>
<connect gate="A" pin="CP2" pad="11"/>
<connect gate="A" pin="D1" pad="2"/>
<connect gate="A" pin="D2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~CD1" pad="1"/>
<connect gate="A" pin="~CD2" pad="13"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
<connect gate="A" pin="~SD1" pad="4"/>
<connect gate="A" pin="~SD2" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74ACT74DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0750" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC00ADG" prefix="U">
<description>Quad 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74HC00ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC00ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666885" constant="no"/>
<attribute name="OC_NEWARK" value="71J5589" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC00ANG" prefix="U">
<description>Quad 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74HC00ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC00ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665773" constant="no"/>
<attribute name="OC_NEWARK" value="45J1279" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC02ADG" prefix="U">
<description>Quad 2-Input NOR Gate</description>
<gates>
<gate name="A" symbol="MC74HC02ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="8"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="B1" pad="3"/>
<connect gate="A" pin="B2" pad="6"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="B4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="10"/>
<connect gate="A" pin="Y4" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC02ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666893" constant="no"/>
<attribute name="OC_NEWARK" value="45J1280" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC02ANG" prefix="U">
<description>Quad 2-Input NOR Gate</description>
<gates>
<gate name="A" symbol="MC74HC02ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="8"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="B1" pad="3"/>
<connect gate="A" pin="B2" pad="6"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="B4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="10"/>
<connect gate="A" pin="Y4" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC02ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665781" constant="no"/>
<attribute name="OC_NEWARK" value="45J1282" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC03ADG" prefix="U">
<description>Quad 2-Input NAND Gate with Open-Drain Outputs</description>
<gates>
<gate name="A" symbol="MC74HC03ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC03ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1364064" constant="no"/>
<attribute name="OC_NEWARK" value="26K4195" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC04ADG" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74HC04ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC04ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1104714" constant="no"/>
<attribute name="OC_NEWARK" value="42K0843" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC04ADR2G" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74HC04ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC04ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1147801" constant="no"/>
<attribute name="OC_NEWARK" value="45J1284" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC04ADTR2G" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74HC04ADTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC04ADTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7796" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC08ADG" prefix="U">
<description>Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74HC08ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC08ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666907" constant="no"/>
<attribute name="OC_NEWARK" value="45J1285" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC08ADTR2G" prefix="U">
<description>Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74HC08ADTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC08ADTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7797" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC125ADG" prefix="U">
<description>Quad 3-State Noninverting Buffers</description>
<gates>
<gate name="A" symbol="MC74HC125ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="4"/>
<connect gate="A" pin="OE3" pad="10"/>
<connect gate="A" pin="OE4" pad="13"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC125ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666915" constant="no"/>
<attribute name="OC_NEWARK" value="45J1290" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC125ADR2G" prefix="U">
<description>Quad 3-State Noninverting Buffers</description>
<gates>
<gate name="A" symbol="MC74HC125ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="4"/>
<connect gate="A" pin="OE3" pad="10"/>
<connect gate="A" pin="OE4" pad="13"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC125ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1262898" constant="no"/>
<attribute name="OC_NEWARK" value="84K8774" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC132ADG" prefix="U">
<description>Quad 2-Input NAND Gate with Schmitt-Trigger Inputs</description>
<gates>
<gate name="A" symbol="MC74HC132ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC132ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666923" constant="no"/>
<attribute name="OC_NEWARK" value="45J1294" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC132ADR2G" prefix="U">
<description>Quad 2-Input NAND Gate with Schmitt-Trigger Inputs</description>
<gates>
<gate name="A" symbol="MC74HC132ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC132ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1268658" constant="no"/>
<attribute name="OC_NEWARK" value="84K8775" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC132ADTG" prefix="U">
<description>Quad 2-Input NAND Gate with Schmitt-Trigger Inputs</description>
<gates>
<gate name="A" symbol="MC74HC132ADTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC132ADTG" constant="no"/>
<attribute name="OC_FARNELL" value="1104719" constant="no"/>
<attribute name="OC_NEWARK" value="42K0850" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC132ANG" prefix="U">
<description>Quad 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74HC132ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC132ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665820" constant="no"/>
<attribute name="OC_NEWARK" value="45J1296" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC138ADG" prefix="U">
<description>1-of-8 Decoder/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74HC138ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="CS1" pad="6"/>
<connect gate="A" pin="CS2" pad="4"/>
<connect gate="A" pin="CS3" pad="5"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="Y0" pad="15"/>
<connect gate="A" pin="Y1" pad="14"/>
<connect gate="A" pin="Y2" pad="13"/>
<connect gate="A" pin="Y3" pad="12"/>
<connect gate="A" pin="Y4" pad="11"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="9"/>
<connect gate="A" pin="Y7" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC138ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1104715" constant="no"/>
<attribute name="OC_NEWARK" value="42K0852" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC138ADR2G" prefix="U">
<description>1-of-8 Decoder/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74HC138ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="CS1" pad="6"/>
<connect gate="A" pin="CS2" pad="4"/>
<connect gate="A" pin="CS3" pad="5"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="Y0" pad="15"/>
<connect gate="A" pin="Y1" pad="14"/>
<connect gate="A" pin="Y2" pad="13"/>
<connect gate="A" pin="Y3" pad="12"/>
<connect gate="A" pin="Y4" pad="11"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="9"/>
<connect gate="A" pin="Y7" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC138ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1266201" constant="no"/>
<attribute name="OC_NEWARK" value="84K8776" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC138ANG" prefix="U">
<description>1-of-8 Decoder/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74HC138ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="CS1" pad="6"/>
<connect gate="A" pin="CS2" pad="4"/>
<connect gate="A" pin="CS3" pad="5"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="Y0" pad="15"/>
<connect gate="A" pin="Y1" pad="14"/>
<connect gate="A" pin="Y2" pad="13"/>
<connect gate="A" pin="Y3" pad="12"/>
<connect gate="A" pin="Y4" pad="11"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="9"/>
<connect gate="A" pin="Y7" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC138ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665838" constant="no"/>
<attribute name="OC_NEWARK" value="45J1298" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC139ADG" prefix="U">
<description>Dual 1-of-4 Decoder/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74HC139ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A0A" pad="2"/>
<connect gate="A" pin="A0B" pad="14"/>
<connect gate="A" pin="A1A" pad="3"/>
<connect gate="A" pin="A1B" pad="13"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="SELECTA" pad="1"/>
<connect gate="A" pin="SELECTB" pad="15"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="Y0A" pad="4"/>
<connect gate="A" pin="Y0B" pad="12"/>
<connect gate="A" pin="Y1A" pad="5"/>
<connect gate="A" pin="Y1B" pad="11"/>
<connect gate="A" pin="Y2A" pad="6"/>
<connect gate="A" pin="Y2B" pad="10"/>
<connect gate="A" pin="Y3A" pad="7"/>
<connect gate="A" pin="Y3B" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC139ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1104716" constant="no"/>
<attribute name="OC_NEWARK" value="42K0853" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC14ADG" prefix="U">
<description>Hex Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="MC74HC14ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC14ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666931" constant="no"/>
<attribute name="OC_NEWARK" value="71J5595" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC14ADR2G" prefix="U">
<description>Hex Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="MC74HC14ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC14ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1607772" constant="no"/>
<attribute name="OC_NEWARK" value="45J1301" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC14ADTG" prefix="U">
<description>Hex Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="MC74HC14ADTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC14ADTG" constant="no"/>
<attribute name="OC_FARNELL" value="1104717" constant="no"/>
<attribute name="OC_NEWARK" value="42K0855" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC14ANG" prefix="U">
<description>Hex Schmitt Trigger Inverter</description>
<gates>
<gate name="A" symbol="MC74HC14ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC14ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665854" constant="no"/>
<attribute name="OC_NEWARK" value="45J1302" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC164ADG" prefix="U">
<description>8-Bit Serial-Input/Parallel- Output Shift Register</description>
<gates>
<gate name="A" symbol="MC74HC164ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="2"/>
<connect gate="A" pin="CLK" pad="8"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="QA" pad="3"/>
<connect gate="A" pin="QB" pad="4"/>
<connect gate="A" pin="QC" pad="5"/>
<connect gate="A" pin="QD" pad="6"/>
<connect gate="A" pin="QE" pad="10"/>
<connect gate="A" pin="QF" pad="11"/>
<connect gate="A" pin="QG" pad="12"/>
<connect gate="A" pin="QH" pad="13"/>
<connect gate="A" pin="RESET" pad="9"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC164ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1287963" constant="no"/>
<attribute name="OC_NEWARK" value="71J5599" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC165ADG" prefix="U">
<description>8-Bit Serial or Parallel-Input/Serial-Output Shift Register</description>
<gates>
<gate name="A" symbol="MC74HC165ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="12"/>
<connect gate="A" pin="C" pad="13"/>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="CLK_INHIBIT" pad="15"/>
<connect gate="A" pin="D" pad="14"/>
<connect gate="A" pin="E" pad="3"/>
<connect gate="A" pin="F" pad="4"/>
<connect gate="A" pin="G" pad="5"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="H" pad="6"/>
<connect gate="A" pin="QH" pad="9"/>
<connect gate="A" pin="SA" pad="10"/>
<connect gate="A" pin="SERIAL_SHIFT/~PARALLEL_LOAD" pad="1"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="~QH" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC165ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9664483" constant="no"/>
<attribute name="OC_NEWARK" value="45J1308" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC1G04DTT1G" prefix="U">
<description>Single Inverter</description>
<gates>
<gate name="A" symbol="MC74HC1G04DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC1G04DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1706041" constant="no"/>
<attribute name="OC_NEWARK" value="95K5518" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC1G14DTT1G" prefix="U">
<description>Single Inverter with Schmitt-Trigger Input</description>
<gates>
<gate name="A" symbol="MC74HC1G14DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC1G14DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1468757" constant="no"/>
<attribute name="OC_NEWARK" value="71J5593" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC240ANG" prefix="U">
<description>Octal 3-State Inverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HC240ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="8"/>
<connect gate="A" pin="B1" pad="11"/>
<connect gate="A" pin="B2" pad="13"/>
<connect gate="A" pin="B3" pad="15"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="EN_A" pad="1"/>
<connect gate="A" pin="EN_B" pad="19"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="YA1" pad="18"/>
<connect gate="A" pin="YA2" pad="16"/>
<connect gate="A" pin="YA3" pad="14"/>
<connect gate="A" pin="YA4" pad="12"/>
<connect gate="A" pin="YB1" pad="9"/>
<connect gate="A" pin="YB2" pad="7"/>
<connect gate="A" pin="YB3" pad="5"/>
<connect gate="A" pin="YB4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC240ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665889" constant="no"/>
<attribute name="OC_NEWARK" value="71J5601" constant="no"/>
<attribute name="PACKAGE" value="DIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC244ADWG" prefix="U">
<description>Noninverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HC244ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="8"/>
<connect gate="A" pin="B1" pad="11"/>
<connect gate="A" pin="B2" pad="13"/>
<connect gate="A" pin="B3" pad="15"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="ENABLE_A" pad="1"/>
<connect gate="A" pin="ENABLE_B" pad="19"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="YA1" pad="18"/>
<connect gate="A" pin="YA2" pad="16"/>
<connect gate="A" pin="YA3" pad="14"/>
<connect gate="A" pin="YA4" pad="12"/>
<connect gate="A" pin="YB1" pad="9"/>
<connect gate="A" pin="YB2" pad="7"/>
<connect gate="A" pin="YB3" pad="5"/>
<connect gate="A" pin="YB4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC244ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1468758" constant="no"/>
<attribute name="OC_NEWARK" value="42K0866" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC244ADWR2G" prefix="U">
<description>Noninverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HC244ADWR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="8"/>
<connect gate="A" pin="B1" pad="11"/>
<connect gate="A" pin="B2" pad="13"/>
<connect gate="A" pin="B3" pad="15"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="ENABLE_A" pad="1"/>
<connect gate="A" pin="ENABLE_B" pad="19"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="YA1" pad="18"/>
<connect gate="A" pin="YA2" pad="16"/>
<connect gate="A" pin="YA3" pad="14"/>
<connect gate="A" pin="YA4" pad="12"/>
<connect gate="A" pin="YB1" pad="9"/>
<connect gate="A" pin="YB2" pad="7"/>
<connect gate="A" pin="YB3" pad="5"/>
<connect gate="A" pin="YB4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC244ADWR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1150453" constant="no"/>
<attribute name="OC_NEWARK" value="45J1313" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC244ANG" prefix="U">
<description>Octal 3-State Inverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HC244ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="8"/>
<connect gate="A" pin="B1" pad="11"/>
<connect gate="A" pin="B2" pad="13"/>
<connect gate="A" pin="B3" pad="15"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="EN_A" pad="1"/>
<connect gate="A" pin="EN_B" pad="19"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="YA1" pad="18"/>
<connect gate="A" pin="YA2" pad="16"/>
<connect gate="A" pin="YA3" pad="14"/>
<connect gate="A" pin="YA4" pad="12"/>
<connect gate="A" pin="YB1" pad="9"/>
<connect gate="A" pin="YB2" pad="7"/>
<connect gate="A" pin="YB3" pad="5"/>
<connect gate="A" pin="YB4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC244ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665897" constant="no"/>
<attribute name="OC_NEWARK" value="71J5603" constant="no"/>
<attribute name="PACKAGE" value="DIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC245ADTG" prefix="U">
<description>Octal 3-State Noninverting Bus Transceiver</description>
<gates>
<gate name="A" symbol="MC74HC245ADTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="B1" pad="18"/>
<connect gate="A" pin="B2" pad="17"/>
<connect gate="A" pin="B3" pad="16"/>
<connect gate="A" pin="B4" pad="15"/>
<connect gate="A" pin="B5" pad="14"/>
<connect gate="A" pin="B6" pad="13"/>
<connect gate="A" pin="B7" pad="12"/>
<connect gate="A" pin="B8" pad="11"/>
<connect gate="A" pin="DIRECTION" pad="1"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OUT_EN" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC245ADTG" constant="no"/>
<attribute name="OC_FARNELL" value="1104722" constant="no"/>
<attribute name="OC_NEWARK" value="42K0867" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC245ADWG" prefix="U">
<description>Octal Noninverting Bus Transceiver</description>
<gates>
<gate name="A" symbol="MC74HC245ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="B1" pad="18"/>
<connect gate="A" pin="B2" pad="17"/>
<connect gate="A" pin="B3" pad="16"/>
<connect gate="A" pin="B4" pad="15"/>
<connect gate="A" pin="B5" pad="14"/>
<connect gate="A" pin="B6" pad="13"/>
<connect gate="A" pin="B7" pad="12"/>
<connect gate="A" pin="B8" pad="11"/>
<connect gate="A" pin="DIRECTION" pad="1"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC245ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1703301" constant="no"/>
<attribute name="OC_NEWARK" value="45J1314" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC245ANG" prefix="U">
<description>Octal 3-State Noninverting Bus Transceiver</description>
<gates>
<gate name="A" symbol="MC74HC245ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="B1" pad="18"/>
<connect gate="A" pin="B2" pad="17"/>
<connect gate="A" pin="B3" pad="16"/>
<connect gate="A" pin="B4" pad="15"/>
<connect gate="A" pin="B5" pad="14"/>
<connect gate="A" pin="B6" pad="13"/>
<connect gate="A" pin="B7" pad="12"/>
<connect gate="A" pin="B8" pad="11"/>
<connect gate="A" pin="DIR" pad="1"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC245ANG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="71J5606" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC273ADWG" prefix="U">
<description>Octal D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HC273ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CLOCK" pad="11"/>
<connect gate="A" pin="D0" pad="3"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="7"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="D4" pad="13"/>
<connect gate="A" pin="D5" pad="14"/>
<connect gate="A" pin="D6" pad="17"/>
<connect gate="A" pin="D7" pad="18"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="12"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="16"/>
<connect gate="A" pin="Q7" pad="19"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC273ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607717" constant="no"/>
<attribute name="OC_NEWARK" value="42K0869" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC273ANG" prefix="U">
<description>Octal D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HC273ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="CLK" pad="11"/>
<connect gate="A" pin="D0" pad="3"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="7"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="D4" pad="13"/>
<connect gate="A" pin="D5" pad="14"/>
<connect gate="A" pin="D6" pad="17"/>
<connect gate="A" pin="D7" pad="18"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="12"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="16"/>
<connect gate="A" pin="Q7" pad="19"/>
<connect gate="A" pin="RESET" pad="1"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC273ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665927" constant="no"/>
<attribute name="OC_NEWARK" value="71J5608" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC32ADG" prefix="U">
<description>Quad 2-Input OR Gate</description>
<gates>
<gate name="A" symbol="MC74HC32ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC32ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666966" constant="no"/>
<attribute name="OC_NEWARK" value="26K4221" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC373ANG" prefix="U">
<description>Octal 3-State Non-Inverting Transparent Latch</description>
<gates>
<gate name="A" symbol="MC74HC373ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="D0" pad="3"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="7"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="D4" pad="13"/>
<connect gate="A" pin="D5" pad="14"/>
<connect gate="A" pin="D6" pad="17"/>
<connect gate="A" pin="D7" pad="18"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="LATCH_ENABLE" pad="11"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="1"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="12"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="16"/>
<connect gate="A" pin="Q7" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC373ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665943" constant="no"/>
<attribute name="OC_NEWARK" value="71J5611" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC374ADWG" prefix="U">
<description>Octal Non-Inverting D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HC374ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CLOCK" pad="11"/>
<connect gate="A" pin="D0" pad="3"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="7"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="D4" pad="13"/>
<connect gate="A" pin="D5" pad="14"/>
<connect gate="A" pin="D6" pad="17"/>
<connect gate="A" pin="D7" pad="18"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="1"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="12"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="16"/>
<connect gate="A" pin="Q7" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC374ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K4225" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC374ANG" prefix="U">
<description>D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HC374ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="CLK" pad="11"/>
<connect gate="A" pin="D0" pad="3"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="7"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="D4" pad="13"/>
<connect gate="A" pin="D5" pad="14"/>
<connect gate="A" pin="D6" pad="17"/>
<connect gate="A" pin="D7" pad="18"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="12"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="16"/>
<connect gate="A" pin="Q7" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC374ANG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K4228" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC390ADG" prefix="U">
<description>High-Performance Silicon-Gate CMOS</description>
<gates>
<gate name="A" symbol="MC74HC390ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK_AA" pad="1"/>
<connect gate="A" pin="CLK_AB" pad="15"/>
<connect gate="A" pin="CLK_BA" pad="4"/>
<connect gate="A" pin="CLK_BB" pad="12"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="QAA" pad="3"/>
<connect gate="A" pin="QAB" pad="13"/>
<connect gate="A" pin="QBA" pad="5"/>
<connect gate="A" pin="QBB" pad="11"/>
<connect gate="A" pin="QCA" pad="6"/>
<connect gate="A" pin="QCB" pad="10"/>
<connect gate="A" pin="QDA" pad="7"/>
<connect gate="A" pin="QDB" pad="9"/>
<connect gate="A" pin="RSTA" pad="2"/>
<connect gate="A" pin="RST_B" pad="14"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC390ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1147859" constant="no"/>
<attribute name="OC_NEWARK" value="71J5612" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4040ADG" prefix="U">
<description>12-Stage Binary Ripple Counter</description>
<gates>
<gate name="A" symbol="MC74HC4040ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="CLK" pad="10"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="Q1" pad="9"/>
<connect gate="A" pin="Q10" pad="14"/>
<connect gate="A" pin="Q11" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q2" pad="7"/>
<connect gate="A" pin="Q3" pad="6"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="Q5" pad="3"/>
<connect gate="A" pin="Q6" pad="2"/>
<connect gate="A" pin="Q7" pad="4"/>
<connect gate="A" pin="Q8" pad="13"/>
<connect gate="A" pin="Q9" pad="12"/>
<connect gate="A" pin="RST" pad="11"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4040ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1705807" constant="no"/>
<attribute name="OC_NEWARK" value="26K4229" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4046ADG" prefix="U">
<description>Phase-Locked Loop</description>
<gates>
<gate name="A" symbol="MC74HC4046ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="C1A" pad="6"/>
<connect gate="A" pin="C1B" pad="7"/>
<connect gate="A" pin="COMPIN" pad="3"/>
<connect gate="A" pin="DEMOUT" pad="10"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="INH" pad="5"/>
<connect gate="A" pin="PC1OUT" pad="2"/>
<connect gate="A" pin="PC2OUT" pad="13"/>
<connect gate="A" pin="PC3OUT" pad="15"/>
<connect gate="A" pin="PCPOUT" pad="1"/>
<connect gate="A" pin="R1" pad="11"/>
<connect gate="A" pin="R2" pad="12"/>
<connect gate="A" pin="SIGIN" pad="14"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VCOIN" pad="9"/>
<connect gate="A" pin="VCOOUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4046ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1354337" constant="no"/>
<attribute name="OC_NEWARK" value="26K4230" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4046ANG" prefix="U">
<description>Phase-Locked Loop</description>
<gates>
<gate name="A" symbol="MC74HC4046ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="C1A" pad="6"/>
<connect gate="A" pin="C1B" pad="7"/>
<connect gate="A" pin="COMPIN" pad="3"/>
<connect gate="A" pin="DEMOUT" pad="10"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="INH" pad="5"/>
<connect gate="A" pin="PC1OUT" pad="2"/>
<connect gate="A" pin="PC2OUT" pad="13"/>
<connect gate="A" pin="PC3OUT" pad="15"/>
<connect gate="A" pin="PCPOUT" pad="1"/>
<connect gate="A" pin="R1" pad="11"/>
<connect gate="A" pin="R2" pad="12"/>
<connect gate="A" pin="SIGIN" pad="14"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VCOIN" pad="9"/>
<connect gate="A" pin="VCOOUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4046ANG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1324" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4051ADR2G" prefix="U">
<description>High-Performance Silicon-Gate CMOS</description>
<gates>
<gate name="A" symbol="MC74HC4051ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="EN" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="3"/>
<connect gate="A" pin="X0" pad="13"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="12"/>
<connect gate="A" pin="X4" pad="1"/>
<connect gate="A" pin="X5" pad="5"/>
<connect gate="A" pin="X6" pad="2"/>
<connect gate="A" pin="X7" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4051ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="84K8780" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4051ADWG" prefix="U">
<description>Analog Multiplexers/ Demultiplexers</description>
<gates>
<gate name="A" symbol="MC74HC4051ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="ENABLE" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="3"/>
<connect gate="A" pin="X0" pad="13"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="12"/>
<connect gate="A" pin="X4" pad="1"/>
<connect gate="A" pin="X5" pad="5"/>
<connect gate="A" pin="X6" pad="2"/>
<connect gate="A" pin="X7" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4051ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0888" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4052ADTG" prefix="U">
<description>Multiplexers/Demultiplexers</description>
<gates>
<gate name="A" symbol="MC74HC4052ADTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-16N">
<connects>
<connect gate="A" pin="A" pad="10"/>
<connect gate="A" pin="B" pad="9"/>
<connect gate="A" pin="EN" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VDD" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="13"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="11"/>
<connect gate="A" pin="Y" pad="3"/>
<connect gate="A" pin="Y0" pad="1"/>
<connect gate="A" pin="Y1" pad="5"/>
<connect gate="A" pin="Y2" pad="2"/>
<connect gate="A" pin="Y3" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4052ADTG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0889" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4052ADWG" prefix="U">
<description>Analog Multiplexers/ Demultiplexers</description>
<gates>
<gate name="A" symbol="MC74HC4052ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="A" pad="10"/>
<connect gate="A" pin="B" pad="9"/>
<connect gate="A" pin="ENABLE" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="13"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="11"/>
<connect gate="A" pin="Y" pad="3"/>
<connect gate="A" pin="Y0" pad="1"/>
<connect gate="A" pin="Y1" pad="5"/>
<connect gate="A" pin="Y2" pad="2"/>
<connect gate="A" pin="Y3" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4052ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K4233" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4052ANG" prefix="U">
<description>Analog Multiplexers / Demultiplexers</description>
<gates>
<gate name="A" symbol="MC74HC4052ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="10"/>
<connect gate="A" pin="B" pad="9"/>
<connect gate="A" pin="EN" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="13"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="14"/>
<connect gate="A" pin="X2" pad="15"/>
<connect gate="A" pin="X3" pad="11"/>
<connect gate="A" pin="Y" pad="3"/>
<connect gate="A" pin="Y0" pad="1"/>
<connect gate="A" pin="Y1" pad="5"/>
<connect gate="A" pin="Y2" pad="2"/>
<connect gate="A" pin="Y3" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4052ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9664548" constant="no"/>
<attribute name="OC_NEWARK" value="45J1328" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4053ADWG" prefix="U">
<description>Analog Multiplexers/ Demultiplexers</description>
<gates>
<gate name="A" symbol="MC74HC4053ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="ENABLE" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="14"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="13"/>
<connect gate="A" pin="Y" pad="15"/>
<connect gate="A" pin="Y0" pad="2"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Z" pad="4"/>
<connect gate="A" pin="Z0" pad="5"/>
<connect gate="A" pin="Z1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4053ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="26K4235" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4053ANG" prefix="U">
<description>Analog Multiplexers Demultiplexers</description>
<gates>
<gate name="A" symbol="MC74HC4053ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="11"/>
<connect gate="A" pin="B" pad="10"/>
<connect gate="A" pin="C" pad="9"/>
<connect gate="A" pin="EN" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="VEE" pad="7"/>
<connect gate="A" pin="X" pad="14"/>
<connect gate="A" pin="X0" pad="12"/>
<connect gate="A" pin="X1" pad="13"/>
<connect gate="A" pin="Y" pad="15"/>
<connect gate="A" pin="Y0" pad="2"/>
<connect gate="A" pin="Y1" pad="1"/>
<connect gate="A" pin="Z" pad="4"/>
<connect gate="A" pin="Z0" pad="5"/>
<connect gate="A" pin="Z1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4053ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665978" constant="no"/>
<attribute name="OC_NEWARK" value="45J1330" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4060ADG" prefix="U">
<description>14-Stage Binary Ripple Counter With Oscillator</description>
<gates>
<gate name="A" symbol="MC74HC4060ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="OSC_IN" pad="11"/>
<connect gate="A" pin="OSC_OUT_1" pad="10"/>
<connect gate="A" pin="OSC_OUT_2" pad="9"/>
<connect gate="A" pin="Q10" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q13" pad="2"/>
<connect gate="A" pin="Q14" pad="3"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="14"/>
<connect gate="A" pin="Q9" pad="13"/>
<connect gate="A" pin="RESET" pad="12"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4060ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1705808" constant="no"/>
<attribute name="OC_NEWARK" value="26K4237" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4060ANG" prefix="U">
<description>14-Stage Binary Ripple Counter With Oscillator</description>
<gates>
<gate name="A" symbol="MC74HC4060ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="OSC_IN" pad="11"/>
<connect gate="A" pin="OSC_OUT_1" pad="10"/>
<connect gate="A" pin="OSC_OUT_2" pad="9"/>
<connect gate="A" pin="Q10" pad="15"/>
<connect gate="A" pin="Q12" pad="1"/>
<connect gate="A" pin="Q13" pad="2"/>
<connect gate="A" pin="Q14" pad="3"/>
<connect gate="A" pin="Q4" pad="7"/>
<connect gate="A" pin="Q5" pad="5"/>
<connect gate="A" pin="Q6" pad="4"/>
<connect gate="A" pin="Q7" pad="6"/>
<connect gate="A" pin="Q8" pad="14"/>
<connect gate="A" pin="Q9" pad="13"/>
<connect gate="A" pin="RESET" pad="12"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4060ANG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="70K3160" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4066ADG" prefix="U">
<description>Quad Analog Switch/Multiplexer/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74HC4066ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A_ON/OFF_CONTROL" pad="13"/>
<connect gate="A" pin="B_ON/OFF_CONTROL" pad="5"/>
<connect gate="A" pin="C_ON/OFF_CONTROL" pad="6"/>
<connect gate="A" pin="D_ON/OFF_CONTROL" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="XA" pad="1"/>
<connect gate="A" pin="XB" pad="4"/>
<connect gate="A" pin="XC" pad="8"/>
<connect gate="A" pin="XD" pad="11"/>
<connect gate="A" pin="YA" pad="2"/>
<connect gate="A" pin="YB" pad="3"/>
<connect gate="A" pin="YC" pad="9"/>
<connect gate="A" pin="YD" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4066ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9666990" constant="no"/>
<attribute name="OC_NEWARK" value="45J1332" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4066ADR2G" prefix="U">
<description>Quad Analog Switch/Multiplexer/Demultiplexer</description>
<gates>
<gate name="A" symbol="MC74HC4066ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A_ON/OFF_CONTROL" pad="13"/>
<connect gate="A" pin="B_ON/OFF_CONTROL" pad="5"/>
<connect gate="A" pin="C_ON/OFF_CONTROL" pad="6"/>
<connect gate="A" pin="D_ON/OFF_CONTROL" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="XA" pad="1"/>
<connect gate="A" pin="XB" pad="4"/>
<connect gate="A" pin="XC" pad="8"/>
<connect gate="A" pin="XD" pad="11"/>
<connect gate="A" pin="YA" pad="2"/>
<connect gate="A" pin="YB" pad="3"/>
<connect gate="A" pin="YC" pad="9"/>
<connect gate="A" pin="YD" pad="10"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4066ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1273200" constant="no"/>
<attribute name="OC_NEWARK" value="84K8781" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4538ADG" prefix="U">
<description>Dual Precision Monostable  Multivibrator</description>
<gates>
<gate name="A" symbol="MC74HC4538ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="12"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="11"/>
<connect gate="A" pin="CX1/RX1" pad="2"/>
<connect gate="A" pin="CX2/RX2" pad="14"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="GND_2" pad="15"/>
<connect gate="A" pin="GND_3" pad="1"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="RESET_1" pad="3"/>
<connect gate="A" pin="RESET_2" pad="13"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="~Q1" pad="7"/>
<connect gate="A" pin="~Q2" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4538ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1607840" constant="no"/>
<attribute name="OC_NEWARK" value="45J1336" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC4538ANG" prefix="U">
<description>Dual Precision Monostable Multivibrator</description>
<gates>
<gate name="A" symbol="MC74HC4538ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="12"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="11"/>
<connect gate="A" pin="CX1/RX1" pad="2"/>
<connect gate="A" pin="CX2/RX2" pad="14"/>
<connect gate="A" pin="GND" pad="15"/>
<connect gate="A" pin="GND_2" pad="1"/>
<connect gate="A" pin="GND_3" pad="8"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="Q2" pad="10"/>
<connect gate="A" pin="RESET_1" pad="3"/>
<connect gate="A" pin="RESET_2" pad="13"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="~Q1" pad="7"/>
<connect gate="A" pin="~Q2" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC4538ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665986" constant="no"/>
<attribute name="OC_NEWARK" value="45J1338" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC540ANG" prefix="U">
<description>Octal 3-State Inverting Buffer</description>
<gates>
<gate name="A" symbol="MC74HC540ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC540ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9665994" constant="no"/>
<attribute name="OC_NEWARK" value="26K4250" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC541ADTG" prefix="U">
<description>IC BUFFER/DRIVER TRI-STATE 8BIT</description>
<gates>
<gate name="A" symbol="MC74HC541ADTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC541ADTG" constant="no"/>
<attribute name="OC_FARNELL" value="1104726" constant="no"/>
<attribute name="OC_NEWARK" value="42K0902" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC541ADWG" prefix="U">
<description>Noninverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HC541ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC541ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607612" constant="no"/>
<attribute name="OC_NEWARK" value="42K0904" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC541ADWR2G" prefix="U">
<description>Noninverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HC541ADWR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC541ADWR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1276833" constant="no"/>
<attribute name="OC_NEWARK" value="84K8782" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC541ANG" prefix="U">
<description>Octal 3-State Inverting Buffer</description>
<gates>
<gate name="A" symbol="MC74HC541ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC541ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666001" constant="no"/>
<attribute name="OC_NEWARK" value="45J1340" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC573ADTG" prefix="U">
<description>Octal Noninverting Latch</description>
<gates>
<gate name="A" symbol="MC74HC573ADTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="4"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="D4" pad="6"/>
<connect gate="A" pin="D5" pad="7"/>
<connect gate="A" pin="D6" pad="8"/>
<connect gate="A" pin="D7" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="LATCH_ENABLE" pad="11"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="1"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="18"/>
<connect gate="A" pin="Q2" pad="17"/>
<connect gate="A" pin="Q3" pad="16"/>
<connect gate="A" pin="Q4" pad="15"/>
<connect gate="A" pin="Q5" pad="14"/>
<connect gate="A" pin="Q6" pad="13"/>
<connect gate="A" pin="Q7" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC573ADTG" constant="no"/>
<attribute name="OC_FARNELL" value="1104727" constant="no"/>
<attribute name="OC_NEWARK" value="42K0905" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC573ADWG" prefix="U">
<description>Octal Noninverting Transparent Latch</description>
<gates>
<gate name="A" symbol="MC74HC573ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="4"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="D4" pad="6"/>
<connect gate="A" pin="D5" pad="7"/>
<connect gate="A" pin="D6" pad="8"/>
<connect gate="A" pin="D7" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="LATCH_ENABLE" pad="11"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="1"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="18"/>
<connect gate="A" pin="Q2" pad="17"/>
<connect gate="A" pin="Q3" pad="16"/>
<connect gate="A" pin="Q4" pad="15"/>
<connect gate="A" pin="Q5" pad="14"/>
<connect gate="A" pin="Q6" pad="13"/>
<connect gate="A" pin="Q7" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC573ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1095313" constant="no"/>
<attribute name="OC_NEWARK" value="45J1341" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC573ANG" prefix="U">
<description>Octal 3-State Noninverting Transparent Latch</description>
<gates>
<gate name="A" symbol="MC74HC573ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="4"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="D4" pad="6"/>
<connect gate="A" pin="D5" pad="7"/>
<connect gate="A" pin="D6" pad="8"/>
<connect gate="A" pin="D7" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="LATCH_ENABLE" pad="11"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="1"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="18"/>
<connect gate="A" pin="Q2" pad="17"/>
<connect gate="A" pin="Q3" pad="16"/>
<connect gate="A" pin="Q4" pad="15"/>
<connect gate="A" pin="Q5" pad="14"/>
<connect gate="A" pin="Q6" pad="13"/>
<connect gate="A" pin="Q7" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC573ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666010" constant="no"/>
<attribute name="OC_NEWARK" value="45J1343" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC574ADWG" prefix="U">
<description>Octal Noninverting D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HC574ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="CLOCK" pad="11"/>
<connect gate="A" pin="D0" pad="2"/>
<connect gate="A" pin="D1" pad="3"/>
<connect gate="A" pin="D2" pad="4"/>
<connect gate="A" pin="D3" pad="5"/>
<connect gate="A" pin="D4" pad="6"/>
<connect gate="A" pin="D5" pad="7"/>
<connect gate="A" pin="D6" pad="8"/>
<connect gate="A" pin="D7" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="1"/>
<connect gate="A" pin="Q0" pad="19"/>
<connect gate="A" pin="Q1" pad="18"/>
<connect gate="A" pin="Q2" pad="17"/>
<connect gate="A" pin="Q3" pad="16"/>
<connect gate="A" pin="Q4" pad="15"/>
<connect gate="A" pin="Q5" pad="14"/>
<connect gate="A" pin="Q6" pad="13"/>
<connect gate="A" pin="Q7" pad="12"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC574ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0908" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC589ANG" prefix="U">
<description>8-Bit Serial or Parallel-Input/Serial-Output Shift Register</description>
<gates>
<gate name="A" symbol="MC74HC589ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="15"/>
<connect gate="A" pin="B" pad="1"/>
<connect gate="A" pin="C" pad="2"/>
<connect gate="A" pin="D" pad="3"/>
<connect gate="A" pin="E" pad="4"/>
<connect gate="A" pin="F" pad="5"/>
<connect gate="A" pin="G" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="H" pad="7"/>
<connect gate="A" pin="LATCH_CLK" pad="12"/>
<connect gate="A" pin="OUT_EN" pad="10"/>
<connect gate="A" pin="QH" pad="9"/>
<connect gate="A" pin="SA" pad="14"/>
<connect gate="A" pin="SER_SHIFT/PAR_LOAD" pad="13"/>
<connect gate="A" pin="SHIFT_CLK" pad="11"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC589ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1703300" constant="no"/>
<attribute name="OC_NEWARK" value="45J1346" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC595ADG" prefix="U">
<description>8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs</description>
<gates>
<gate name="A" symbol="MC74HC595ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="14"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="LATCH_CLOCK" pad="12"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="13"/>
<connect gate="A" pin="QA" pad="15"/>
<connect gate="A" pin="QB" pad="1"/>
<connect gate="A" pin="QC" pad="4"/>
<connect gate="A" pin="QD" pad="3"/>
<connect gate="A" pin="QE" pad="2"/>
<connect gate="A" pin="QF" pad="5"/>
<connect gate="A" pin="QG" pad="6"/>
<connect gate="A" pin="QH" pad="7"/>
<connect gate="A" pin="RESET" pad="10"/>
<connect gate="A" pin="SHIFT_CLOCK" pad="11"/>
<connect gate="A" pin="SQH" pad="9"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC595ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9667008" constant="no"/>
<attribute name="OC_NEWARK" value="45J1347" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC595ADR2G" prefix="U">
<description>8-Bit Serial-Input/Serial Parallel-Output Shift  3-State Outputs</description>
<gates>
<gate name="A" symbol="MC74HC595ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A" pad="14"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="LATCH_CLK" pad="12"/>
<connect gate="A" pin="OE" pad="13"/>
<connect gate="A" pin="QA" pad="15"/>
<connect gate="A" pin="QB" pad="1"/>
<connect gate="A" pin="QC" pad="2"/>
<connect gate="A" pin="QD" pad="3"/>
<connect gate="A" pin="QE" pad="4"/>
<connect gate="A" pin="QF" pad="5"/>
<connect gate="A" pin="QG" pad="6"/>
<connect gate="A" pin="QH" pad="7"/>
<connect gate="A" pin="RESET" pad="10"/>
<connect gate="A" pin="SHIFT_CLK" pad="11"/>
<connect gate="A" pin="SQH" pad="9"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC595ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1278491" constant="no"/>
<attribute name="OC_NEWARK" value="84K8783" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC595ADTR2G" prefix="U">
<description>8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs</description>
<gates>
<gate name="A" symbol="MC74HC595ADTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-16N">
<connects>
<connect gate="A" pin="A" pad="14"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="LATCH_CLOCK" pad="12"/>
<connect gate="A" pin="OUTPUT_ENABLE" pad="13"/>
<connect gate="A" pin="QA" pad="15"/>
<connect gate="A" pin="QB" pad="1"/>
<connect gate="A" pin="QC" pad="2"/>
<connect gate="A" pin="QD" pad="3"/>
<connect gate="A" pin="QE" pad="4"/>
<connect gate="A" pin="QF" pad="5"/>
<connect gate="A" pin="QG" pad="6"/>
<connect gate="A" pin="QH" pad="7"/>
<connect gate="A" pin="RESET" pad="10"/>
<connect gate="A" pin="SHIFT_CLOCK" pad="11"/>
<connect gate="A" pin="SQH" pad="9"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC595ADTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1607848" constant="no"/>
<attribute name="OC_NEWARK" value="42K0910" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC595ANG" prefix="U">
<description>8-Bit Serial or Parallel-Input/Serial-Output Shift Register</description>
<gates>
<gate name="A" symbol="MC74HC595ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="A" pad="14"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="LATCH_CLK" pad="12"/>
<connect gate="A" pin="OUT_EN" pad="13"/>
<connect gate="A" pin="QA" pad="15"/>
<connect gate="A" pin="QB" pad="1"/>
<connect gate="A" pin="QC" pad="2"/>
<connect gate="A" pin="QD" pad="3"/>
<connect gate="A" pin="QE" pad="4"/>
<connect gate="A" pin="QF" pad="5"/>
<connect gate="A" pin="QG" pad="6"/>
<connect gate="A" pin="QH" pad="7"/>
<connect gate="A" pin="RESET" pad="10"/>
<connect gate="A" pin="SHIFT_CLK" pad="11"/>
<connect gate="A" pin="SQH" pad="9"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC595ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666036" constant="no"/>
<attribute name="OC_NEWARK" value="45J1349" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC74ADG" prefix="U">
<description>Dual D Flip-Flop with Set and Reset</description>
<gates>
<gate name="A" symbol="MC74HC74ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CLK_1" pad="3"/>
<connect gate="A" pin="CLK_2" pad="11"/>
<connect gate="A" pin="DATA_1" pad="2"/>
<connect gate="A" pin="DATA_2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="RESET_1" pad="1"/>
<connect gate="A" pin="RESET_2" pad="13"/>
<connect gate="A" pin="SET_1" pad="4"/>
<connect gate="A" pin="SET_2" pad="10"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC74ADG" constant="no"/>
<attribute name="OC_FARNELL" value="9667016" constant="no"/>
<attribute name="OC_NEWARK" value="26K4258" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC74ADR2G" prefix="U">
<description>Dual D Flip-Flop with Set and Reset</description>
<gates>
<gate name="A" symbol="MC74HC74ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="CLK_1" pad="3"/>
<connect gate="A" pin="CLK_2" pad="11"/>
<connect gate="A" pin="DATA_1" pad="2"/>
<connect gate="A" pin="DATA_2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="RESET_1" pad="1"/>
<connect gate="A" pin="RESET_2" pad="13"/>
<connect gate="A" pin="SET_1" pad="4"/>
<connect gate="A" pin="SET_2" pad="10"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC74ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="84K8784" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC74ANG" prefix="U">
<description>Dual D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HC74ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CLK1" pad="3"/>
<connect gate="A" pin="CLK2" pad="11"/>
<connect gate="A" pin="DATA1" pad="2"/>
<connect gate="A" pin="DATA2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="RESET1" pad="1"/>
<connect gate="A" pin="RESET2" pad="13"/>
<connect gate="A" pin="SET1" pad="4"/>
<connect gate="A" pin="SET2" pad="10"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC74ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666044" constant="no"/>
<attribute name="OC_NEWARK" value="98H0712" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HC86ADG" prefix="U">
<description>Quad 2-Input Exclusive OR Gate</description>
<gates>
<gate name="A" symbol="MC74HC86ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="10"/>
<connect gate="A" pin="B4" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HC86ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1705810" constant="no"/>
<attribute name="OC_NEWARK" value="26K4260" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT04ADG" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74HCT04ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT04ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1155561" constant="no"/>
<attribute name="OC_NEWARK" value="71J5579" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT04ANG" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74HCT04ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT04ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1150450" constant="no"/>
<attribute name="OC_NEWARK" value="45J1266" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT14ADG" prefix="U">
<description>Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs</description>
<gates>
<gate name="A" symbol="MC74HCT14ADG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT14ADG" constant="no"/>
<attribute name="OC_FARNELL" value="1607774" constant="no"/>
<attribute name="OC_NEWARK" value="45J1267" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT14ANG" prefix="U">
<description>Hex Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="MC74HCT14ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT14ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666079" constant="no"/>
<attribute name="OC_NEWARK" value="45J1269" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT244ADWG" prefix="U">
<description>Octal Noninverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HCT244ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="8"/>
<connect gate="A" pin="B1" pad="11"/>
<connect gate="A" pin="B2" pad="13"/>
<connect gate="A" pin="B3" pad="15"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="ENABLE_A" pad="1"/>
<connect gate="A" pin="ENABLE_B" pad="19"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="YA1" pad="18"/>
<connect gate="A" pin="YA2" pad="16"/>
<connect gate="A" pin="YA3" pad="14"/>
<connect gate="A" pin="YA4" pad="12"/>
<connect gate="A" pin="YB1" pad="9"/>
<connect gate="A" pin="YB2" pad="7"/>
<connect gate="A" pin="YB3" pad="5"/>
<connect gate="A" pin="YB4" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT244ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607614" constant="no"/>
<attribute name="OC_NEWARK" value="45J1270" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT374ANG" prefix="U">
<description>Octal 3-State Noninverting D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HCT374ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="CLK" pad="11"/>
<connect gate="A" pin="D0" pad="3"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="D2" pad="7"/>
<connect gate="A" pin="D3" pad="8"/>
<connect gate="A" pin="D4" pad="13"/>
<connect gate="A" pin="D5" pad="14"/>
<connect gate="A" pin="D6" pad="17"/>
<connect gate="A" pin="D7" pad="18"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE" pad="1"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="9"/>
<connect gate="A" pin="Q4" pad="12"/>
<connect gate="A" pin="Q5" pad="15"/>
<connect gate="A" pin="Q6" pad="16"/>
<connect gate="A" pin="Q7" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT374ANG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K0833" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT541ADWG" prefix="U">
<description>Octal Noninverting Buffer/Line Driver/Line Receiver</description>
<gates>
<gate name="A" symbol="MC74HCT541ADWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT541ADWG" constant="no"/>
<attribute name="OC_FARNELL" value="1260776" constant="no"/>
<attribute name="OC_NEWARK" value="42K0835" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT541ANG" prefix="U">
<description>Octal 3-State Non-Inverting Buffer</description>
<gates>
<gate name="A" symbol="MC74HCT541ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X457-20">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="4"/>
<connect gate="A" pin="A4" pad="5"/>
<connect gate="A" pin="A5" pad="6"/>
<connect gate="A" pin="A6" pad="7"/>
<connect gate="A" pin="A7" pad="8"/>
<connect gate="A" pin="A8" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="19"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="Y1" pad="18"/>
<connect gate="A" pin="Y2" pad="17"/>
<connect gate="A" pin="Y3" pad="16"/>
<connect gate="A" pin="Y4" pad="15"/>
<connect gate="A" pin="Y5" pad="14"/>
<connect gate="A" pin="Y6" pad="13"/>
<connect gate="A" pin="Y7" pad="12"/>
<connect gate="A" pin="Y8" pad="11"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT541ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1149622" constant="no"/>
<attribute name="OC_NEWARK" value="26K4184" constant="no"/>
<attribute name="PACKAGE" value="PDIP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCT74ANG" prefix="U">
<description>Dual D Flip-Flop</description>
<gates>
<gate name="A" symbol="MC74HCT74ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="CLK_1" pad="3"/>
<connect gate="A" pin="CLK_2" pad="11"/>
<connect gate="A" pin="DATA_1" pad="2"/>
<connect gate="A" pin="DATA_2" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="Q1" pad="5"/>
<connect gate="A" pin="Q2" pad="9"/>
<connect gate="A" pin="RESET_1" pad="1"/>
<connect gate="A" pin="RESET_2" pad="13"/>
<connect gate="A" pin="SET_1" pad="4"/>
<connect gate="A" pin="SET_2" pad="10"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~Q1" pad="6"/>
<connect gate="A" pin="~Q2" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCT74ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666087" constant="no"/>
<attribute name="OC_NEWARK" value="26K4190" constant="no"/>
<attribute name="PACKAGE" value="PDIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCU04ADR2G" prefix="U">
<description>Hex Unbuffered Inverter</description>
<gates>
<gate name="A" symbol="MC74HCU04ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCU04ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1268657" constant="no"/>
<attribute name="OC_NEWARK" value="84K8771" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74HCU04ANG" prefix="U">
<description>Hex Unbuffered Inverter</description>
<gates>
<gate name="A" symbol="MC74HCU04ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X469-14">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="2"/>
<connect gate="A" pin="Y2" pad="4"/>
<connect gate="A" pin="Y3" pad="6"/>
<connect gate="A" pin="Y4" pad="8"/>
<connect gate="A" pin="Y5" pad="10"/>
<connect gate="A" pin="Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74HCU04ANG" constant="no"/>
<attribute name="OC_FARNELL" value="9666052" constant="no"/>
<attribute name="OC_NEWARK" value="45J1277" constant="no"/>
<attribute name="PACKAGE" value="DIP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX04DG" prefix="U">
<description>Low-Voltage CMOS Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74LCX04DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="3"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="13"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="A5" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~O0" pad="2"/>
<connect gate="A" pin="~O1" pad="4"/>
<connect gate="A" pin="~O2" pad="6"/>
<connect gate="A" pin="~O3" pad="12"/>
<connect gate="A" pin="~O4" pad="10"/>
<connect gate="A" pin="~O5" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX04DG" constant="no"/>
<attribute name="OC_FARNELL" value="1353836" constant="no"/>
<attribute name="OC_NEWARK" value="42K0924" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX04DTG" prefix="U">
<description>CMOS Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74LCX04DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="3"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="13"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="A5" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~O0" pad="2"/>
<connect gate="A" pin="~O1" pad="4"/>
<connect gate="A" pin="~O2" pad="6"/>
<connect gate="A" pin="~O3" pad="12"/>
<connect gate="A" pin="~O4" pad="10"/>
<connect gate="A" pin="~O5" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX04DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1705884" constant="no"/>
<attribute name="OC_NEWARK" value="42K0925" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX08DG" prefix="U">
<description>Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74LCX08DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="13"/>
<connect gate="A" pin="A3" pad="10"/>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="12"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="O0" pad="3"/>
<connect gate="A" pin="O1" pad="6"/>
<connect gate="A" pin="O2" pad="11"/>
<connect gate="A" pin="O3" pad="8"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX08DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="98H0713" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX08DTG" prefix="U">
<description>Low-Voltage CMOS Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74LCX08DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="13"/>
<connect gate="A" pin="A3" pad="10"/>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="12"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="O0" pad="3"/>
<connect gate="A" pin="O1" pad="6"/>
<connect gate="A" pin="O2" pad="11"/>
<connect gate="A" pin="O3" pad="8"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX08DTG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="70K3162" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX14DG" prefix="U">
<description>Low Voltage CMOS Hex Schmitt Inverter With 5 V-Tolerant Inputs</description>
<gates>
<gate name="A" symbol="MC74LCX14DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~Y1" pad="2"/>
<connect gate="A" pin="~Y2" pad="4"/>
<connect gate="A" pin="~Y3" pad="6"/>
<connect gate="A" pin="~Y4" pad="8"/>
<connect gate="A" pin="~Y5" pad="10"/>
<connect gate="A" pin="~Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX14DG" constant="no"/>
<attribute name="OC_FARNELL" value="1567138" constant="no"/>
<attribute name="OC_NEWARK" value="27M2486" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX16245DTG" prefix="U">
<description>Low-Voltage CMOS 16-Bit Transceiver</description>
<gates>
<gate name="A" symbol="MC74LCX16245DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P810X110-48N">
<connects>
<connect gate="A" pin="A0" pad="47"/>
<connect gate="A" pin="A1" pad="46"/>
<connect gate="A" pin="A10" pad="33"/>
<connect gate="A" pin="A11" pad="32"/>
<connect gate="A" pin="A12" pad="30"/>
<connect gate="A" pin="A13" pad="29"/>
<connect gate="A" pin="A14" pad="27"/>
<connect gate="A" pin="A15" pad="26"/>
<connect gate="A" pin="A2" pad="44"/>
<connect gate="A" pin="A3" pad="43"/>
<connect gate="A" pin="A4" pad="41"/>
<connect gate="A" pin="A5" pad="40"/>
<connect gate="A" pin="A6" pad="38"/>
<connect gate="A" pin="A7" pad="37"/>
<connect gate="A" pin="A8" pad="36"/>
<connect gate="A" pin="A9" pad="35"/>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="3"/>
<connect gate="A" pin="B10" pad="16"/>
<connect gate="A" pin="B11" pad="17"/>
<connect gate="A" pin="B12" pad="19"/>
<connect gate="A" pin="B13" pad="20"/>
<connect gate="A" pin="B14" pad="22"/>
<connect gate="A" pin="B15" pad="23"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="6"/>
<connect gate="A" pin="B4" pad="8"/>
<connect gate="A" pin="B5" pad="9"/>
<connect gate="A" pin="B6" pad="11"/>
<connect gate="A" pin="B7" pad="12"/>
<connect gate="A" pin="B8" pad="13"/>
<connect gate="A" pin="B9" pad="14"/>
<connect gate="A" pin="GND" pad="39"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="GND_3" pad="21"/>
<connect gate="A" pin="GND_4" pad="10"/>
<connect gate="A" pin="GND_5" pad="15"/>
<connect gate="A" pin="GND_6" pad="28"/>
<connect gate="A" pin="GND_7" pad="45"/>
<connect gate="A" pin="GND_8" pad="34"/>
<connect gate="A" pin="T/~R1" pad="1"/>
<connect gate="A" pin="T/~R2" pad="24"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="7"/>
<connect gate="A" pin="VCC_3" pad="42"/>
<connect gate="A" pin="VCC_4" pad="31"/>
<connect gate="A" pin="~OE1" pad="48"/>
<connect gate="A" pin="~OE2" pad="25"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX16245DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1468759" constant="no"/>
<attribute name="OC_NEWARK" value="45J1362" constant="no"/>
<attribute name="PACKAGE" value="48-TSSOP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX16245DTR2" prefix="U">
<description>Low-Voltage CMOS 16-Bit Transceiver</description>
<gates>
<gate name="A" symbol="MC74LCX16245DTR2" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P810X110-48N">
<connects>
<connect gate="A" pin="A0" pad="47"/>
<connect gate="A" pin="A1" pad="46"/>
<connect gate="A" pin="A10" pad="33"/>
<connect gate="A" pin="A11" pad="32"/>
<connect gate="A" pin="A12" pad="30"/>
<connect gate="A" pin="A13" pad="29"/>
<connect gate="A" pin="A14" pad="27"/>
<connect gate="A" pin="A15" pad="26"/>
<connect gate="A" pin="A2" pad="44"/>
<connect gate="A" pin="A3" pad="43"/>
<connect gate="A" pin="A4" pad="41"/>
<connect gate="A" pin="A5" pad="40"/>
<connect gate="A" pin="A6" pad="38"/>
<connect gate="A" pin="A7" pad="37"/>
<connect gate="A" pin="A8" pad="36"/>
<connect gate="A" pin="A9" pad="35"/>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="3"/>
<connect gate="A" pin="B10" pad="16"/>
<connect gate="A" pin="B11" pad="17"/>
<connect gate="A" pin="B12" pad="19"/>
<connect gate="A" pin="B13" pad="20"/>
<connect gate="A" pin="B14" pad="22"/>
<connect gate="A" pin="B15" pad="23"/>
<connect gate="A" pin="B2" pad="5"/>
<connect gate="A" pin="B3" pad="6"/>
<connect gate="A" pin="B4" pad="8"/>
<connect gate="A" pin="B5" pad="9"/>
<connect gate="A" pin="B6" pad="11"/>
<connect gate="A" pin="B7" pad="12"/>
<connect gate="A" pin="B8" pad="13"/>
<connect gate="A" pin="B9" pad="14"/>
<connect gate="A" pin="GND" pad="39"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="GND_3" pad="21"/>
<connect gate="A" pin="GND_4" pad="10"/>
<connect gate="A" pin="GND_5" pad="15"/>
<connect gate="A" pin="GND_6" pad="28"/>
<connect gate="A" pin="GND_7" pad="45"/>
<connect gate="A" pin="GND_8" pad="34"/>
<connect gate="A" pin="T/~R1" pad="1"/>
<connect gate="A" pin="T/~R2" pad="24"/>
<connect gate="A" pin="VCC" pad="18"/>
<connect gate="A" pin="VCC_2" pad="7"/>
<connect gate="A" pin="VCC_3" pad="42"/>
<connect gate="A" pin="VCC_4" pad="31"/>
<connect gate="A" pin="~OE1" pad="48"/>
<connect gate="A" pin="~OE2" pad="25"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX16245DTR2" constant="no"/>
<attribute name="OC_FARNELL" value="7615280" constant="no"/>
<attribute name="OC_NEWARK" value="75C2896" constant="no"/>
<attribute name="PACKAGE" value="48-TSSOP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX16373DTG" prefix="U">
<description>Low-Voltage CMOS 16-Bit Transparent Latch</description>
<gates>
<gate name="A" symbol="MC74LCX16373DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P810X110-48N">
<connects>
<connect gate="A" pin="D0" pad="47"/>
<connect gate="A" pin="D1" pad="46"/>
<connect gate="A" pin="D10" pad="33"/>
<connect gate="A" pin="D11" pad="32"/>
<connect gate="A" pin="D12" pad="30"/>
<connect gate="A" pin="D13" pad="29"/>
<connect gate="A" pin="D14" pad="27"/>
<connect gate="A" pin="D15" pad="26"/>
<connect gate="A" pin="D2" pad="44"/>
<connect gate="A" pin="D3" pad="43"/>
<connect gate="A" pin="D4" pad="41"/>
<connect gate="A" pin="D5" pad="40"/>
<connect gate="A" pin="D6" pad="38"/>
<connect gate="A" pin="D7" pad="37"/>
<connect gate="A" pin="D8" pad="36"/>
<connect gate="A" pin="D9" pad="35"/>
<connect gate="A" pin="GN" pad="39"/>
<connect gate="A" pin="GND" pad="15"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="GND_3" pad="21"/>
<connect gate="A" pin="GND_4" pad="10"/>
<connect gate="A" pin="GN_2" pad="28"/>
<connect gate="A" pin="GN_3" pad="45"/>
<connect gate="A" pin="GN_4" pad="34"/>
<connect gate="A" pin="LE1" pad="48"/>
<connect gate="A" pin="LE2" pad="25"/>
<connect gate="A" pin="O0" pad="2"/>
<connect gate="A" pin="O1" pad="3"/>
<connect gate="A" pin="O10" pad="16"/>
<connect gate="A" pin="O11" pad="17"/>
<connect gate="A" pin="O12" pad="19"/>
<connect gate="A" pin="O13" pad="20"/>
<connect gate="A" pin="O14" pad="22"/>
<connect gate="A" pin="O15" pad="23"/>
<connect gate="A" pin="O2" pad="5"/>
<connect gate="A" pin="O3" pad="6"/>
<connect gate="A" pin="O4" pad="8"/>
<connect gate="A" pin="O5" pad="9"/>
<connect gate="A" pin="O6" pad="11"/>
<connect gate="A" pin="O7" pad="12"/>
<connect gate="A" pin="O8" pad="13"/>
<connect gate="A" pin="O9" pad="14"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="24"/>
<connect gate="A" pin="VCC" pad="42"/>
<connect gate="A" pin="VCC_2" pad="7"/>
<connect gate="A" pin="VCC_3" pad="18"/>
<connect gate="A" pin="VCC_4" pad="31"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX16373DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1706048" constant="no"/>
<attribute name="OC_NEWARK" value="98H0715" constant="no"/>
<attribute name="PACKAGE" value="48-TSSOP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX244DWG" prefix="U">
<description>CMOS Octal Buffer</description>
<gates>
<gate name="A" symbol="MC74LCX244DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="1D0" pad="2"/>
<connect gate="A" pin="1D1" pad="4"/>
<connect gate="A" pin="1D2" pad="6"/>
<connect gate="A" pin="1D3" pad="8"/>
<connect gate="A" pin="1O0" pad="18"/>
<connect gate="A" pin="1O1" pad="16"/>
<connect gate="A" pin="1O2" pad="14"/>
<connect gate="A" pin="1O3" pad="12"/>
<connect gate="A" pin="2D0" pad="17"/>
<connect gate="A" pin="2D1" pad="15"/>
<connect gate="A" pin="2D2" pad="13"/>
<connect gate="A" pin="2D3" pad="11"/>
<connect gate="A" pin="2O0" pad="3"/>
<connect gate="A" pin="2O1" pad="5"/>
<connect gate="A" pin="2O2" pad="7"/>
<connect gate="A" pin="2O3" pad="9"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="~1OE" pad="1"/>
<connect gate="A" pin="~2OE" pad="19"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX244DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1468760" constant="no"/>
<attribute name="OC_NEWARK" value="88H4742" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LCX245DWG" prefix="U">
<description>Low-Voltage CMOS Octal Transceiver</description>
<gates>
<gate name="A" symbol="MC74LCX245DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="A0" pad="2"/>
<connect gate="A" pin="A1" pad="3"/>
<connect gate="A" pin="A2" pad="4"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="6"/>
<connect gate="A" pin="A5" pad="7"/>
<connect gate="A" pin="A6" pad="8"/>
<connect gate="A" pin="A7" pad="9"/>
<connect gate="A" pin="B0" pad="18"/>
<connect gate="A" pin="B1" pad="17"/>
<connect gate="A" pin="B2" pad="16"/>
<connect gate="A" pin="B3" pad="15"/>
<connect gate="A" pin="B4" pad="14"/>
<connect gate="A" pin="B5" pad="13"/>
<connect gate="A" pin="B6" pad="12"/>
<connect gate="A" pin="B7" pad="11"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="T/R" pad="1"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="~OE" pad="19"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LCX245DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1607898" constant="no"/>
<attribute name="OC_NEWARK" value="71J5643" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LVX04DTR2G" prefix="U">
<description>Hex Inverter</description>
<gates>
<gate name="A" symbol="MC74LVX04DTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="3"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="11"/>
<connect gate="A" pin="A5" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~O0" pad="2"/>
<connect gate="A" pin="~O1" pad="4"/>
<connect gate="A" pin="~O2" pad="6"/>
<connect gate="A" pin="~O3" pad="8"/>
<connect gate="A" pin="~O4" pad="10"/>
<connect gate="A" pin="~O5" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LVX04DTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1364067" constant="no"/>
<attribute name="OC_NEWARK" value="26K4277" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LVX08DTG" prefix="U">
<description>Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74LVX08DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="13"/>
<connect gate="A" pin="A3" pad="10"/>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="12"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="O0" pad="3"/>
<connect gate="A" pin="O1" pad="6"/>
<connect gate="A" pin="O2" pad="11"/>
<connect gate="A" pin="O3" pad="8"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LVX08DTG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K1002" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LVX08DTR2G" prefix="U">
<description>Quad 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74LVX08DTR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="13"/>
<connect gate="A" pin="A3" pad="10"/>
<connect gate="A" pin="B0" pad="2"/>
<connect gate="A" pin="B1" pad="5"/>
<connect gate="A" pin="B2" pad="12"/>
<connect gate="A" pin="B3" pad="9"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="O0" pad="3"/>
<connect gate="A" pin="O1" pad="6"/>
<connect gate="A" pin="O2" pad="11"/>
<connect gate="A" pin="O3" pad="8"/>
<connect gate="A" pin="VCC" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LVX08DTR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1353762" constant="no"/>
<attribute name="OC_NEWARK" value="26K4279" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LVX4245DTG" prefix="U">
<description>Dual Supply Octal Translating Transceiver</description>
<gates>
<gate name="A" symbol="MC74LVX4245DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-24N">
<connects>
<connect gate="A" pin="A0" pad="3"/>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="7"/>
<connect gate="A" pin="A5" pad="8"/>
<connect gate="A" pin="A6" pad="9"/>
<connect gate="A" pin="A7" pad="10"/>
<connect gate="A" pin="B0" pad="21"/>
<connect gate="A" pin="B1" pad="20"/>
<connect gate="A" pin="B2" pad="19"/>
<connect gate="A" pin="B3" pad="18"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="B5" pad="16"/>
<connect gate="A" pin="B6" pad="15"/>
<connect gate="A" pin="B7" pad="14"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="GND_2" pad="11"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="T/~R" pad="2"/>
<connect gate="A" pin="VCCA" pad="1"/>
<connect gate="A" pin="VCCB" pad="24"/>
<connect gate="A" pin="VCCB_2" pad="23"/>
<connect gate="A" pin="~OE" pad="22"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LVX4245DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607901" constant="no"/>
<attribute name="OC_NEWARK" value="42K1044" constant="no"/>
<attribute name="PACKAGE" value="SOP-24" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74LVXC3245DTG" prefix="U">
<description>Configurable Dual Supply Octal Transceiver</description>
<gates>
<gate name="A" symbol="MC74LVXC3245DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-24N">
<connects>
<connect gate="A" pin="A0" pad="3"/>
<connect gate="A" pin="A1" pad="4"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="6"/>
<connect gate="A" pin="A4" pad="7"/>
<connect gate="A" pin="A5" pad="8"/>
<connect gate="A" pin="A6" pad="9"/>
<connect gate="A" pin="A7" pad="10"/>
<connect gate="A" pin="B0" pad="21"/>
<connect gate="A" pin="B1" pad="20"/>
<connect gate="A" pin="B2" pad="19"/>
<connect gate="A" pin="B3" pad="18"/>
<connect gate="A" pin="B4" pad="17"/>
<connect gate="A" pin="B5" pad="16"/>
<connect gate="A" pin="B6" pad="15"/>
<connect gate="A" pin="B7" pad="14"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="GND_2" pad="11"/>
<connect gate="A" pin="GND_3" pad="12"/>
<connect gate="A" pin="NC" pad="23"/>
<connect gate="A" pin="T/~R" pad="2"/>
<connect gate="A" pin="VCCA" pad="1"/>
<connect gate="A" pin="VCCB" pad="24"/>
<connect gate="A" pin="~OE" pad="22"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74LVXC3245DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1126244" constant="no"/>
<attribute name="OC_NEWARK" value="42K0978" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-24" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC138DG" prefix="U">
<description>3--to--8 Line Decoder</description>
<gates>
<gate name="A" symbol="MC74VHC138DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-16N">
<connects>
<connect gate="A" pin="A0" pad="1"/>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="E3" pad="6"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
<connect gate="A" pin="~E1" pad="4"/>
<connect gate="A" pin="~E2" pad="5"/>
<connect gate="A" pin="~Y0" pad="15"/>
<connect gate="A" pin="~Y1" pad="14"/>
<connect gate="A" pin="~Y2" pad="13"/>
<connect gate="A" pin="~Y3" pad="12"/>
<connect gate="A" pin="~Y4" pad="11"/>
<connect gate="A" pin="~Y5" pad="10"/>
<connect gate="A" pin="~Y6" pad="9"/>
<connect gate="A" pin="~Y7" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC138DG" constant="no"/>
<attribute name="OC_FARNELL" value="1345135" constant="no"/>
<attribute name="OC_NEWARK" value="42K1128" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC14DTG" prefix="U">
<description>Hex Schmitt Inverter</description>
<gates>
<gate name="A" symbol="MC74VHC14DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-14N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="3"/>
<connect gate="A" pin="A3" pad="5"/>
<connect gate="A" pin="A4" pad="9"/>
<connect gate="A" pin="A5" pad="11"/>
<connect gate="A" pin="A6" pad="13"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="~Y1" pad="2"/>
<connect gate="A" pin="~Y2" pad="4"/>
<connect gate="A" pin="~Y3" pad="6"/>
<connect gate="A" pin="~Y4" pad="8"/>
<connect gate="A" pin="~Y5" pad="10"/>
<connect gate="A" pin="~Y6" pad="12"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC14DTG" constant="no"/>
<attribute name="OC_FARNELL" value="1420212" constant="no"/>
<attribute name="OC_NEWARK" value="42K1131" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-14" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G00DFT1G" prefix="U">
<description>Single 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74VHC1G00DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G00DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1607775" constant="no"/>
<attribute name="OC_NEWARK" value="67H6739" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G00DFT2G" prefix="U">
<description>Single 2-Input NAND Gate</description>
<gates>
<gate name="A" symbol="MC74VHC1G00DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G00DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7798" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G03DFT1G" prefix="U">
<description>Single 2-Input NOR Gate with Open Drain Output</description>
<gates>
<gate name="A" symbol="MC74VHC1G03DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G03DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1311401" constant="no"/>
<attribute name="OC_NEWARK" value="67H6745" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G04DFT1G" prefix="U">
<description>Single Inverter</description>
<gates>
<gate name="A" symbol="MC74VHC1G04DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G04DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="6389478" constant="no"/>
<attribute name="OC_NEWARK" value="09H2337" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G05DFT1G" prefix="U">
<description>Single Inverter with Open Drain Output</description>
<gates>
<gate name="A" symbol="MC74VHC1G05DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G05DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1155487" constant="no"/>
<attribute name="OC_NEWARK" value="67H6747" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G08DFT1G" prefix="U">
<description>Single 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="MC74VHC1G08DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G08DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1353867" constant="no"/>
<attribute name="OC_NEWARK" value="67H6751" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G09DFT1G" prefix="U">
<description>2-Input AND Gate with Open Drain Output</description>
<gates>
<gate name="A" symbol="MC74VHC1G09DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G09DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="67H6753" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G125DFT1" prefix="U">
<description>Noninverting 3-State Buffer</description>
<gates>
<gate name="A" symbol="MC74VHC1G125DFT1" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G125DFT1" constant="no"/>
<attribute name="OC_FARNELL" value="4523088" constant="no"/>
<attribute name="OC_NEWARK" value="27C8252" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G126DFT1" prefix="U">
<description>Noninverting 3-State Buffer</description>
<gates>
<gate name="A" symbol="MC74VHC1G126DFT1" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OE" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G126DFT1" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="27C8257" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G14DFT1G" prefix="U">
<description>Single Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="MC74VHC1G14DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G14DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1353868" constant="no"/>
<attribute name="OC_NEWARK" value="67H6763" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G32DTT1G" prefix="U">
<description>Single 2-Input OR Gate</description>
<gates>
<gate name="A" symbol="MC74VHC1G32DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G32DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1607778" constant="no"/>
<attribute name="OC_NEWARK" value="83H7308" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1G86DFT1G" prefix="U">
<description>Single 2-Input Exclusive OR Gate</description>
<gates>
<gate name="A" symbol="MC74VHC1G86DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1G86DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="67H6771" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT125DF1" prefix="U">
<description>Noninverting Buffer /CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT125DF1" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT125DF1" constant="no"/>
<attribute name="OC_FARNELL" value="4542496" constant="no"/>
<attribute name="OC_NEWARK" value="35C3055" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT125DF2" prefix="U">
<description>Noninverting Buffer /CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT125DF2" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT125DF2" constant="no"/>
<attribute name="OC_FARNELL" value="4782239" constant="no"/>
<attribute name="OC_NEWARK" value="27C8237" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT125DT1" prefix="U">
<description>Noninverting Buffer /CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT125DT1" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT125DT1" constant="no"/>
<attribute name="OC_FARNELL" value="4523039" constant="no"/>
<attribute name="OC_NEWARK" value="27C8239" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT126DF1" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT126DF1" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OE" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT126DF1" constant="no"/>
<attribute name="OC_FARNELL" value="4812918" constant="no"/>
<attribute name="OC_NEWARK" value="35C3056" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT126DF1G" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT126DF1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OE" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT126DF1G" constant="no"/>
<attribute name="OC_FARNELL" value="1654341" constant="no"/>
<attribute name="OC_NEWARK" value="-" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT32DFT1G" prefix="U">
<description>2-Input OR Gate/CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT32DFT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="IN_B" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT32DFT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="74R1832" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHC1GT50DTT1" prefix="U">
<description>Noninverting Buffer / CMOS Logic Level Shifter</description>
<gates>
<gate name="A" symbol="MC74VHC1GT50DTT1" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHC1GT50DTT1" constant="no"/>
<attribute name="OC_FARNELL" value="1652259" constant="no"/>
<attribute name="OC_NEWARK" value="35C3058" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC74VHCT125ADR2G" prefix="U">
<description>Quad Bus Buffer</description>
<gates>
<gate name="A" symbol="MC74VHCT125ADR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="A3" pad="9"/>
<connect gate="A" pin="A4" pad="12"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="Y1" pad="3"/>
<connect gate="A" pin="Y2" pad="6"/>
<connect gate="A" pin="Y3" pad="8"/>
<connect gate="A" pin="Y4" pad="11"/>
<connect gate="A" pin="~OE1" pad="1"/>
<connect gate="A" pin="~OE2" pad="4"/>
<connect gate="A" pin="~OE3" pad="10"/>
<connect gate="A" pin="~OE4" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC74VHCT125ADR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1468762" constant="no"/>
<attribute name="OC_NEWARK" value="26K4324" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC75174BDWG" prefix="U">
<description>Quad RS-485 Line Drivers</description>
<gates>
<gate name="A" symbol="MC75174BDWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-20N">
<connects>
<connect gate="A" pin="1A" pad="1"/>
<connect gate="A" pin="1Y" pad="2"/>
<connect gate="A" pin="1Z" pad="4"/>
<connect gate="A" pin="2A" pad="9"/>
<connect gate="A" pin="2Y" pad="8"/>
<connect gate="A" pin="2Z" pad="6"/>
<connect gate="A" pin="3A" pad="11"/>
<connect gate="A" pin="3Y" pad="12"/>
<connect gate="A" pin="3Z" pad="14"/>
<connect gate="A" pin="4A" pad="19"/>
<connect gate="A" pin="4Y" pad="18"/>
<connect gate="A" pin="4Z" pad="16"/>
<connect gate="A" pin="EN12" pad="5"/>
<connect gate="A" pin="EN34" pad="15"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="NC" pad="17"/>
<connect gate="A" pin="NC_2" pad="3"/>
<connect gate="A" pin="NC_3" pad="7"/>
<connect gate="A" pin="NC_4" pad="13"/>
<connect gate="A" pin="VCC" pad="20"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC75174BDWG" constant="no"/>
<attribute name="OC_FARNELL" value="1258376" constant="no"/>
<attribute name="OC_NEWARK" value="42K1167" constant="no"/>
<attribute name="PACKAGE" value="SOIC-20" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC75174BPG" prefix="U">
<description>Quad EIA-485 Line Drivers with Three-State Outputs</description>
<gates>
<gate name="A" symbol="MC75174BPG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="1A" pad="1"/>
<connect gate="A" pin="1Y" pad="2"/>
<connect gate="A" pin="1Z" pad="3"/>
<connect gate="A" pin="2A" pad="7"/>
<connect gate="A" pin="2Y" pad="6"/>
<connect gate="A" pin="2Z" pad="5"/>
<connect gate="A" pin="3A" pad="9"/>
<connect gate="A" pin="3Y" pad="10"/>
<connect gate="A" pin="3Z" pad="11"/>
<connect gate="A" pin="4A" pad="15"/>
<connect gate="A" pin="4Y" pad="14"/>
<connect gate="A" pin="4Z" pad="13"/>
<connect gate="A" pin="EN_12" pad="4"/>
<connect gate="A" pin="EN_34" pad="12"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC75174BPG" constant="no"/>
<attribute name="OC_FARNELL" value="1252475" constant="no"/>
<attribute name="OC_NEWARK" value="42K1168" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L05ABDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L05ABDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L05ABDG" constant="no"/>
<attribute name="OC_FARNELL" value="1652342" constant="no"/>
<attribute name="OC_NEWARK" value="71J5712" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L05ABDR2G" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L05ABDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L05ABDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1353941" constant="no"/>
<attribute name="OC_NEWARK" value="88H4745" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L05ACDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L05ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L05ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666265" constant="no"/>
<attribute name="OC_NEWARK" value="88H4746" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L05ACDR2G" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L05ACDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L05ACDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1278565" constant="no"/>
<attribute name="OC_NEWARK" value="88H4747" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L08ABDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L08ABDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L08ABDG" constant="no"/>
<attribute name="OC_FARNELL" value="1155721" constant="no"/>
<attribute name="OC_NEWARK" value="88H4750" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L08ACDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L08ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L08ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1211120" constant="no"/>
<attribute name="OC_NEWARK" value="45J1406" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L09ACDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L09ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L09ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1147860" constant="no"/>
<attribute name="OC_NEWARK" value="71J5715" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L12ACDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L12ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L12ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="9666273" constant="no"/>
<attribute name="OC_NEWARK" value="71J5719" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L12ACDR2G" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L12ACDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L12ACDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1278494" constant="no"/>
<attribute name="OC_NEWARK" value="84K8788" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L15ABDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L15ABDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L15ABDG" constant="no"/>
<attribute name="OC_FARNELL" value="1705888" constant="no"/>
<attribute name="OC_NEWARK" value="42K1177" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L15ACDG" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L15ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L15ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1211121" constant="no"/>
<attribute name="OC_NEWARK" value="71J5721" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78L15ACDR2G" prefix="U">
<description>Positive Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78L15ACDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="6"/>
<connect gate="A" pin="GND_3" pad="2"/>
<connect gate="A" pin="GND_4" pad="3"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="8"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78L15ACDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1278495" constant="no"/>
<attribute name="OC_NEWARK" value="84K8789" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78LC33NTRG" prefix="U">
<description>Micropower Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78LC33NTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="N/C_2" pad="5"/>
<connect gate="A" pin="VIN" pad="2"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78LC33NTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1652349" constant="no"/>
<attribute name="OC_NEWARK" value="71J5709" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78LC50NTRG" prefix="U">
<description>Micropower Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78LC50NTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="N/C_2" pad="5"/>
<connect gate="A" pin="VIN" pad="2"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78LC50NTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1652350" constant="no"/>
<attribute name="OC_NEWARK" value="26K4390" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78PC18NTRG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78PC18NTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78PC18NTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1130695" constant="no"/>
<attribute name="OC_NEWARK" value="88H4756" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78PC33NTRG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78PC33NTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78PC33NTRG" constant="no"/>
<attribute name="OC_FARNELL" value="1652356" constant="no"/>
<attribute name="OC_NEWARK" value="45J1438" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC78PC50NTRG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC78PC50NTRG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC78PC50NTRG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="42K1216" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC79L05ABDG" prefix="U">
<description>Negative Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC79L05ABDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="7"/>
<connect gate="A" pin="VIN_2" pad="6"/>
<connect gate="A" pin="VIN_3" pad="2"/>
<connect gate="A" pin="VIN_4" pad="3"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC79L05ABDG" constant="no"/>
<attribute name="OC_FARNELL" value="1652359" constant="no"/>
<attribute name="OC_NEWARK" value="71J5761" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC79L12ACDG" prefix="U">
<description>Negative Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC79L12ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="7"/>
<connect gate="A" pin="VIN_2" pad="6"/>
<connect gate="A" pin="VIN_3" pad="2"/>
<connect gate="A" pin="VIN_4" pad="3"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC79L12ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1652361" constant="no"/>
<attribute name="OC_NEWARK" value="26K4410" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MC79L15ACDG" prefix="U">
<description>Negative Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="MC79L15ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="NC" pad="8"/>
<connect gate="A" pin="NC_2" pad="4"/>
<connect gate="A" pin="VIN" pad="7"/>
<connect gate="A" pin="VIN_2" pad="6"/>
<connect gate="A" pin="VIN_3" pad="2"/>
<connect gate="A" pin="VIN_4" pad="3"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MC79L15ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1211126" constant="no"/>
<attribute name="OC_NEWARK" value="26K4415" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MCH12140DG" prefix="U">
<description>Phase-Frequency Detector</description>
<gates>
<gate name="A" symbol="MCH12140DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="D" pad="4"/>
<connect gate="A" pin="R" pad="7"/>
<connect gate="A" pin="U" pad="2"/>
<connect gate="A" pin="V" pad="6"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="~D" pad="3"/>
<connect gate="A" pin="~U" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MCH12140DG" constant="no"/>
<attribute name="OC_FARNELL" value="1704006" constant="no"/>
<attribute name="OC_NEWARK" value="45J0812" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MDC3105DMT1G" prefix="U">
<description>Integrated Relay,Inductive Load Driver</description>
<gates>
<gate name="A" symbol="MDC3105DMT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-6N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="GND_2" pad="1"/>
<connect gate="A" pin="VIN" pad="2"/>
<connect gate="A" pin="VIN_2" pad="5"/>
<connect gate="A" pin="VOUT" pad="3"/>
<connect gate="A" pin="VOUT_2" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MDC3105DMT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7836" constant="no"/>
<attribute name="PACKAGE" value="SC-74-6" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MDC3105LT1G" prefix="U">
<description>Integrated Relay,  Inductive Load Driver</description>
<gates>
<gate name="A" symbol="MDC3105LT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X110-3N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MDC3105LT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1126459" constant="no"/>
<attribute name="OC_NEWARK" value="45J1474" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="MMBZ5243BLT1G" prefix="U">
<description>Zener Voltage Regulators</description>
<gates>
<gate name="A" symbol="MMBZ5243BLT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X110-3N">
<connects>
<connect gate="A" pin="ANODE" pad="1"/>
<connect gate="A" pin="CATHODE" pad="3"/>
<connect gate="A" pin="NC" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="MMBZ5243BLT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1899437" constant="no"/>
<attribute name="OC_NEWARK" value="98H0778" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="N25S830HAS22I" prefix="U">
<description>256 Kb Low Power Serial SRAMs</description>
<gates>
<gate name="A" symbol="N25S830HAS22I" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="SCK" pad="6"/>
<connect gate="A" pin="SI" pad="5"/>
<connect gate="A" pin="SO" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="VSS" pad="4"/>
<connect gate="A" pin="~CS" pad="1"/>
<connect gate="A" pin="~HOLD" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="N25S830HAS22I" constant="no"/>
<attribute name="OC_FARNELL" value="1668757" constant="no"/>
<attribute name="OC_NEWARK" value="03P1180" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB100ELT23LDTG" prefix="U">
<description>Translator</description>
<gates>
<gate name="A" symbol="NB100ELT23LDTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D0" pad="1"/>
<connect gate="A" pin="D1" pad="4"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="7"/>
<connect gate="A" pin="Q1" pad="6"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D0" pad="2"/>
<connect gate="A" pin="~D1" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB100ELT23LDTG" constant="no"/>
<attribute name="OC_FARNELL" value="1607888" constant="no"/>
<attribute name="OC_NEWARK" value="45J1769" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB3L553DG" prefix="U">
<description>2.5 V / 3.3 V / 5.0 V 1:4 Clock Fanout Buffer</description>
<gates>
<gate name="A" symbol="NB3L553DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="ICLK" pad="5"/>
<connect gate="A" pin="OE" pad="8"/>
<connect gate="A" pin="Q0" pad="2"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="6"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="VDD" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB3L553DG" constant="no"/>
<attribute name="OC_FARNELL" value="1705282" constant="no"/>
<attribute name="OC_NEWARK" value="02M9803" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB3N2304NZDTG" prefix="U">
<description>Buffer</description>
<gates>
<gate name="A" symbol="NB3N2304NZDTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X110-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="1"/>
<connect gate="A" pin="OE" pad="2"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="Q2" pad="5"/>
<connect gate="A" pin="Q3" pad="7"/>
<connect gate="A" pin="Q4" pad="8"/>
<connect gate="A" pin="VDD" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB3N2304NZDTG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="27M2498" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB3N551DG" prefix="U">
<description>3.3 V / 5.0 V Ultra-Low Skew 1:4 Clock Fanout Buffer</description>
<gates>
<gate name="A" symbol="NB3N551DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="ICLK" pad="1"/>
<connect gate="A" pin="OE" pad="8"/>
<connect gate="A" pin="Q1" pad="2"/>
<connect gate="A" pin="Q2" pad="3"/>
<connect gate="A" pin="Q3" pad="4"/>
<connect gate="A" pin="Q4" pad="5"/>
<connect gate="A" pin="VDD" pad="7"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB3N551DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="02M9807" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB6L11DTG" prefix="U">
<description>Translator</description>
<gates>
<gate name="A" symbol="NB6L11DTG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P490X110-8N">
<connects>
<connect gate="A" pin="D" pad="7"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="Q0" pad="1"/>
<connect gate="A" pin="Q1" pad="3"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~D" pad="6"/>
<connect gate="A" pin="~Q0" pad="2"/>
<connect gate="A" pin="~Q1" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB6L11DTG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="61K1178" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-8" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB6L14MNG" prefix="U">
<description>1:4 Fanout Buffer</description>
<gates>
<gate name="A" symbol="NB6L14MNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFN50P300X300X100-17N">
<connects>
<connect gate="A" pin="EN" pad="8"/>
<connect gate="A" pin="EP" pad="17"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="IN" pad="12"/>
<connect gate="A" pin="Q0" pad="15"/>
<connect gate="A" pin="Q1" pad="1"/>
<connect gate="A" pin="Q2" pad="3"/>
<connect gate="A" pin="Q3" pad="5"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="VCC_2" pad="7"/>
<connect gate="A" pin="VREF_AC" pad="10"/>
<connect gate="A" pin="VT" pad="11"/>
<connect gate="A" pin="~IN" pad="9"/>
<connect gate="A" pin="~Q0" pad="16"/>
<connect gate="A" pin="~Q1" pad="2"/>
<connect gate="A" pin="~Q2" pad="4"/>
<connect gate="A" pin="~Q3" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB6L14MNG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="32M7325" constant="no"/>
<attribute name="PACKAGE" value="QFN-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB6L239MNG" prefix="U">
<description>Clock Driver</description>
<gates>
<gate name="A" symbol="NB6L239MNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFN50P300X300X100-17N">
<connects>
<connect gate="A" pin="CLK" pad="2"/>
<connect gate="A" pin="EP" pad="17"/>
<connect gate="A" pin="QA" pad="12"/>
<connect gate="A" pin="QB" pad="10"/>
<connect gate="A" pin="SELA0" pad="15"/>
<connect gate="A" pin="SELA1" pad="14"/>
<connect gate="A" pin="SELB0" pad="6"/>
<connect gate="A" pin="SELB1" pad="7"/>
<connect gate="A" pin="VBBAC" pad="4"/>
<connect gate="A" pin="VCC" pad="13"/>
<connect gate="A" pin="VEE" pad="8"/>
<connect gate="A" pin="VT" pad="1"/>
<connect gate="A" pin="~CLK" pad="3"/>
<connect gate="A" pin="~EN" pad="5"/>
<connect gate="A" pin="~MR" pad="16"/>
<connect gate="A" pin="~QA" pad="11"/>
<connect gate="A" pin="~QB" pad="9"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB6L239MNG" constant="no"/>
<attribute name="OC_FARNELL" value="1258239" constant="no"/>
<attribute name="OC_NEWARK" value="26K4793" constant="no"/>
<attribute name="PACKAGE" value="QFN-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NB6N14SMNG" prefix="U">
<description>1:4 Fanout Buffer/Translator</description>
<gates>
<gate name="A" symbol="NB6N14SMNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFN50P300X300X100-17N">
<connects>
<connect gate="A" pin="EN" pad="8"/>
<connect gate="A" pin="EP" pad="17"/>
<connect gate="A" pin="GND" pad="13"/>
<connect gate="A" pin="IN" pad="12"/>
<connect gate="A" pin="Q0" pad="15"/>
<connect gate="A" pin="Q1" pad="1"/>
<connect gate="A" pin="Q2" pad="3"/>
<connect gate="A" pin="Q3" pad="5"/>
<connect gate="A" pin="VCC" pad="14"/>
<connect gate="A" pin="VCC_2" pad="7"/>
<connect gate="A" pin="VREF_AC" pad="10"/>
<connect gate="A" pin="VT" pad="11"/>
<connect gate="A" pin="~IN" pad="9"/>
<connect gate="A" pin="~Q0" pad="16"/>
<connect gate="A" pin="~Q1" pad="2"/>
<connect gate="A" pin="~Q2" pad="4"/>
<connect gate="A" pin="~Q3" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NB6N14SMNG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="02M9811" constant="no"/>
<attribute name="PACKAGE" value="QFN-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NBSG11MNG" prefix="U">
<description>Clock Driver</description>
<gates>
<gate name="A" symbol="NBSG11MNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="QFN50P300X300X100-17N">
<connects>
<connect gate="A" pin="CLK" pad="3"/>
<connect gate="A" pin="EP" pad="17"/>
<connect gate="A" pin="NC" pad="15"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="NC_3" pad="7"/>
<connect gate="A" pin="NC_4" pad="14"/>
<connect gate="A" pin="Q0" pad="12"/>
<connect gate="A" pin="Q1" pad="10"/>
<connect gate="A" pin="VCC" pad="13"/>
<connect gate="A" pin="VCC_2" pad="8"/>
<connect gate="A" pin="VEE" pad="16"/>
<connect gate="A" pin="VEE_2" pad="5"/>
<connect gate="A" pin="VTCLK" pad="4"/>
<connect gate="A" pin="~CLK" pad="2"/>
<connect gate="A" pin="~Q0" pad="11"/>
<connect gate="A" pin="~Q1" pad="9"/>
<connect gate="A" pin="~VTCLK" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NBSG11MNG" constant="no"/>
<attribute name="OC_FARNELL" value="1364630" constant="no"/>
<attribute name="OC_NEWARK" value="45J1760" constant="no"/>
<attribute name="PACKAGE" value="QFN-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP100SNT1G" prefix="U">
<description>Sub 1.0 V Precision Adjustable Shunt Regulator</description>
<gates>
<gate name="A" symbol="NCP100SNT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="ANODE" pad="2"/>
<connect gate="A" pin="ANODE_2" pad="5"/>
<connect gate="A" pin="CATHODE" pad="3"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="REFERENCE" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP100SNT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1778" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1055P100G" prefix="U">
<description>Switching Regulator</description>
<gates>
<gate name="A" symbol="NCP1055P100G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="CONTROL_INPUT" pad="2"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="3"/>
<connect gate="A" pin="GND_3" pad="8"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="POWER_SWITCH_DRAIN" pad="5"/>
<connect gate="A" pin="VCC" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1055P100G" constant="no"/>
<attribute name="OC_FARNELL" value="1155580" constant="no"/>
<attribute name="OC_NEWARK" value="71J6558" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1055P136G" prefix="U">
<description>Switching Regulator</description>
<gates>
<gate name="A" symbol="NCP1055P136G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="CONTROL_INPUT" pad="2"/>
<connect gate="A" pin="GND" pad="7"/>
<connect gate="A" pin="GND_2" pad="3"/>
<connect gate="A" pin="GND_3" pad="8"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="POWER_SWITCH_DRAIN" pad="5"/>
<connect gate="A" pin="VCC" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1055P136G" constant="no"/>
<attribute name="OC_FARNELL" value="1364573" constant="no"/>
<attribute name="OC_NEWARK" value="42K1799" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1090DG" prefix="U">
<description>Integrated IEEE 802.3af PoE-PD Interface Controller</description>
<gates>
<gate name="A" symbol="NCP1090DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X172-8N">
<connects>
<connect gate="A" pin="CLASS" pad="2"/>
<connect gate="A" pin="DET" pad="3"/>
<connect gate="A" pin="INRUSH" pad="1"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="PGOOD" pad="6"/>
<connect gate="A" pin="RTN" pad="5"/>
<connect gate="A" pin="VPORTN" pad="4"/>
<connect gate="A" pin="VPORTP" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1090DG" constant="no"/>
<attribute name="OC_FARNELL" value="1901642" constant="no"/>
<attribute name="OC_NEWARK" value="55T3598" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1092DG" prefix="U">
<description>Integrated IEEE 802.3af PoE-PD Interface Controller</description>
<gates>
<gate name="A" symbol="NCP1092DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X172-8N">
<connects>
<connect gate="A" pin="AUX" pad="7"/>
<connect gate="A" pin="CLASS" pad="2"/>
<connect gate="A" pin="DET" pad="3"/>
<connect gate="A" pin="INRUSH" pad="1"/>
<connect gate="A" pin="PGOOD" pad="6"/>
<connect gate="A" pin="RTN" pad="5"/>
<connect gate="A" pin="VPORTN" pad="4"/>
<connect gate="A" pin="VPORTP" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1092DG" constant="no"/>
<attribute name="OC_FARNELL" value="1901647" constant="no"/>
<attribute name="OC_NEWARK" value="55T3602" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1200D100R2G" prefix="U">
<description>Fixed Frequency Flyback Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="NCP1200D100R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJ" pad="1"/>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1200D100R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1652430" constant="no"/>
<attribute name="OC_NEWARK" value="88H4976" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1200P100G" prefix="U">
<description>PWM Current-Mode</description>
<gates>
<gate name="A" symbol="NCP1200P100G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="ADJ" pad="1"/>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1200P100G" constant="no"/>
<attribute name="OC_FARNELL" value="1652431" constant="no"/>
<attribute name="OC_NEWARK" value="88H4977" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1200P40G" prefix="U">
<description>PWM Current-Mode</description>
<gates>
<gate name="A" symbol="NCP1200P40G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="ADJ" pad="1"/>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1200P40G" constant="no"/>
<attribute name="OC_FARNELL" value="1652432" constant="no"/>
<attribute name="OC_NEWARK" value="88H4978" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1200P60G" prefix="U">
<description>PWM Current-Mode</description>
<gates>
<gate name="A" symbol="NCP1200P60G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="ADJ" pad="1"/>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1200P60G" constant="no"/>
<attribute name="OC_FARNELL" value="1652433" constant="no"/>
<attribute name="OC_NEWARK" value="88H4979" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1203D100R2G" prefix="U">
<description>Fixed Frequency Flyback Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="NCP1203D100R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJ" pad="1"/>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1203D100R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1652434" constant="no"/>
<attribute name="OC_NEWARK" value="98H0874" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1203D60R2G" prefix="U">
<description>Fixed Frequency Flyback Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="NCP1203D60R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ADJ" pad="1"/>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1203D60R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1652435" constant="no"/>
<attribute name="OC_NEWARK" value="45J1797" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1230D100R2G" prefix="U">
<description>Low-Standby Power High Performance PWM Controller</description>
<gates>
<gate name="A" symbol="NCP1230D100R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="CS" pad="3"/>
<connect gate="A" pin="DRV" pad="5"/>
<connect gate="A" pin="FB" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="HV" pad="8"/>
<connect gate="A" pin="NC" pad="7"/>
<connect gate="A" pin="PFC_VCC" pad="1"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1230D100R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1736555" constant="no"/>
<attribute name="OC_NEWARK" value="77M8942" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1400ASN33T1G" prefix="U">
<description>Switching Regulator</description>
<gates>
<gate name="A" symbol="NCP1400ASN33T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="LX" pad="5"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1400ASN33T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1652392" constant="no"/>
<attribute name="OC_NEWARK" value="42K1839" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1402SN33T1G" prefix="U">
<description>Micropower Switching Regulator</description>
<gates>
<gate name="A" symbol="NCP1402SN33T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="LX" pad="5"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1402SN33T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1703414" constant="no"/>
<attribute name="OC_NEWARK" value="45J1846" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1402SN50T1G" prefix="U">
<description>200 mA, PFM Step-Up Micropower Switching Regulator</description>
<gates>
<gate name="A" symbol="NCP1402SN50T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="LX" pad="5"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1402SN50T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1652393" constant="no"/>
<attribute name="OC_NEWARK" value="98H0882" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1450ASN19T1G" prefix="U">
<description>PWM Step-up DC-DC Controller</description>
<gates>
<gate name="A" symbol="NCP1450ASN19T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P280X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="EXT" pad="5"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1450ASN19T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1924868" constant="no"/>
<attribute name="OC_NEWARK" value="58T2051" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1450ASN27T1G" prefix="U">
<description>PWM Step-up DC-DC Controller</description>
<gates>
<gate name="A" symbol="NCP1450ASN27T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P280X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="EXT" pad="5"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1450ASN27T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1924869" constant="no"/>
<attribute name="OC_NEWARK" value="58T2052" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1450ASN33T1G" prefix="U">
<description>PWM Step-up DC-DC Controller</description>
<gates>
<gate name="A" symbol="NCP1450ASN33T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P280X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="EXT" pad="5"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="NC" pad="3"/>
<connect gate="A" pin="OUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1450ASN33T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1924870" constant="no"/>
<attribute name="OC_NEWARK" value="58T2053" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1521BSNT1G" prefix="U">
<description>1.5 MHz, 600 mA Step-Down DC-DC Converter</description>
<gates>
<gate name="A" symbol="NCP1521BSNT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="EN" pad="3"/>
<connect gate="A" pin="FB" pad="4"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="LX" pad="5"/>
<connect gate="A" pin="VIN" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1521BSNT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1432258" constant="no"/>
<attribute name="OC_NEWARK" value="04R7840" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1529ASNT1G" prefix="U">
<description>1.7MHz, 1A, High Efficiency, Low Ripple, Adjustable Output Voltage Step-down Converter</description>
<gates>
<gate name="A" symbol="NCP1529ASNT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="EN" pad="1"/>
<connect gate="A" pin="FB" pad="5"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="SW" pad="3"/>
<connect gate="A" pin="VIN" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1529ASNT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1642398" constant="no"/>
<attribute name="OC_NEWARK" value="75M5084" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1529MUTBG" prefix="U">
<description>Voltage Step-down Converter</description>
<gates>
<gate name="A" symbol="NCP1529MUTBG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN200X200X55-7N">
<connects>
<connect gate="A" pin="EN" pad="6"/>
<connect gate="A" pin="EPAD" pad="7"/>
<connect gate="A" pin="FB" pad="1"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="GND_2" pad="4"/>
<connect gate="A" pin="SW" pad="5"/>
<connect gate="A" pin="VIN" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1529MUTBG" constant="no"/>
<attribute name="OC_FARNELL" value="1642428" constant="no"/>
<attribute name="OC_NEWARK" value="95M6817" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP1729SN35T1G" prefix="U">
<description>Switched Capacitor Voltage Inverter</description>
<gates>
<gate name="A" symbol="NCP1729SN35T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP95P275X110-6N">
<connects>
<connect gate="A" pin="C+" pad="6"/>
<connect gate="A" pin="C-" pad="3"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="VIN" pad="2"/>
<connect gate="A" pin="VOUT" pad="1"/>
<connect gate="A" pin="~SHDN" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP1729SN35T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1652414" constant="no"/>
<attribute name="OC_NEWARK" value="45J1868" constant="no"/>
<attribute name="PACKAGE" value="TSOP-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP2811BFCCT1G" prefix="U">
<description>Stereo Headphone Amplifier</description>
<gates>
<gate name="A" symbol="NCP2811BFCCT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="BGA12C50P4X3_150X200X60">
<connects>
<connect gate="A" pin="AGND" pad="A1"/>
<connect gate="A" pin="CPM" pad="C3"/>
<connect gate="A" pin="CPP" pad="C1"/>
<connect gate="A" pin="INL" pad="B3"/>
<connect gate="A" pin="INR" pad="B2"/>
<connect gate="A" pin="OUTL" pad="A4"/>
<connect gate="A" pin="OUTR" pad="A3"/>
<connect gate="A" pin="PGND" pad="C2"/>
<connect gate="A" pin="PVM" pad="C4"/>
<connect gate="A" pin="SPVM" pad="B4"/>
<connect gate="A" pin="VP" pad="B1"/>
<connect gate="A" pin="~SD" pad="A2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP2811BFCCT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885119" constant="no"/>
<attribute name="OC_NEWARK" value="41T0724" constant="no"/>
<attribute name="PACKAGE" value="Flip-Chip -12" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP2824FCT2G" prefix="U">
<description>Class D Amplifier</description>
<gates>
<gate name="A" symbol="NCP2824FCT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="BGA9C50P3X3_145X145X66">
<connects>
<connect gate="A" pin="AGND" pad="B1"/>
<connect gate="A" pin="CNTL" pad="C2"/>
<connect gate="A" pin="INM" pad="C1"/>
<connect gate="A" pin="INP" pad="A1"/>
<connect gate="A" pin="NC" pad="B2"/>
<connect gate="A" pin="OUTM" pad="C3"/>
<connect gate="A" pin="OUTP" pad="A3"/>
<connect gate="A" pin="PGND" pad="B3"/>
<connect gate="A" pin="VDD" pad="A2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP2824FCT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885120" constant="no"/>
<attribute name="OC_NEWARK" value="41T0725" constant="no"/>
<attribute name="PACKAGE" value="WCSP-9" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP301LSN09T1G" prefix="U">
<description>Voltage Detector Series</description>
<gates>
<gate name="A" symbol="NCP301LSN09T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="5"/>
<connect gate="A" pin="N.C._2" pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP301LSN09T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1705034" constant="no"/>
<attribute name="OC_NEWARK" value="71J6593" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP301LSN20T1G" prefix="U">
<description>Voltage Detector Series</description>
<gates>
<gate name="A" symbol="NCP301LSN20T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C" pad="4"/>
<connect gate="A" pin="N.C_2" pad="5"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP301LSN20T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1311235" constant="no"/>
<attribute name="OC_NEWARK" value="45J1876" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP301LSN45T1G" prefix="U">
<description>Voltage Detector Series</description>
<gates>
<gate name="A" symbol="NCP301LSN45T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="5"/>
<connect gate="A" pin="N.C._2" pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP301LSN45T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1468769" constant="no"/>
<attribute name="OC_NEWARK" value="98H0891" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP301LSN47T1G" prefix="U">
<description>Voltage Detector Series</description>
<gates>
<gate name="A" symbol="NCP301LSN47T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="5"/>
<connect gate="A" pin="N.C._2" pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP301LSN47T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1364633" constant="no"/>
<attribute name="OC_NEWARK" value="45J1877" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP302LSN30T1G" prefix="U">
<description>Voltage Detector Series with Programmable Delay</description>
<gates>
<gate name="A" symbol="NCP302LSN30T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CD" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP302LSN30T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1136366" constant="no"/>
<attribute name="OC_NEWARK" value="88H4986" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP302LSN45T1G" prefix="U">
<description>Voltage Detector Series with Programmable Delay</description>
<gates>
<gate name="A" symbol="NCP302LSN45T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CD" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP302LSN45T1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="45J1882" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP303LSN09T1G" prefix="U">
<description>Voltage Detector Series with Programmable Delay</description>
<gates>
<gate name="A" symbol="NCP303LSN09T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CD" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP303LSN09T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1364634" constant="no"/>
<attribute name="OC_NEWARK" value="45J1883" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP303LSN20T1G" prefix="U">
<description>Voltage Detector Series with Programmable Delay</description>
<gates>
<gate name="A" symbol="NCP303LSN20T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="CD" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN" pad="2"/>
<connect gate="A" pin="N.C." pad="4"/>
<connect gate="A" pin="RESET_OUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP303LSN20T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1652299" constant="no"/>
<attribute name="OC_NEWARK" value="83H7654" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP3063BDR2G" prefix="U">
<description>Inverting Switching Regulators</description>
<gates>
<gate name="A" symbol="NCP3063BDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMPARATOR_INVERTING_INPUT" pad="5"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SENSE" pad="7"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="SWITCH_COLLECTOR" pad="1"/>
<connect gate="A" pin="SWITCH_EMITTER" pad="2"/>
<connect gate="A" pin="TIMING_CAPACITOR" pad="3"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP3063BDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1547126" constant="no"/>
<attribute name="OC_NEWARK" value="04R7841" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP3065DR2G" prefix="U">
<description>Switching Regulator for LEDs</description>
<gates>
<gate name="A" symbol="NCP3065DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMPTR_NEG" pad="5"/>
<connect gate="A" pin="CT" pad="3"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IPK_SENSE" pad="7"/>
<connect gate="A" pin="N.C." pad="8"/>
<connect gate="A" pin="SW_C" pad="1"/>
<connect gate="A" pin="SW_E" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP3065DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1652395" constant="no"/>
<attribute name="OC_NEWARK" value="57M9798" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP3065PG" prefix="U">
<description>Regulator for LEDs</description>
<gates>
<gate name="A" symbol="NCP3065PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMP_NEG" pad="5"/>
<connect gate="A" pin="CT" pad="3"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="ISEN" pad="7"/>
<connect gate="A" pin="N.C" pad="8"/>
<connect gate="A" pin="SW_C" pad="1"/>
<connect gate="A" pin="SW_E" pad="2"/>
<connect gate="A" pin="VCC" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP3065PG" constant="no"/>
<attribute name="OC_FARNELL" value="1652396" constant="no"/>
<attribute name="OC_NEWARK" value="57M9800" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP3163BMNR2G" prefix="U">
<description>Switching Regulator</description>
<gates>
<gate name="A" symbol="NCP3163BMNR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN600X500X100-19N">
<connects>
<connect gate="A" pin="BOOTSTRAP_INPUT" pad="14"/>
<connect gate="A" pin="DRIVER_COLLECTOR" pad="5"/>
<connect gate="A" pin="EPAD" pad="19"/>
<connect gate="A" pin="GND" pad="18"/>
<connect gate="A" pin="IPK_SENSE" pad="4"/>
<connect gate="A" pin="LVI_OUTPUT" pad="15"/>
<connect gate="A" pin="N/C" pad="2"/>
<connect gate="A" pin="SWITCH_COLLECTOR" pad="6"/>
<connect gate="A" pin="SWITCH_COLLECTOR_2" pad="7"/>
<connect gate="A" pin="SWITCH_COLLECTOR_3" pad="8"/>
<connect gate="A" pin="SWITCH_COLLECTOR_4" pad="9"/>
<connect gate="A" pin="SWITCH_EMITTER" pad="10"/>
<connect gate="A" pin="SWITCH_EMITTER_2" pad="11"/>
<connect gate="A" pin="SWITCH_EMITTER_3" pad="12"/>
<connect gate="A" pin="SWITCH_EMITTER_4" pad="13"/>
<connect gate="A" pin="TC" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK1" pad="17"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK_2" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP3163BMNR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="27M2541" constant="no"/>
<attribute name="PACKAGE" value="DFN-18" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP361SNT1G" prefix="U">
<description>USB Positive Overvoltage Protection Controller</description>
<gates>
<gate name="A" symbol="NCP361SNT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP95P275X110-5N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="IN" pad="1"/>
<connect gate="A" pin="OUT" pad="5"/>
<connect gate="A" pin="~EN" pad="3"/>
<connect gate="A" pin="~FLAG" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP361SNT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1642242" constant="no"/>
<attribute name="OC_NEWARK" value="01P0135" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4587DMX12TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4587DMX12TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4587DMX12TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885122" constant="no"/>
<attribute name="OC_NEWARK" value="41T0727" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4587DMX18TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4587DMX18TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4587DMX18TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885123" constant="no"/>
<attribute name="OC_NEWARK" value="41T0728" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4587DMX28TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4587DMX28TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4587DMX28TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885124" constant="no"/>
<attribute name="OC_NEWARK" value="41T0729" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4587DMX30TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4587DMX30TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4587DMX30TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885125" constant="no"/>
<attribute name="OC_NEWARK" value="41T0730" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4587DMX33TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4587DMX33TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4587DMX33TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885126" constant="no"/>
<attribute name="OC_NEWARK" value="41T0731" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4588DSQ10T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4588DSQ10T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="VIN" pad="5"/>
<connect gate="A" pin="VOUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4588DSQ10T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885130" constant="no"/>
<attribute name="OC_NEWARK" value="41T0735" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4588DSQ15T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4588DSQ15T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="VIN" pad="5"/>
<connect gate="A" pin="VOUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4588DSQ15T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885131" constant="no"/>
<attribute name="OC_NEWARK" value="41T0736" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4588DSQ25T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4588DSQ25T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="CE" pad="1"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="VIN" pad="5"/>
<connect gate="A" pin="VOUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4588DSQ25T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885132" constant="no"/>
<attribute name="OC_NEWARK" value="41T0737" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DMX12TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DMX12TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DMX12TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885134" constant="no"/>
<attribute name="OC_NEWARK" value="41T0738" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DMX18TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DMX18TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DMX18TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885135" constant="no"/>
<attribute name="OC_NEWARK" value="41T0739" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DMX28TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DMX28TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DMX28TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885136" constant="no"/>
<attribute name="OC_NEWARK" value="41T0740" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DMX30TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DMX30TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DMX30TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885137" constant="no"/>
<attribute name="OC_NEWARK" value="41T0741" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DMX33TCG" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DMX33TCG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN120X120X40-6N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="NC" pad="5"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DMX33TCG" constant="no"/>
<attribute name="OC_FARNELL" value="1885138" constant="no"/>
<attribute name="OC_NEWARK" value="41T0742" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DSQ12T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DSQ12T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="5"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DSQ12T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885139" constant="no"/>
<attribute name="OC_NEWARK" value="24T3414" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DSQ18T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DSQ18T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="5"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DSQ18T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885140" constant="no"/>
<attribute name="OC_NEWARK" value="41T0744" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DSQ25T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DSQ25T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="5"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DSQ25T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885141" constant="no"/>
<attribute name="OC_NEWARK" value="24T3416" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DSQ30T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DSQ30T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="5"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DSQ30T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885142" constant="no"/>
<attribute name="OC_NEWARK" value="24T3417" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP4589DSQ33T1G" prefix="U">
<description>Linear Voltage Regulator</description>
<gates>
<gate name="A" symbol="NCP4589DSQ33T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="AE" pad="1"/>
<connect gate="A" pin="CE" pad="5"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="4"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP4589DSQ33T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1885143" constant="no"/>
<attribute name="OC_NEWARK" value="24T3418" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP565MNADJT2G" prefix="U">
<description>Linear Regulator</description>
<gates>
<gate name="A" symbol="NCP565MNADJT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X330X90-6N">
<connects>
<connect gate="A" pin="ADJ" pad="5"/>
<connect gate="A" pin="EPAD" pad="7"/>
<connect gate="A" pin="GND" pad="6"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="NC_2" pad="1"/>
<connect gate="A" pin="VIN" pad="3"/>
<connect gate="A" pin="VOUT" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP565MNADJT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1369744" constant="no"/>
<attribute name="OC_NEWARK" value="53M9459" constant="no"/>
<attribute name="PACKAGE" value="DFN-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP5810DMUTXG" prefix="U">
<description>Dual 1 W Output AMOLED Driver Supply</description>
<gates>
<gate name="A" symbol="NCP5810DMUTXG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X300X55-13N">
<connects>
<connect gate="A" pin="AGND" pad="4"/>
<connect gate="A" pin="AVIN" pad="8"/>
<connect gate="A" pin="EN" pad="9"/>
<connect gate="A" pin="EPAD" pad="13"/>
<connect gate="A" pin="FBN" pad="7"/>
<connect gate="A" pin="LXP" pad="12"/>
<connect gate="A" pin="PGND" pad="3"/>
<connect gate="A" pin="PVIN" pad="11"/>
<connect gate="A" pin="SWN" pad="10"/>
<connect gate="A" pin="SWP" pad="2"/>
<connect gate="A" pin="VOUTP" pad="1"/>
<connect gate="A" pin="VREF" pad="5"/>
<connect gate="A" pin="VS" pad="6"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP5810DMUTXG" constant="no"/>
<attribute name="OC_FARNELL" value="1578235" constant="no"/>
<attribute name="OC_NEWARK" value="-" constant="no"/>
<attribute name="PACKAGE" value="DFN-12" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP699SN18T1G" prefix="U">
<description>CMOS Low Iq LDO</description>
<gates>
<gate name="A" symbol="NCP699SN18T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP95P275X110-5N">
<connects>
<connect gate="A" pin="ENABLE" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP699SN18T1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7848" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP699SN33T1G" prefix="U">
<description>150 mA CMOS Low Iq LDO with Enable</description>
<gates>
<gate name="A" symbol="NCP699SN33T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="EN" pad="3"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="N/C" pad="4"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP699SN33T1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7849" constant="no"/>
<attribute name="PACKAGE" value="TSOP-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCP803SN263T1G" prefix="U">
<description>3-Pin Microprocessor</description>
<gates>
<gate name="A" symbol="NCP803SN263T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="GND" pad="1"/>
<connect gate="A" pin="VCC" pad="3"/>
<connect gate="A" pin="~RESET" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCP803SN263T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1652406" constant="no"/>
<attribute name="OC_NEWARK" value="42K2012" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCS2001SN1T1G" prefix="U">
<description>Operational Amplifier</description>
<gates>
<gate name="A" symbol="NCS2001SN1T1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-5N">
<connects>
<connect gate="A" pin="NEG" pad="4"/>
<connect gate="A" pin="POS" pad="3"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="VOUT" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCS2001SN1T1G" constant="no"/>
<attribute name="OC_FARNELL" value="1364638" constant="no"/>
<attribute name="OC_NEWARK" value="45J1978" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV1124DG" prefix="U">
<description>Dual Variable-Reluctance Sensor Interface</description>
<gates>
<gate name="A" symbol="NCV1124DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="DIAG" pad="5"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN1" pad="2"/>
<connect gate="A" pin="IN2" pad="3"/>
<connect gate="A" pin="INADJ" pad="1"/>
<connect gate="A" pin="OUT1" pad="7"/>
<connect gate="A" pin="OUT2" pad="6"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV1124DG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="02M9852" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV85082BPD33R2G" prefix="U">
<description>5.0 V and 3.3 V, 250 mA  LDO with Watchdog and ~RESET</description>
<gates>
<gate name="A" symbol="NCV85082BPD33R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-9N">
<connects>
<connect gate="A" pin="DELAY" pad="1"/>
<connect gate="A" pin="EP" pad="9"/>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="SENSE" pad="3"/>
<connect gate="A" pin="VIN" pad="5"/>
<connect gate="A" pin="VOUT" pad="4"/>
<connect gate="A" pin="WAKEUP" pad="7"/>
<connect gate="A" pin="WDI" pad="6"/>
<connect gate="A" pin="~RESET" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV85082BPD33R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885144" constant="no"/>
<attribute name="OC_NEWARK" value="41T0751" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV8537MN180R2G" prefix="U">
<description>Linear Regulator</description>
<gates>
<gate name="A" symbol="NCV8537MN180R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X300X100-10N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="10"/>
<connect gate="A" pin="IN_2" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NR" pad="7"/>
<connect gate="A" pin="OUT" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="PWRG" pad="5"/>
<connect gate="A" pin="SENSE" pad="3"/>
<connect gate="A" pin="~SD" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV8537MN180R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885146" constant="no"/>
<attribute name="OC_NEWARK" value="41T0753" constant="no"/>
<attribute name="PACKAGE" value="DFN-10" constant="no"/>
<attribute name="SUPPLIER" value="On-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV8537MN250R2G" prefix="U">
<description>Linear Regulator</description>
<gates>
<gate name="A" symbol="NCV8537MN250R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X300X100-10N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="10"/>
<connect gate="A" pin="IN_2" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NR" pad="7"/>
<connect gate="A" pin="OUT" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="PWRG" pad="5"/>
<connect gate="A" pin="SENSE" pad="3"/>
<connect gate="A" pin="~SD" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV8537MN250R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885147" constant="no"/>
<attribute name="OC_NEWARK" value="41T0754" constant="no"/>
<attribute name="PACKAGE" value="DFN-10" constant="no"/>
<attribute name="SUPPLIER" value="On-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV8537MN330R2G" prefix="U">
<description>Linear Regulator</description>
<gates>
<gate name="A" symbol="NCV8537MN330R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X300X100-10N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="10"/>
<connect gate="A" pin="IN_2" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NR" pad="7"/>
<connect gate="A" pin="OUT" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="PWRG" pad="5"/>
<connect gate="A" pin="SENSE" pad="3"/>
<connect gate="A" pin="~SD" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV8537MN330R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885148" constant="no"/>
<attribute name="OC_NEWARK" value="41T0755" constant="no"/>
<attribute name="PACKAGE" value="DFN-10" constant="no"/>
<attribute name="SUPPLIER" value="On-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV8537MN500R2G" prefix="U">
<description>Linear Regulator</description>
<gates>
<gate name="A" symbol="NCV8537MN500R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X300X100-10N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="10"/>
<connect gate="A" pin="IN_2" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NR" pad="7"/>
<connect gate="A" pin="OUT" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="PWRG" pad="5"/>
<connect gate="A" pin="SENSE" pad="3"/>
<connect gate="A" pin="~SD" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV8537MN500R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885149" constant="no"/>
<attribute name="OC_NEWARK" value="41T0756" constant="no"/>
<attribute name="PACKAGE" value="DFN-10" constant="no"/>
<attribute name="SUPPLIER" value="On-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NCV8537MNADJR2G" prefix="U">
<description>Linear Regulator</description>
<gates>
<gate name="A" symbol="NCV8537MNADJR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DFN300X300X100-10N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN" pad="10"/>
<connect gate="A" pin="IN_2" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NR" pad="7"/>
<connect gate="A" pin="OUT" pad="2"/>
<connect gate="A" pin="OUT_2" pad="1"/>
<connect gate="A" pin="PWRG" pad="5"/>
<connect gate="A" pin="SENSE" pad="3"/>
<connect gate="A" pin="~SD" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NCV8537MNADJR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1885150" constant="no"/>
<attribute name="OC_NEWARK" value="41T0752" constant="no"/>
<attribute name="PACKAGE" value="DFN-10" constant="no"/>
<attribute name="SUPPLIER" value="On-Semiconductors" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE5532AD8G" prefix="U">
<description>Internally Compensated Dual Low Noise Operational Amplifier</description>
<gates>
<gate name="A" symbol="NE5532AD8G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="+INA" pad="3"/>
<connect gate="A" pin="+INB" pad="5"/>
<connect gate="A" pin="-INA" pad="2"/>
<connect gate="A" pin="-INB" pad="6"/>
<connect gate="A" pin="OUTA" pad="1"/>
<connect gate="A" pin="OUTB" pad="7"/>
<connect gate="A" pin="V+" pad="8"/>
<connect gate="A" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE5532AD8G" constant="no"/>
<attribute name="OC_FARNELL" value="1426379" constant="no"/>
<attribute name="OC_NEWARK" value="42K2208" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE5532ANG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="NE5532ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="+INA" pad="3"/>
<connect gate="A" pin="+INB" pad="5"/>
<connect gate="A" pin="-INA" pad="2"/>
<connect gate="A" pin="-INB" pad="6"/>
<connect gate="A" pin="OUTA" pad="1"/>
<connect gate="A" pin="OUTB" pad="7"/>
<connect gate="A" pin="V+" pad="8"/>
<connect gate="A" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE5532ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1426380" constant="no"/>
<attribute name="OC_NEWARK" value="26K5043" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE5532DG" prefix="U">
<description>Internally Compensated Dual Low Noise Operational Amplifier</description>
<gates>
<gate name="A" symbol="NE5532DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="+INA" pad="2"/>
<connect gate="A" pin="+INB" pad="7"/>
<connect gate="A" pin="-INA" pad="1"/>
<connect gate="A" pin="-INB" pad="8"/>
<connect gate="A" pin="NC" pad="9"/>
<connect gate="A" pin="NC_2" pad="16"/>
<connect gate="A" pin="NC_3" pad="3"/>
<connect gate="A" pin="NC_4" pad="10"/>
<connect gate="A" pin="NC_5" pad="14"/>
<connect gate="A" pin="NC_6" pad="15"/>
<connect gate="A" pin="NC_7" pad="5"/>
<connect gate="A" pin="NC_8" pad="6"/>
<connect gate="A" pin="OUTA" pad="13"/>
<connect gate="A" pin="OUTB" pad="11"/>
<connect gate="A" pin="V+" pad="12"/>
<connect gate="A" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE5532DG" constant="no"/>
<attribute name="OC_FARNELL" value="1705907" constant="no"/>
<attribute name="OC_NEWARK" value="42K2210" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE5532NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="NE5532NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="+INA" pad="3"/>
<connect gate="A" pin="+INB" pad="5"/>
<connect gate="A" pin="-INA" pad="2"/>
<connect gate="A" pin="-INB" pad="6"/>
<connect gate="A" pin="OUTA" pad="1"/>
<connect gate="A" pin="OUTB" pad="7"/>
<connect gate="A" pin="V+" pad="8"/>
<connect gate="A" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE5532NG" constant="no"/>
<attribute name="OC_FARNELL" value="1705909" constant="no"/>
<attribute name="OC_NEWARK" value="42K2213" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE5534ANG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="NE5534ANG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMP" pad="5"/>
<connect gate="A" pin="NEG" pad="2"/>
<connect gate="A" pin="OFS" pad="1"/>
<connect gate="A" pin="OFS/COMP" pad="8"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS" pad="3"/>
<connect gate="A" pin="V+" pad="7"/>
<connect gate="A" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE5534ANG" constant="no"/>
<attribute name="OC_FARNELL" value="1426386" constant="no"/>
<attribute name="OC_NEWARK" value="42K2216" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE5534NG" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="NE5534NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMP" pad="5"/>
<connect gate="A" pin="NEG" pad="2"/>
<connect gate="A" pin="OFS" pad="1"/>
<connect gate="A" pin="OFS/COMP" pad="8"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="POS" pad="3"/>
<connect gate="A" pin="V+" pad="7"/>
<connect gate="A" pin="V-" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE5534NG" constant="no"/>
<attribute name="OC_FARNELL" value="1426388" constant="no"/>
<attribute name="OC_NEWARK" value="42K2219" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE592D14G" prefix="U">
<description>Video Amplifier</description>
<gates>
<gate name="A" symbol="NE592D14G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="G1A_GAIN_SELECT" pad="11"/>
<connect gate="A" pin="G1B_GAIN_SELECT" pad="4"/>
<connect gate="A" pin="G2A_GAIN_SELECT" pad="12"/>
<connect gate="A" pin="G2B_GAIN_SELECT" pad="3"/>
<connect gate="A" pin="IN_1" pad="14"/>
<connect gate="A" pin="IN_2" pad="1"/>
<connect gate="A" pin="NC" pad="2"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="NC_3" pad="6"/>
<connect gate="A" pin="NC_4" pad="9"/>
<connect gate="A" pin="OUT_1" pad="8"/>
<connect gate="A" pin="OUT_2" pad="7"/>
<connect gate="A" pin="V+" pad="10"/>
<connect gate="A" pin="V-" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE592D14G" constant="no"/>
<attribute name="OC_FARNELL" value="1468773" constant="no"/>
<attribute name="OC_NEWARK" value="42K2222" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NE592D8G" prefix="U">
<description>Video Amplifier</description>
<gates>
<gate name="A" symbol="NE592D8G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="G1A_GAIN_SELECT" pad="7"/>
<connect gate="A" pin="G1B_GAIN_SELECT" pad="2"/>
<connect gate="A" pin="IN_1" pad="8"/>
<connect gate="A" pin="IN_2" pad="1"/>
<connect gate="A" pin="OUT_1" pad="5"/>
<connect gate="A" pin="OUT_2" pad="4"/>
<connect gate="A" pin="V+" pad="6"/>
<connect gate="A" pin="V-" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NE592D8G" constant="no"/>
<attribute name="OC_FARNELL" value="1426401" constant="no"/>
<attribute name="OC_NEWARK" value="42K2224" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL17SZ07DFT2G" prefix="U">
<description>Single Non-Inverting Buffer with Open Drain Output</description>
<gates>
<gate name="A" symbol="NL17SZ07DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL17SZ07DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1705431" constant="no"/>
<attribute name="OC_NEWARK" value="04R7799" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL17SZ125DFT2G" prefix="U">
<description>Non-Inverting 3-State Buffer</description>
<gates>
<gate name="A" symbol="NL17SZ125DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="OUT_Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="~OE" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL17SZ125DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1468775" constant="no"/>
<attribute name="OC_NEWARK" value="83H7736" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL17SZ14DFT2G" prefix="U">
<description>Single Inverter with Schmitt Trigger</description>
<gates>
<gate name="A" symbol="NL17SZ14DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="IN_A" pad="2"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="OUT_~Y" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL17SZ14DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1468776" constant="no"/>
<attribute name="OC_NEWARK" value="88H5066" constant="no"/>
<attribute name="PACKAGE" value="SC70-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL17SZ17DFT2G" prefix="U">
<description>Single Non-Inverting Buffer with Schmitt Trigger</description>
<gates>
<gate name="A" symbol="NL17SZ17DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="A" pad="2"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="Y" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL17SZ17DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1311236" constant="no"/>
<attribute name="OC_NEWARK" value="45J2062" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL17SZ74USG" prefix="U">
<description>Single D Flip Flop</description>
<gates>
<gate name="A" symbol="NL17SZ74USG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P310X90-8N">
<connects>
<connect gate="A" pin="CP" pad="1"/>
<connect gate="A" pin="D" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="Q" pad="5"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="~CLR" pad="6"/>
<connect gate="A" pin="~PR" pad="7"/>
<connect gate="A" pin="~Q" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL17SZ74USG" constant="no"/>
<attribute name="OC_FARNELL" value="1468778" constant="no"/>
<attribute name="OC_NEWARK" value="83H7737" constant="no"/>
<attribute name="PACKAGE" value="SO-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL17SZU04DFT2G" prefix="U">
<description>Single Unbuffered Inverter</description>
<gates>
<gate name="A" symbol="NL17SZU04DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-5N">
<connects>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="1"/>
<connect gate="A" pin="VCC" pad="5"/>
<connect gate="A" pin="Y" pad="4"/>
<connect gate="A" pin="~A" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL17SZU04DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1155818" constant="no"/>
<attribute name="OC_NEWARK" value="98H0938" constant="no"/>
<attribute name="PACKAGE" value="SOT-353-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL27WZ04DTT1G" prefix="U">
<description>Dual Inverter</description>
<gates>
<gate name="A" symbol="NL27WZ04DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP95P275X110-6N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="IN_A1" pad="1"/>
<connect gate="A" pin="IN_A2" pad="3"/>
<connect gate="A" pin="OUT_~Y1" pad="6"/>
<connect gate="A" pin="OUT_~Y2" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL27WZ04DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1607797" constant="no"/>
<attribute name="OC_NEWARK" value="26K5079" constant="no"/>
<attribute name="PACKAGE" value="TSOP-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL27WZ08USG" prefix="U">
<description>Dual 2-Input AND Gate</description>
<gates>
<gate name="A" symbol="NL27WZ08USG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P310X90-8N">
<connects>
<connect gate="A" pin="A1" pad="1"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="B1" pad="2"/>
<connect gate="A" pin="B2" pad="6"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="Y1" pad="7"/>
<connect gate="A" pin="Y2" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL27WZ08USG" constant="no"/>
<attribute name="OC_FARNELL" value="1652022" constant="no"/>
<attribute name="OC_NEWARK" value="83H7741" constant="no"/>
<attribute name="PACKAGE" value="SO-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL27WZ126USG" prefix="U">
<description>Dual Buffer with 3-State Outputs</description>
<gates>
<gate name="A" symbol="NL27WZ126USG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P310X90-8N">
<connects>
<connect gate="A" pin="A1" pad="2"/>
<connect gate="A" pin="A2" pad="5"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="OE1" pad="1"/>
<connect gate="A" pin="OE2" pad="7"/>
<connect gate="A" pin="VCC" pad="8"/>
<connect gate="A" pin="Y1" pad="6"/>
<connect gate="A" pin="Y2" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL27WZ126USG" constant="no"/>
<attribute name="OC_FARNELL" value="1651993" constant="no"/>
<attribute name="OC_NEWARK" value="83H7743" constant="no"/>
<attribute name="PACKAGE" value="SO-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL27WZ14DTT1G" prefix="U">
<description>Dual Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="NL27WZ14DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-6N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="IN_A1" pad="1"/>
<connect gate="A" pin="IN_A2" pad="3"/>
<connect gate="A" pin="OUT_~Y1" pad="6"/>
<connect gate="A" pin="OUT_~Y2" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL27WZ14DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1468780" constant="no"/>
<attribute name="OC_NEWARK" value="71J6968" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL27WZ16DFT2G" prefix="U">
<description>Dual Buffer</description>
<gates>
<gate name="A" symbol="NL27WZ16DFT2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT65P210X110-6N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="IN_A1" pad="1"/>
<connect gate="A" pin="IN_A2" pad="3"/>
<connect gate="A" pin="OUT_Y1" pad="6"/>
<connect gate="A" pin="OUT_Y2" pad="4"/>
<connect gate="A" pin="VCC" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL27WZ16DFT2G" constant="no"/>
<attribute name="OC_FARNELL" value="1147928" constant="no"/>
<attribute name="OC_NEWARK" value="88H5068" constant="no"/>
<attribute name="PACKAGE" value="SOT-5" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL37WZ14USG" prefix="U">
<description>Triple Schmitt-Trigger Inverter</description>
<gates>
<gate name="A" symbol="NL37WZ14USG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P310X90-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_A1" pad="1"/>
<connect gate="A" pin="IN_A2" pad="3"/>
<connect gate="A" pin="IN_A3" pad="6"/>
<connect gate="A" pin="OUT_~Y1" pad="7"/>
<connect gate="A" pin="OUT_~Y2" pad="5"/>
<connect gate="A" pin="OUT_~Y3" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL37WZ14USG" constant="no"/>
<attribute name="OC_FARNELL" value="1365143" constant="no"/>
<attribute name="OC_NEWARK" value="83H7749" constant="no"/>
<attribute name="PACKAGE" value="SO-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NL37WZ17USG" prefix="U">
<description>Triple Noninverting  Schmitt-Trigger Buffer</description>
<gates>
<gate name="A" symbol="NL37WZ17USG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP50P310X90-8N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IN_A1" pad="1"/>
<connect gate="A" pin="IN_A2" pad="3"/>
<connect gate="A" pin="IN_A3" pad="6"/>
<connect gate="A" pin="OUT__Y1" pad="7"/>
<connect gate="A" pin="OUT__Y2" pad="5"/>
<connect gate="A" pin="OUT__Y3" pad="2"/>
<connect gate="A" pin="VCC" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NL37WZ17USG" constant="no"/>
<attribute name="OC_FARNELL" value="1607624" constant="no"/>
<attribute name="OC_NEWARK" value="83H7751" constant="no"/>
<attribute name="PACKAGE" value="SO-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NLAS4599DTT1G" prefix="U">
<description>Low Voltage Single Supply SPDT Analog Switch</description>
<gates>
<gate name="A" symbol="NLAS4599DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP95P275X110-6N">
<connects>
<connect gate="A" pin="COM" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NO" pad="6"/>
<connect gate="A" pin="SELECT" pad="1"/>
<connect gate="A" pin="V+" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NLAS4599DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1468781" constant="no"/>
<attribute name="OC_NEWARK" value="71J6944" constant="no"/>
<attribute name="PACKAGE" value="TSOP-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NLAST4599DTT1G" prefix="U">
<description>Low Voltage Single Supply SPDT Analog Switch</description>
<gates>
<gate name="A" symbol="NLAST4599DTT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP95P275X110-6N">
<connects>
<connect gate="A" pin="COM" pad="5"/>
<connect gate="A" pin="GND" pad="3"/>
<connect gate="A" pin="NC" pad="4"/>
<connect gate="A" pin="NO" pad="6"/>
<connect gate="A" pin="SELECT" pad="1"/>
<connect gate="A" pin="V+" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NLAST4599DTT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1311162" constant="no"/>
<attribute name="OC_NEWARK" value="26K5050" constant="no"/>
<attribute name="PACKAGE" value="TSOP-6" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3105DMT1G" prefix="U">
<description>Inductive Load Driver</description>
<gates>
<gate name="A" symbol="NUD3105DMT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-6N">
<connects>
<connect gate="A" pin="DRAIN1" pad="6"/>
<connect gate="A" pin="DRAIN2" pad="3"/>
<connect gate="A" pin="GATE1" pad="2"/>
<connect gate="A" pin="GATE2" pad="5"/>
<connect gate="A" pin="SOURCE1" pad="1"/>
<connect gate="A" pin="SOURCE2" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3105DMT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1880145" constant="no"/>
<attribute name="OC_NEWARK" value="42K2469" constant="no"/>
<attribute name="PACKAGE" value="SC-74-6" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3105LT1G" prefix="U">
<description>Integrated Relay,  Inductive Load Driver</description>
<gates>
<gate name="A" symbol="NUD3105LT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X110-3N">
<connects>
<connect gate="A" pin="GND" pad="2"/>
<connect gate="A" pin="VIN" pad="1"/>
<connect gate="A" pin="VOUT" pad="3"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3105LT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7853" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3112DMT1G" prefix="U">
<description>Inductive Load Driver</description>
<gates>
<gate name="A" symbol="NUD3112DMT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-6N">
<connects>
<connect gate="A" pin="DRAIN1" pad="6"/>
<connect gate="A" pin="DRAIN2" pad="3"/>
<connect gate="A" pin="GATE1" pad="2"/>
<connect gate="A" pin="GATE2" pad="5"/>
<connect gate="A" pin="SOURCE1" pad="1"/>
<connect gate="A" pin="SOURCE2" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3112DMT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7854" constant="no"/>
<attribute name="PACKAGE" value="SC-74-6" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3112LT1G" prefix="U">
<description>Integrated Relay,  Inductive Load Driver</description>
<gates>
<gate name="A" symbol="NUD3112LT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X110-3N">
<connects>
<connect gate="A" pin="DRAIN" pad="3"/>
<connect gate="A" pin="GATE" pad="1"/>
<connect gate="A" pin="SOURCE" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3112LT1G" constant="no"/>
<attribute name="OC_FARNELL" value="1705476" constant="no"/>
<attribute name="OC_NEWARK" value="04R7855" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="OM SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3124LT1G" prefix="U">
<description>Driver</description>
<gates>
<gate name="A" symbol="NUD3124LT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="DRAIN" pad="3"/>
<connect gate="A" pin="GATE" pad="1"/>
<connect gate="A" pin="SOURCE" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3124LT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7856" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3160DMT1G" prefix="U">
<description>Inductive Load Driver</description>
<gates>
<gate name="A" symbol="NUD3160DMT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P275X110-6N">
<connects>
<connect gate="A" pin="DRAIN1" pad="6"/>
<connect gate="A" pin="DRAIN2" pad="3"/>
<connect gate="A" pin="GATE1" pad="2"/>
<connect gate="A" pin="GATE2" pad="5"/>
<connect gate="A" pin="SOURCE1" pad="1"/>
<connect gate="A" pin="SOURCE2" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3160DMT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7857" constant="no"/>
<attribute name="PACKAGE" value="SC-74-6" constant="no"/>
<attribute name="SUPPLIER" value="ON Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD3160LT1G" prefix="U">
<description>Load Driver</description>
<gates>
<gate name="A" symbol="NUD3160LT1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOT95P240X111-3N">
<connects>
<connect gate="A" pin="DRAIN" pad="3"/>
<connect gate="A" pin="GATE" pad="1"/>
<connect gate="A" pin="SOURCE" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD3160LT1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="04R7858" constant="no"/>
<attribute name="PACKAGE" value="SOT-23-3" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD4001DR2G" prefix="U">
<description>High Current LED Driver</description>
<gates>
<gate name="A" symbol="NUD4001DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="BOOST" pad="2"/>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="IOUT" pad="5"/>
<connect gate="A" pin="IOUT_2" pad="6"/>
<connect gate="A" pin="IOUT_3" pad="7"/>
<connect gate="A" pin="IOUT_4" pad="8"/>
<connect gate="A" pin="REXT" pad="3"/>
<connect gate="A" pin="VIN" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD4001DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1547147" constant="no"/>
<attribute name="OC_NEWARK" value="70K4034" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="NUD4011DR2G" prefix="U">
<description>Low Current LED Driver</description>
<gates>
<gate name="A" symbol="NUD4011DR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="BOOST" pad="2"/>
<connect gate="A" pin="IOUT" pad="5"/>
<connect gate="A" pin="IOUT_2" pad="6"/>
<connect gate="A" pin="IOUT_3" pad="7"/>
<connect gate="A" pin="IOUT_4" pad="8"/>
<connect gate="A" pin="PWM" pad="4"/>
<connect gate="A" pin="REXT" pad="3"/>
<connect gate="A" pin="VIN" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="NUD4011DR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1547149" constant="no"/>
<attribute name="OC_NEWARK" value="04R7859" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="Onsemiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="P2782AF-08SR" prefix="U">
<description>General Purpose EMI Reduction IC</description>
<gates>
<gate name="A" symbol="P2782AF-08SR" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FS0" pad="7"/>
<connect gate="A" pin="FS1" pad="3"/>
<connect gate="A" pin="LF" pad="4"/>
<connect gate="A" pin="MODOUT" pad="6"/>
<connect gate="A" pin="VDD" pad="8"/>
<connect gate="A" pin="VSS" pad="5"/>
<connect gate="A" pin="XIN/CLKIN" pad="1"/>
<connect gate="A" pin="XOUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="P2782AF-08SR" constant="no"/>
<attribute name="OC_FARNELL" value="1903669" constant="no"/>
<attribute name="OC_NEWARK" value="55T3865" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="P2784AF-08SR" prefix="U">
<description>General Purpose EMI Reduction IC</description>
<gates>
<gate name="A" symbol="P2784AF-08SR" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FS0" pad="7"/>
<connect gate="A" pin="FS1" pad="3"/>
<connect gate="A" pin="LF" pad="4"/>
<connect gate="A" pin="MODOUT" pad="6"/>
<connect gate="A" pin="VDD" pad="8"/>
<connect gate="A" pin="VSS" pad="5"/>
<connect gate="A" pin="XIN/CLKIN" pad="1"/>
<connect gate="A" pin="XOUT" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="P2784AF-08SR" constant="no"/>
<attribute name="OC_FARNELL" value="1903670" constant="no"/>
<attribute name="OC_NEWARK" value="55T3866" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="On semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="PCS3P25811AG08SR" prefix="U">
<description>Spread Spectrum Clock Generator</description>
<gates>
<gate name="A" symbol="PCS3P25811AG08SR" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="FSEL" pad="6"/>
<connect gate="A" pin="MODOUT" pad="5"/>
<connect gate="A" pin="S0" pad="4"/>
<connect gate="A" pin="S1" pad="3"/>
<connect gate="A" pin="VDD" pad="7"/>
<connect gate="A" pin="VSS" pad="2"/>
<connect gate="A" pin="XIN_/_CLKIN" pad="1"/>
<connect gate="A" pin="XOUT" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="PCS3P25811AG08SR" constant="no"/>
<attribute name="OC_FARNELL" value="1903671" constant="no"/>
<attribute name="OC_NEWARK" value="55T3616" constant="no"/>
<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SA571DG" prefix="U">
<description>Compandor</description>
<gates>
<gate name="A" symbol="SA571DG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="G_CELL_IN_1" pad="3"/>
<connect gate="A" pin="G_CELL_IN_2" pad="14"/>
<connect gate="A" pin="INV._IN_1" pad="5"/>
<connect gate="A" pin="INV._IN_2" pad="12"/>
<connect gate="A" pin="OUT_1" pad="7"/>
<connect gate="A" pin="OUT_2" pad="10"/>
<connect gate="A" pin="RECT_CAP_1" pad="1"/>
<connect gate="A" pin="RECT_CAP_2" pad="16"/>
<connect gate="A" pin="RECT_IN_1" pad="2"/>
<connect gate="A" pin="RECT_IN_2" pad="15"/>
<connect gate="A" pin="RES._R3_1" pad="6"/>
<connect gate="A" pin="RES._R3_2" pad="11"/>
<connect gate="A" pin="THD_TRIM_1" pad="8"/>
<connect gate="A" pin="THD_TRIM_2" pad="9"/>
<connect gate="A" pin="VCC" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="SA571DG" constant="no"/>
<attribute name="OC_FARNELL" value="1426393" constant="no"/>
<attribute name="OC_NEWARK" value="42K2600" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SA571NG" prefix="U">
<description>Compandor</description>
<gates>
<gate name="A" symbol="SA571NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="GND" pad="4"/>
<connect gate="A" pin="G_CELL_IN_1" pad="3"/>
<connect gate="A" pin="G_CELL_IN_2" pad="14"/>
<connect gate="A" pin="INV._IN_1" pad="5"/>
<connect gate="A" pin="INV._IN_2" pad="12"/>
<connect gate="A" pin="OUTPUT_1" pad="7"/>
<connect gate="A" pin="OUTPUT_2" pad="10"/>
<connect gate="A" pin="RECT_CAP_1" pad="1"/>
<connect gate="A" pin="RECT_CAP_2" pad="16"/>
<connect gate="A" pin="RECT_IN_1" pad="2"/>
<connect gate="A" pin="RECT_IN_2" pad="15"/>
<connect gate="A" pin="RES._R3_1" pad="6"/>
<connect gate="A" pin="RES._R3_2" pad="11"/>
<connect gate="A" pin="THD_TRIM_1" pad="8"/>
<connect gate="A" pin="THD_TRIM_2" pad="9"/>
<connect gate="A" pin="VCC" pad="13"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="SA571NG" constant="no"/>
<attribute name="OC_FARNELL" value="1364647" constant="no"/>
<attribute name="OC_NEWARK" value="45J2245" constant="no"/>
<attribute name="PACKAGE" value="DIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SA572NG" prefix="U">
<description>Analog Comparator</description>
<gates>
<gate name="A" symbol="SA572NG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="ATTACK_CAP_A" pad="4"/>
<connect gate="A" pin="ATTACK_CAP_B" pad="12"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="G_INB" pad="9"/>
<connect gate="A" pin="G_IN_A" pad="7"/>
<connect gate="A" pin="G_OUT_A" pad="5"/>
<connect gate="A" pin="G_OUT_B" pad="11"/>
<connect gate="A" pin="RECOV._CAP_A" pad="2"/>
<connect gate="A" pin="RECOV._CAP_B" pad="14"/>
<connect gate="A" pin="RECT._IN_A" pad="3"/>
<connect gate="A" pin="RECT._IN_B" pad="13"/>
<connect gate="A" pin="THD_TRIM_A" pad="6"/>
<connect gate="A" pin="THD_TRIM_B" pad="10"/>
<connect gate="A" pin="TRACK_TRIM_A" pad="1"/>
<connect gate="A" pin="TRACK_TRIM_B" pad="15"/>
<connect gate="A" pin="VCC" pad="16"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="SA572NG" constant="no"/>
<attribute name="OC_FARNELL" value="1426397" constant="no"/>
<attribute name="OC_NEWARK" value="42K2602" constant="no"/>
<attribute name="PACKAGE" value="DIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="SA575DTBG" prefix="U">
<description>Low Voltage Compandor</description>
<gates>
<gate name="A" symbol="SA575DTBG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOP65P640X120-20N">
<connects>
<connect gate="A" pin="+VIN1" pad="1"/>
<connect gate="A" pin="+VIN2" pad="19"/>
<connect gate="A" pin="-VIN1" pad="2"/>
<connect gate="A" pin="-VIN2" pad="18"/>
<connect gate="A" pin="COMP.IN2" pad="13"/>
<connect gate="A" pin="COMP._IN1" pad="7"/>
<connect gate="A" pin="CRECT1" pad="5"/>
<connect gate="A" pin="CRECT2" pad="15"/>
<connect gate="A" pin="GAIN_CELL_IN1" pad="9"/>
<connect gate="A" pin="GAIN_CELL_IN2" pad="11"/>
<connect gate="A" pin="GND" pad="10"/>
<connect gate="A" pin="RECT.IN2" pad="16"/>
<connect gate="A" pin="RECT._IN1" pad="4"/>
<connect gate="A" pin="SUM_NODE_2" pad="12"/>
<connect gate="A" pin="SUM_OUT2" pad="14"/>
<connect gate="A" pin="SUM_OUT_1" pad="6"/>
<connect gate="A" pin="VCC" pad="20"/>
<connect gate="A" pin="VOUT1" pad="3"/>
<connect gate="A" pin="VOUT2" pad="17"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="SA575DTBG" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="70K4377" constant="no"/>
<attribute name="PACKAGE" value="TSSOP-20" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TCA0372DP1G" prefix="U">
<description>Operational Amplifiers</description>
<gates>
<gate name="A" symbol="TCA0372DP1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="IN_A" pad="7"/>
<connect gate="A" pin="IN_A_2" pad="8"/>
<connect gate="A" pin="IN_B" pad="5"/>
<connect gate="A" pin="IN_B_2" pad="6"/>
<connect gate="A" pin="OUT_A" pad="1"/>
<connect gate="A" pin="OUT_B" pad="3"/>
<connect gate="A" pin="VCC" pad="2"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TCA0372DP1G" constant="no"/>
<attribute name="OC_FARNELL" value="1651877" constant="no"/>
<attribute name="OC_NEWARK" value="88H5148" constant="no"/>
<attribute name="PACKAGE" value="PDIP" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TCA0372DWG" prefix="U">
<description>1.0 A Output Current Dual Power OperationalAmplifiers</description>
<gates>
<gate name="A" symbol="TCA0372DWG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="INPUTS_A" pad="9"/>
<connect gate="A" pin="INPUTS_A_2" pad="10"/>
<connect gate="A" pin="INPUTS_B" pad="7"/>
<connect gate="A" pin="INPUTS_B_2" pad="8"/>
<connect gate="A" pin="NC" pad="11"/>
<connect gate="A" pin="NC_2" pad="14"/>
<connect gate="A" pin="NC_3" pad="3"/>
<connect gate="A" pin="NC_4" pad="6"/>
<connect gate="A" pin="NC_5" pad="15"/>
<connect gate="A" pin="OUTPUT_A" pad="16"/>
<connect gate="A" pin="OUTPUT_B" pad="2"/>
<connect gate="A" pin="VCC" pad="1"/>
<connect gate="A" pin="VEE/GND" pad="13"/>
<connect gate="A" pin="VEE/GND_2" pad="12"/>
<connect gate="A" pin="VEE/GND_3" pad="4"/>
<connect gate="A" pin="VEE/GND_4" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TCA0372DWG" constant="no"/>
<attribute name="OC_FARNELL" value="1468783" constant="no"/>
<attribute name="OC_NEWARK" value="26K5198" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TCA0372DWR2G" prefix="U">
<description>Analog Multiplexers/ Demultiplexers</description>
<gates>
<gate name="A" symbol="TCA0372DWR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P1030X265-16N">
<connects>
<connect gate="A" pin="INPUTS_A" pad="10"/>
<connect gate="A" pin="INPUTS_A_2" pad="9"/>
<connect gate="A" pin="INPUTS_B" pad="7"/>
<connect gate="A" pin="INPUTS_B_2" pad="8"/>
<connect gate="A" pin="NC" pad="11"/>
<connect gate="A" pin="NC_2" pad="6"/>
<connect gate="A" pin="NC_3" pad="3"/>
<connect gate="A" pin="NC_4" pad="14"/>
<connect gate="A" pin="NC_5" pad="15"/>
<connect gate="A" pin="OUTPUT_A" pad="16"/>
<connect gate="A" pin="OUTPUT_B" pad="2"/>
<connect gate="A" pin="VCC" pad="1"/>
<connect gate="A" pin="VEE/GND" pad="4"/>
<connect gate="A" pin="VEE/GND_2" pad="12"/>
<connect gate="A" pin="VEE/GND_3" pad="13"/>
<connect gate="A" pin="VEE/GND_4" pad="5"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TCA0372DWR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1277937" constant="no"/>
<attribute name="OC_NEWARK" value="26K5199" constant="no"/>
<attribute name="PACKAGE" value="SOIC-16" constant="no"/>
<attribute name="SUPPLIER" value="On Semiconductor" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TDA1085CG" prefix="U">
<description>Universal Motor Speed Controller</description>
<gates>
<gate name="A" symbol="TDA1085CG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X444-16">
<connects>
<connect gate="A" pin="+VCC" pad="9"/>
<connect gate="A" pin="ACTUAL_SPEED" pad="4"/>
<connect gate="A" pin="CLOSED_LOOP_STABILITY" pad="16"/>
<connect gate="A" pin="CURRENT_SYNCHRONIZATION" pad="1"/>
<connect gate="A" pin="DIGITAL_SPEED_SENSE" pad="12"/>
<connect gate="A" pin="F/VC_PUMP_CAPACITOR" pad="11"/>
<connect gate="A" pin="GND" pad="8"/>
<connect gate="A" pin="MOTOR_CURRENT_LIMIT" pad="3"/>
<connect gate="A" pin="RAMP_CURRENT_GEN._CONTROL" pad="6"/>
<connect gate="A" pin="RAMP_GEN._TIMING" pad="7"/>
<connect gate="A" pin="SAWTOOTH_CAPACITOR" pad="14"/>
<connect gate="A" pin="SAWTOOTH_SET_CURRENT" pad="15"/>
<connect gate="A" pin="SET_SPEED" pad="5"/>
<connect gate="A" pin="SHUNT_REGULATOR_BALLAST_RESISTOR" pad="10"/>
<connect gate="A" pin="TRIGGER_PULSE_OUTPUT" pad="13"/>
<connect gate="A" pin="VOLTAGE_SYNCHRONIZATION" pad="2"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TDA1085CG" constant="no"/>
<attribute name="OC_FARNELL" value="1468784" constant="no"/>
<attribute name="OC_NEWARK" value="71J7907" constant="no"/>
<attribute name="PACKAGE" value="PDIP-16" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TL431ACDG" prefix="U">
<description>Programmable Precision Reference / Shunt Regulator</description>
<gates>
<gate name="A" symbol="TL431ACDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="3"/>
<connect gate="A" pin="ANODE_2" pad="2"/>
<connect gate="A" pin="ANODE_3" pad="6"/>
<connect gate="A" pin="ANODE_4" pad="7"/>
<connect gate="A" pin="CATHODE" pad="1"/>
<connect gate="A" pin="N/C" pad="5"/>
<connect gate="A" pin="N/C_2" pad="4"/>
<connect gate="A" pin="REF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TL431ACDG" constant="no"/>
<attribute name="OC_FARNELL" value="1651199" constant="no"/>
<attribute name="OC_NEWARK" value="45J2294" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TL431AIDG" prefix="U">
<description>Programmable Precision Reference / Shunt Regulator</description>
<gates>
<gate name="A" symbol="TL431AIDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="3"/>
<connect gate="A" pin="ANODE_2" pad="2"/>
<connect gate="A" pin="ANODE_3" pad="6"/>
<connect gate="A" pin="ANODE_4" pad="7"/>
<connect gate="A" pin="CATHODE" pad="1"/>
<connect gate="A" pin="N/C" pad="5"/>
<connect gate="A" pin="N/C_2" pad="4"/>
<connect gate="A" pin="REF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TL431AIDG" constant="no"/>
<attribute name="OC_FARNELL" value="1651200" constant="no"/>
<attribute name="OC_NEWARK" value="45J2295" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TL431AIDR2G" prefix="U">
<description>Programmable Precision Reference / Shunt Regulator</description>
<gates>
<gate name="A" symbol="TL431AIDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="3"/>
<connect gate="A" pin="ANODE_2" pad="2"/>
<connect gate="A" pin="ANODE_3" pad="6"/>
<connect gate="A" pin="ANODE_4" pad="7"/>
<connect gate="A" pin="CATHODE" pad="1"/>
<connect gate="A" pin="N/C" pad="5"/>
<connect gate="A" pin="N/C_2" pad="4"/>
<connect gate="A" pin="REF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TL431AIDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="1651202" constant="no"/>
<attribute name="OC_NEWARK" value="98H0990" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TL431BIDG" prefix="U">
<description>Programmable Precision Reference / Shunt Regulator</description>
<gates>
<gate name="A" symbol="TL431BIDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="3"/>
<connect gate="A" pin="ANODE_2" pad="2"/>
<connect gate="A" pin="ANODE_3" pad="6"/>
<connect gate="A" pin="ANODE_4" pad="7"/>
<connect gate="A" pin="CATHODE" pad="1"/>
<connect gate="A" pin="N/C" pad="5"/>
<connect gate="A" pin="N/C_2" pad="4"/>
<connect gate="A" pin="REF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TL431BIDG" constant="no"/>
<attribute name="OC_FARNELL" value="1652302" constant="no"/>
<attribute name="OC_NEWARK" value="98H0994" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TL431CDG" prefix="U">
<description>Programmable Precision Reference / Shunt Regulator</description>
<gates>
<gate name="A" symbol="TL431CDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="3"/>
<connect gate="A" pin="ANODE_2" pad="2"/>
<connect gate="A" pin="ANODE_3" pad="6"/>
<connect gate="A" pin="ANODE_4" pad="7"/>
<connect gate="A" pin="CATHODE" pad="1"/>
<connect gate="A" pin="N/C" pad="5"/>
<connect gate="A" pin="N/C_2" pad="4"/>
<connect gate="A" pin="REF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TL431CDG" constant="no"/>
<attribute name="OC_FARNELL" value="1104704" constant="no"/>
<attribute name="OC_NEWARK" value="42K2696" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="TL431CDR2G" prefix="U">
<description>Programmable Precision Reference / Shunt Regulator</description>
<gates>
<gate name="A" symbol="TL431CDR2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="ANODE" pad="3"/>
<connect gate="A" pin="ANODE_2" pad="2"/>
<connect gate="A" pin="ANODE_3" pad="6"/>
<connect gate="A" pin="ANODE_4" pad="7"/>
<connect gate="A" pin="CATHODE" pad="1"/>
<connect gate="A" pin="N/C" pad="5"/>
<connect gate="A" pin="N/C_2" pad="4"/>
<connect gate="A" pin="REF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="TL431CDR2G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="88H5153" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UAA2016PG" prefix="U">
<description>Power Controller</description>
<gates>
<gate name="A" symbol="UAA2016PG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="HYS._ADJ." pad="2"/>
<connect gate="A" pin="OUTPUT" pad="6"/>
<connect gate="A" pin="SENSOR" pad="3"/>
<connect gate="A" pin="SYNC" pad="8"/>
<connect gate="A" pin="TEMP._REDUC." pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VEE" pad="5"/>
<connect gate="A" pin="VREF" pad="1"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UAA2016PG" constant="no"/>
<attribute name="OC_FARNELL" value="1192087" constant="no"/>
<attribute name="OC_NEWARK" value="45J2359" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC2842BD1R2G" prefix="U">
<description>High Performance Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="UC2842BD1R2G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FB" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC2842BD1R2G" constant="no"/>
<attribute name="OC_FARNELL" value="1293251" constant="no"/>
<attribute name="OC_NEWARK" value="67H7336" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC2842BDG" prefix="U">
<description>High Performance Current Mode Controllers</description>
<gates>
<gate name="A" symbol="UC2842BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="5"/>
<connect gate="A" pin="GND" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="NC_3" pad="2"/>
<connect gate="A" pin="NC_4" pad="4"/>
<connect gate="A" pin="OUT" pad="10"/>
<connect gate="A" pin="POWER_GND" pad="8"/>
<connect gate="A" pin="RT/CT" pad="7"/>
<connect gate="A" pin="VC" pad="11"/>
<connect gate="A" pin="VCC" pad="12"/>
<connect gate="A" pin="VOLTAGE_FB" pad="3"/>
<connect gate="A" pin="VREF" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC2842BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1278355" constant="no"/>
<attribute name="OC_NEWARK" value="70K5973" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC2843BD1G" prefix="U">
<description>High Performance Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="UC2843BD1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FB" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC2843BD1G" constant="no"/>
<attribute name="OC_FARNELL" value="1104705" constant="no"/>
<attribute name="OC_NEWARK" value="93K1068" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC2843BNG" prefix="U">
<description>Current Mode Controllers</description>
<gates>
<gate name="A" symbol="UC2843BNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMPENSATION" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUTPUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC2843BNG" constant="no"/>
<attribute name="OC_FARNELL" value="1230088" constant="no"/>
<attribute name="OC_NEWARK" value="45J2366" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC3842BNG" prefix="U">
<description>Current Mode Controllers</description>
<gates>
<gate name="A" symbol="UC3842BNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMPENSATION" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUTPUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC3842BNG" constant="no"/>
<attribute name="OC_FARNELL" value="1652438" constant="no"/>
<attribute name="OC_NEWARK" value="88H5155" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC3843BD1G" prefix="U">
<description>High Performance Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="UC3843BD1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FB" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC3843BD1G" constant="no"/>
<attribute name="OC_FARNELL" value="1705973" constant="no"/>
<attribute name="OC_NEWARK" value="45J2379" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC3843BVD1G" prefix="U">
<description>High Performance Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="UC3843BVD1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FB" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC3843BVD1G" constant="no"/>
<attribute name="OC_FARNELL" value="-" constant="no"/>
<attribute name="OC_NEWARK" value="71J8473" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC3844BNG" prefix="U">
<description>Current Mode Controllers</description>
<gates>
<gate name="A" symbol="UC3844BNG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="DIP254P762X445-8">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="ISEN" pad="3"/>
<connect gate="A" pin="OUTPUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FEEDBACK" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC3844BNG" constant="no"/>
<attribute name="OC_FARNELL" value="1652439" constant="no"/>
<attribute name="OC_NEWARK" value="45J2386" constant="no"/>
<attribute name="PACKAGE" value="PDIP-8" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC3845BDG" prefix="U">
<description>High Performance Current Mode Controllers</description>
<gates>
<gate name="A" symbol="UC3845BDG" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-14N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="5"/>
<connect gate="A" pin="GND" pad="9"/>
<connect gate="A" pin="NC" pad="6"/>
<connect gate="A" pin="NC_2" pad="13"/>
<connect gate="A" pin="NC_3" pad="2"/>
<connect gate="A" pin="NC_4" pad="4"/>
<connect gate="A" pin="OUT" pad="10"/>
<connect gate="A" pin="POWER_GND" pad="8"/>
<connect gate="A" pin="RT/CT" pad="7"/>
<connect gate="A" pin="VC" pad="11"/>
<connect gate="A" pin="VCC" pad="12"/>
<connect gate="A" pin="VOLTAGE_FB" pad="3"/>
<connect gate="A" pin="VREF" pad="14"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC3845BDG" constant="no"/>
<attribute name="OC_FARNELL" value="1364584" constant="no"/>
<attribute name="OC_NEWARK" value="42K2722" constant="no"/>
<attribute name="PACKAGE" value="SOIC-14" constant="no"/>
<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="UC3845BVD1G" prefix="U">
<description>High Performance Current Mode PWM Controller</description>
<gates>
<gate name="A" symbol="UC3845BVD1G" x="0" y="0"/>
</gates>
<devices>
<device name="" package="SOIC127P600X175-8N">
<connects>
<connect gate="A" pin="COMP" pad="1"/>
<connect gate="A" pin="CURRENT_SENSE" pad="3"/>
<connect gate="A" pin="GND" pad="5"/>
<connect gate="A" pin="OUT" pad="6"/>
<connect gate="A" pin="RT/CT" pad="4"/>
<connect gate="A" pin="VCC" pad="7"/>
<connect gate="A" pin="VOLTAGE_FB" pad="2"/>
<connect gate="A" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name="">
<attribute name="MPN" value="UC3845BVD1G" constant="no"/>
<attribute name="OC_FARNELL" value="1705923" constant="no"/>
<attribute name="OC_NEWARK" value="42K2725" constant="no"/>
<attribute name="PACKAGE" value="8-SOIC" constant="no"/>
<attribute name="SUPPLIER" value="ON Semi" constant="no"/>
</technology>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
