<sld_project_info>
  <project>
    <hash md5_digest_80b="1b1ce3ef9d2603753fd5"/>
  </project>
  <file_info>
    <file device="EPM7128SLI84-10" path="//wsl.localhost/Debian/home/vrs/Verilog/projects/32k-Omnibus/output_files/cpld.sof" usercode="0x00000000"/>
  </file_info>
</sld_project_info>
