module sheet35(ac04, ac05, ac06, ac07, ac08, ac09, ac10, ac11, feed_hole, hole1, hole2, hole3, hole4, hole5, hole6, hole7, hole8, initialize_, io_bus_in_int_, io_bus_in_skip_, iop1, iop2, iop4, m36v, mb03_, mb04_, mb05_, mb06_, mb07, mb08_, n__721, n__722, n__734, n__735, n__736, n__737, n__738, n__739, n__740, n__741, pun_feed_switch_, sync_pun, dclk);
input dclk;
// synthesis attribute CLOCK_SIGNAL of dclk is "yes";
input ac04;
input ac05;
input ac06;
input ac07;
input ac08;
input ac09;
input ac10;
input ac11;
output wand feed_hole;
output wand hole1;
output wand hole2;
output wand hole3;
output wand hole4;
output wand hole5;
output wand hole6;
output wand hole7;
output wand hole8;
input initialize_;
output wand io_bus_in_int_;
output wand io_bus_in_skip_;
input iop1;
input iop2;
input iop4;
input m36v;
input mb03_;
input mb04_;
input mb05_;
input mb06_;
input mb07;
input mb08_;
inout n__721;
inout n__722;
inout n__734;
inout n__735;
inout n__736;
inout n__737;
inout n__738;
inout n__739;
inout n__740;
inout n__741;
input pun_feed_switch_;
input sync_pun;

// Sheet 35
assign hole8 = ~(n__722 & n__734 & n__734 & n__734);
assign hole7 = ~(n__722 & n__735 & n__735 & n__735);
assign hole6 = ~(n__722 & n__737 & n__737 & n__737);
assign hole5 = ~(n__722 & n__738 & n__738 & n__738);
assign hole4 = ~(n__722 & n__739 & n__739 & n__739);
assign feed_hole = ~(n__722 & n__722 & n__722 & n__722);
assign hole3 = ~(n__722 & n__740 & n__740 & n__740);
assign hole2 = ~(n__722 & n__741 & n__741 & n__741);
assign hole1 = ~(n__722 & n__736 & n__736 & n__736);
PunchControl hj28m710(.dclk(dclk), .ad1(ac10), .ad2(ac11), .ae1(ac08), .ae2(ac09), .af1(ac06), .af2(ac07), .ah1(ac04), .ah2(ac05), .ak1(n__734), .ak2(n__739), .al1(n__735), .al2(n__740), .am1(n__737), .am2(n__741), .an1(n__738), .an2(n__736), .ap2(iop4), .ar1(iop2), .ar2(iop1), .as2(initialize_), .at2(pun_feed_switch_), .au1(n__721), .av2(sync_pun), .bd1(mb04_), .bd2(mb05_), .be1(mb06_), .be2(mb07), .bf1(mb08_), .bf2(mb03_), .bh2(n__722), .bn2(io_bus_in_skip_), .bs2(io_bus_in_int_), .bu2(1'b1), .bv1(n__721));

endmodule